AN3029
Application note
Getting started with STM8L
Introduction
This application note complements the information in the STM8L datasheets by describing
the minimum hardware and software environment required to build an application around an
STM8L 8-bit microcontroller device.
It applies to low density STM8L101x, medium and medium+ density STM8L15x, and high
density STM8L15x/16x devices.
A brief description of the principal hardware components is given. The power supply,
analog-to-digital converter (ADC), clock management, and reset control are described in
some detail. In addition, some hardware recommendations are given. This application note
also contains detailed reference design schematics with descriptions of the main
components. The STM8L uses the same toolchain The STM8 development tools and
software toolchain are common to STM8L, STM8S and STM8A and are presented in
Section 8, and 9. Section 10 describes how to set up the STM8 development environment.
Finally, Section 11 provides a list of relevant documentation and online support resources.
March 2011 Doc ID 16139 Rev 3 1/42
www.st.com
Contents AN3029
Contents
1 Hardware requirements summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Power supply overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Main operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Power-on/power-down reset (POR/PDR) . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Analog power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 Clock management overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2 Internal clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 External clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3.1 HSE clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3.2 LSE clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Reset control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Reset management overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.1 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1.2 Input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2 Hardware reset implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Printed circuit board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 Component position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3 Ground and power supply (V
6.4 Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.5 Other signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
, VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SS
6.6 Unused I/Os and features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.7 User options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.8 Bootloader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/42 Doc ID 16139 Rev 3
AN3029 Contents
7 Reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1 Component references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8 STM8 development tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.1 Single wire interface module (SWIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.1.1 SWIM overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.1.2 SWIM connector pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.1.3 Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.2 STice emulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.2.1 STice overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.2.2 STice in emulation configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.2.3 In-circuit programming and debugging . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.3 RLink and STLink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9 STM8 software toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
9.1 Integrated development environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.2 Compiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.3 Firmware library . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
10 Setting up the STM8 development environment . . . . . . . . . . . . . . . . . 29
10.1 Installing the tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
10.2 Using the tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
10.2.1 Project editing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10.2.2 Online help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.3 Running the demonstration software . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.3.1 Compiling the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.3.2 Selecting the correct debug instrument . . . . . . . . . . . . . . . . . . . . . . . . . 34
10.3.3 Connecting the hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
10.3.4 Starting the debug session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
10.3.5 Running the software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10.3.6 Follow up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
11 Documentation and online support . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Doc ID 16139 Rev 3 3/42
List of tables AN3029
List of tables
Table 1. Component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 2. SWIM connector pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 3. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4/42 Doc ID 16139 Rev 3
AN3029 List of figures
List of figures
Figure 1. Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Typical layout of V
Figure 3. Analog input interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. HSE clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. External clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Crystal/ceramic resonators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Reset management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 12. Debug system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 13. Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 14. Connection description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 15. STice in emulation configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 16. In-circuit programming and debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 17. STM8 software toolchain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 18. STVD open example workspace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 19. STVD MCU edit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 20. STM8 firmware library online help manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 21. STVD: Building the project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 22. STVD: Selecting the debug instrument. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 23. Connecting the debug instrument to the STM8L101-EVAL evaluation board . . . . . . . . . . 35
Figure 24. Connecting the debug instrument to the STM8L152x-EVAL evaluation board . . . . . . . . . 36
Figure 25. STVD: Starting the debug session . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 26. STVD: Run the software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 27. STM8 evaluation board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
DD/VSS
pair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Doc ID 16139 Rev 3 5/42
Hardware requirements summary AN3029
1 Hardware requirements summary
To build an application around an STM8L device, the application board should provide the
following features:
● Power supply (mandatory)
● Clock management (optional)
● Reset management (optional)
● Debugging tool support: Single wire interface module (SWIM) connector (optional)
2 Power supply
2.1 Power supply overview
The STM8L can be supplied through a 1.65 V to 3.6 V external source. For medium density
STM8L15x and high density STM8L15x/STM8L16x with BOR, the power supply must be
above 1.8 V at power-on and can go below 1.65 V at power-down.
An on-chip power management system provides the constant digital supply to the core logic,
both in normal and low power modes. This garantees that the logic consumes a constant
current over the voltage range. It is also capable of detecting voltage drops and generate
reset to avoid heratic behaviour.
The STM8L device provides:
● Depending on packages, one pair of pads (V
(V
DDx/VSSx
All V
connected to V
for each V
) from 1.65 V or 1.8 V to 3.6 V.
DDx
and V
DDx
must be at the same potential respectively. The V
SSx
with external decoupling capacitors: one 100 nF Ceramic capacitor
DD
pin and one single 1 µF Tantalum or Ceramic capacitor.
DD/VSS
), or several pairs of pads
pins must be
DDx
The STM8L15x and STM8L16x devices also provide in some packages:
● One pair of pads, V
DDA/VSSA
the same potential respectively as V
converter (ADC) for more details. The V
, dedicated to analog functions. V
and VSS. Refer to Section 3: Analog-to-digital
DD
pin must be connected to two external
DDA
DDA
and V
must be at
SSA
decoupling capacitors (one 100 nF Ceramic capacitor and one single 1 µF Tantalum or
Ceramic capacitor). Additional precautions can be taken to filter analog noise: V
can be connected to V
through a ferrite bead.
DD
DDA
The STM8L152/STM8L162 device manages the supply voltage needed by the LCD in three
different ways (see Figure 1):
1. If the LCD feature is not used, connect the VLCD pin to V
DD
.
2. Apply to VLCD the voltage to be applied to the LCD.
3. Leave the STM8L152/STM8L162 to provide the correct voltage, via its programmable
LCD booster, by connecting the VLCD pin to a 1µF capacitor.
6/42 Doc ID 16139 Rev 3
AN3029 Power supply
6
,#$
34-,
.§N&
6
$$
§&
N&&
N&&
NOTE
6
,#$
6
2%&
6
$$!
6
33!
6
$$.
6
33.
6
2%&
6
$$
AIE
&
OPTIONAL
NOTE
NOTE
Figure 1. Power supply
1. Optional: if a separate, external reference voltage is connected on V
µF) must be connected. V
2. N is the number of V
DD
is either connected to V
REF+
and VSS inputs.
DDA
or V
REF.
, the two capacitors (100 nF and 1
REF+
Note: The capacitors must be connected as close as possible to the device supplies.
Placing a crystal/resonator on OSCIN/OSCOUT is optional. The resonator must be
connected as close as possible to the OSCIN and OSCOUT pins. The loading capacitance
ground must be connected as close as possible to V
SS
.
2.2 Main operating voltages
STM8L devices are processed in 0.13 µm technology. The STM8L core and I/O peripherals
need different power supplies. In fact, STM8L devices have an internal regulator with a
nominal target output of 1.8 V.
Doc ID 16139 Rev 3 7/42
Power supply AN3029
Via to V
SS
Via to V
DD
Cap.
VDDV
SS
STM8
2.3 Power-on/power-down reset (POR/PDR)
The input supply to the main and low power regulators is monitored by a power-on/powerdown reset circuit. The monitoring voltage begins at 0.7 V.
During power-on, the POR/PDR keeps the device under reset until the supply voltages (V
and V
) reach their specified working area. This internal reset is maintained during ~1ms
DDA
DD
in order to wait for supply stabilization.
At power-on, a defined reset should be maintained below 0.7 V. The upper threshold for a
reset release is defined in the electrical characteristics section of the product datasheets.
A hysteresis is implemented (POR > PDR) to ensure clean detection of voltage rise and fall.
The POR/PDR also generates a reset when the supply voltage drops below the V
POR/PDR
threshold (isolated and repetitive events).
For better power monitoring, the STM8L15x and STM8L16x provide a programmable power
voltage detection (PVD) and a brown out reset (BOR) for an earlier detection of voltage
drop.
Recommendations
All pins need to be properly connected to the power supplies. These connections, including
pads, tracks and vias should have the lowest possible impedance. This is typically achieved
with thick track widths and preferably dedicated power supply planes in multi-layer printed
circuit boards (PCBs).
In addition, each power supply pair should be decoupled with filtering ceramic capacitors (C)
at 100 nF with one chemical C (1..2 µF) in parallel on the STM8L device. The ceramic
capacitors should be placed as close as possible to the appropriate pins, or below the
appropriate pins, on the opposite side of the PCB. Typical values are 10 nF to 100 nF, but
exact values depend on the application needs. Figure 2 shows the typical layout of such a
V
DD/VSS
pair.
Figure 2. Typical layout of V
8/42 Doc ID 16139 Rev 3
DD/VSS
pair
AN3029 Analog-to-digital converter (ADC)
STM8L15x/STM8L16x
3 Analog-to-digital converter (ADC)
This section is unique for the STM8L15x and STM8L16x.
3.1 Analog power
For some packages, the ADC unit has an independent, analog supply voltage, isolated on
input pin V
voltage, V
noise, a ferrite bead can be added between V
choosen according to the frequencies to be filtered.
Some packages also provide a separate external analog reference voltage input for the ADC
unit on the V
● The V
external reference voltage is applied on V
connected on this pin. To compensate for peak consumption on V
capacitor may be increased to 10 µF when the sampling speed is low. In all cases,
V
REF+
equal to V
internal V
● V
REF-
internally bonded to V
, which allows the ADC to accept a very clean voltage source. This analog
DDA
, should be identical to the digital voltage supply on pin VDD. To filter some
DDA
pin. This gives better accuracy on low voltage input as follows:
REF+
pin can be connected to the V
REF+
must be kept between 2.4 V and V
. This input is internally bonded to V
DDA
pin.
REF+
and V
DD
external power supply. If a separate,
DDA
, a 100 nF and a 1 µF capacitor must be
REF+
. If V
DDA
. This ferrite bead should be
DDA
, the 1 µF
REF
is below 2.4, V
DDA
in the devices that have no
DDA
REF+
must be
(input, analog reference negative): The lower/negative reference voltage is
.
SSA
3.2 Analog input
STM8L15x and STM8L16x devices have up to 28 analog input channels (including four fast
channels), each multiplexed with an I/O, which are converted by the ADC one at a time.
The external input impedance (R
at maximum speed (1 MHz) if R
Please refer to Figure 3.
Figure 3. Analog input interface
) max value is 50 kΩ.The four fast channels can convert
AIN
is less than 0.5 kΩ.
AIN
Doc ID 16139 Rev 3 9/42
Analog-to-digital converter (ADC) AN3029
Please refer to the STM8L15x and STM8L16x datasheets and reference manuals for more
details.
10/42 Doc ID 16139 Rev 3
AN3029 Clock management
4 Clock management
The STM8L101 has no external clock so no precautionary measures are needed.
4.1 Clock management overview
STM8L15x and STM8L16x devices offer a flexible way of selecting the core and peripheral
clocks (ADC, memory, and digital peripherals). The devices have internal and external clock
source inputs, both of which have a high speed and a low speed version. Any of those four
clocks can be use for the CPU and most of the peripherals through a programable prescaler.
An I/O can be programmed as output clock (CCO) to reflect one of the four clocks (with or
without prescaling).
The signal which leaves the I/O represents an output clock (CCO) divided by a division
factor.
4.2 Internal clocks
STM8L devices have two kinds of internal clock: A high speed internal clock (HSI) running at
16 MHz and a low speed internal clock (LSI) running at 38 kHz.
After reset, the CPU starts with the internal RC (HSI clock signal) divided by 8, i.e. 2 MHz.
4.3 External clock
STM8L15x and STM8L16x devices have two kinds of external clock: A high speed external
clock (HSE) running at up to 16 MHz and a low speed external clock (LSE) running at
32.768 kHz.
4.3.1 HSE clock
STM8L15x and STM8L16x devices can connect to an external crystal or an external
oscillator.
Note: When no external clock is used, OSCIN and OSCOUT can be used as general purpose
I/Os.
Figure 4 describes the external clock connections.
External clock
● Frequency: 0 kHz … 16 MHz
● Input hysteresis: 100 mV
Caution: Without prescaler, a duty cycle of 45/55 % maximum must be respected at high speed
Doc ID 16139 Rev 3 11/42
Clock management AN3029
OSC
IN
OSC
OUT
External source
STM8
(I/O available)
Load capacitors
STM8
C
L2
C
L1
Q1
OSC
IN
OSC
OUT
R
EXT
(1)
Crystal/ceramic resonator
● Frequency range: 1 to 16 MHz
● Stabilisation time: Programable from 1 to 4096 cycles
● Oscillation mode: Preferred fundamental
● Output duty cycle: Max 55/45%
● I/O’s: Standard I/O pins multiplexed with OSC
●
Cload: 10 to 20 pF
● Drive level maximum: at least 100 µW
Figure 4. HSE clock sources
Hardware configuration
External clock
and OSC
IN
OUT
(1)
Crystal/ceramic resonators
1. The value of R
but, it is not optimal. A typical value is in the range 5 to 6 RS (resonator series resistance). To fine-tune the
R
value, refer to AN2867 (Oscillator design guide for ST microcontrollers).
EXT
The values of the load capacitors C
depends on the crystal characteristics. A 0 resistor works well with most oscillators
EXT
and CL2 are heavily dependent on the crystal type and
L1
frequency. Refer to the datasheet of the crystal manufacturer to select the capacitances. For
best oscillation stability, C
and CL2 normally have the same value. Typical values are in the
L1
range from below 20 pF up to 40 pF (cload: 10 to 20 pF). The parasitic capacitance of the
board layout also needs to be considered and typically adds a few pF to the component
values (refer to AN2867).
A clock security system prevents any CPU fatal error from a HSE failure, as it safely
switches to HSI.
12/42 Doc ID 16139 Rev 3
AN3029 Clock management
OSC32_OUTOSC32_IN
External source
(Hi-Z)
ai15765
Microcontroller
Recommendations
In the PCB layout all connections should be as short as possible. Any additional signals,
especially those that could interfere with the oscillator, should be locally separated from the
PCB area around the oscillation circuit using suitable shielding.
4.3.2 LSE clock
The low-speed external clock signal (LSE) can be generated from two possible clock
sources:
● LSE external crystal/ceramic resonator (see Figure 6)
● LSE user external clock (see Figure 6)
External source (LSE bypass)
In this mode, an external clock source must be provided. It must have a frequency of
32.768 kHz. The external clock signal (square, sine or triangle) with a duty cycle of about
50% has to drive the OSC32_IN pin while the OSC32_OUT pin must be left high impedance
(see Figure 6 and Figure 6).
Figure 5. External clock
1. OSC32_IN and OSC32_OUT pins can be used also as GPIO but, it is recommended not to use them as
both RTC and GPIO pins in the same application.
External crystal/ceramic resonator (LSE crystal)
The LSE crystal is a 32.768 kHz low-speed external crystal or ceramic resonator. It has the
advantage of providing a low-power, but highly accurate clock source to the real-time clock
peripheral (RTC) for clock/calendar or other timing functions.
The resonator and the load capacitors have to be connected as close as possible to the
oscillator pins in order to minimize output distortion and start-up stabilization time. The load
capacitance values must be adjusted according to the selected oscillator.
Doc ID 16139 Rev 3 13/42
Clock management AN3029
OSC32_OUTOSC32_IN
ai15764
C
L1
C
L2
Microcontroller
R
EXT
(3)
Figure 6. Crystal/ceramic resonators
1. To avoid exceeding the maximum value of CL1 and CL2 (15 pF), it is strongly recommended to use a
resonator with a load capacitance C
AN2867 (Oscillator design guide for ST microcontrollers).
2. OSC32_IN and OSC32_OUT pins can be used also as GPIO, but it is recommended not to use them as
both RTC and GPIO pins in the same application.
3. The value of R
typical value is in the range 5 to 6 RS. To fine-tune the R
for ST microcontrollers).
depends on the crystal characteristics. A 0 resistor works with most oscillators. A
EXT
= 7 pF. To fine-tune the choice, refer to the g
L
value refer to AN2867 (Oscillator design guide
EXT
calculation in
mcrit
14/42 Doc ID 16139 Rev 3
AN3029 Reset control
2
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5 Reset control
5.1 Reset management overview
The reset pin is a 3.3 V bidirectional I/O. After startup it can be programmed by software to
be used as a general purpose I/O.
Its output buffer driving capability is fixed to Iol
= 2 mA @ 0.45 V in the 1.8 V to 3.6 V
MIN
range which includes a ~45 k pull-up. Output buffer is reduced to the n-channel MOSFET
(NMOS). The receiver includes a glitch filter, whereas the output buffer includes a 20 µs
delay.
There are many reset sources, including:
● External reset through the NRST pin
● Power-on reset (POR) and brown-out reset (BOR): During power-on, the POR keeps
the device under reset until the supply voltage (V
DD
and V
) reach the voltage level
DDx
at which level the BOR starts to function. STM8L101 has only a POR.
● Independent watchdog reset (IWDG)
● Window watchdog reset (WWDG), featuring also software reset: only for STM8L15x
and STM8L16x.
● SWIM reset: An external device connected to the SWIM interface can request the
SWIM block to generate a microcontroller reset.
● Illegal opcode reset: If a code to be executed does not correspond to any opcode or
prebyte value, a reset is generated.
Figure 7 shows a simplified functional I/O reset schematic.
Figure 7. Reset management
Doc ID 16139 Rev 3 15/42
Reset control AN3029
20 n
20 µs pulse stretch min
A
Pad
Reset requested
Pad
System reset
>5 ns >5 ns
<50 ns <50 ns <50 ns
300 ns
Valid Reset requestedNegative train of glitch filtered
5.1.1 Output characteristics
● A valid pulse on the pin is guaranteed with a 20 ns pulse duration on the internal
output buffer.
● After a valid pulse is recognized, a pulse on the pin of at least 20 µs is guaranteed
starting from the falling edge of A.
Figure 8. Output characteristics
Figure 9. Output characteristics
5.1.2 Input characteristics
● All pulses with a duration less than 50 ns are filtered
● All train/burst spikes with a ratio of 1/10 must be filtered. This means that a negative
spike of up to 50 ns is always filtered, when a 5 ns interval between spikes occurs (ratio
1/10).
● All pulses with duration more than 300 ns are recognized as valid pulses
Figure 10. Input characteristics
16/42 Doc ID 16139 Rev 3
AN3029 Reset control
5.2 Hardware reset implementation
The STM8L does not require an external reset circuit to power-up correctly. Only a pulldown capacitor is recommended (see Figure 7). However, charging/discharging the pulldown capacitor through an internal resistor has a negative influence on the device power
consumption. Therefore, the recommended capacitor value of 100 nF can be reduced down
to 10 nF to limit such power consumption.
The STM8L101 reset state is released 1 ms after the POR value (1.35 V to 1.65 V) is
reached. At this time, V
For medium density devices and medium+ and high density devices operating from 1.8 V at
power-on: the reset state is released 1 ms after the BOR minimum value (~1.75 V) is
reached.
should be in the 1.65 V to 3.6 V range.
DD
Doc ID 16139 Rev 3 17/42
Recommendations AN3029
6 Recommendations
6.1 Printed circuit board
For technical reasons, it is best to use a multi-layer PCB with a separate layer dedicated to
the V
good shielding effect. For many applications, economical requirements prohibit the use of
this type of board. In this case, the most important feature is to ensure a good structure for
the V
6.2 Component position
A preliminary layout of the PCB must separate the different circuits according to their
electromagnetic interference (EMI) contribution. This reduces cross-coupling on the PCB,
for instance, noisy, high-current circuits, low voltage circuits, and digital components.
6.3 Ground and power supply (VSS, VDD)
The VSS should be distributed individually to every block (noisy, low level sensitive, and
digital) with a single point for gathering all ground returns. Loops must be avoided or have a
minimum surface. The power supply should be implemented close to the ground line to
minimize the surface of the supply loop. This is due to the fact that the supply loop acts as
an antenna, and is therefore the main emitter and receiver of EMI. All component-free
surfaces of the PCB must be filled with additional grounding to create a kind of shield
(especially when using single-layer PCBs).
and another layer to the VDD supply. This results in a good decoupling, as well as a
SS
and power supply.
SS
6.4 Decoupling
The standard decoupler for the external power is a 1 µF pool capacitor. Supplementary 100
nF capacitors must be placed as close as possible to the V
microcontroller to reduce the area of the current loop.
As a general rule, decoupling all sensitive or noisy signals improves electromagnetic compatibility (EMC) performances.
There are two types of decouplers:
● Capacitors close to components. Inductive characteristics, which apply to all capacitors
beyond a certain frequency, must be taken into account. If possible, parallel capacitors
with decreasing values (0.1, 0.01,... µF) should be used.
● Inductors. Although often ignored, ferrite beads, for example, are excellent inductors
due to their good dissipation of EMI energy and there is no loss of DC voltage (which is
not the case when simple resistors are used).
SS/VDD
pins of the
18/42 Doc ID 16139 Rev 3
AN3029 Recommendations
6.5 Other signals
When designing an application, the following areas should be closely studied to improve
EMC performances:
● Noisy signals (clock)
● Sensitive signals (high impedance)
● Signals for which a temporary disturbance permanently affects operation of the
application, for example, interrupts and handshaking strobe signals (but not LED
commands).
A surrounding V
length or absence of noisy and sensitive traces (crosstalk effect).
For digital signals, the best possible electrical margin must be reached for the two logical
states. Slow Schmitt triggers are recommended for eliminating parasitic states.
trace for such signals increases EMC performances, as does a shorter
SS
6.6 Unused I/Os and features
Microcontrollers are designed for a variety of applications, where often a particular
application does not use 100 % of the microcontroller resources.
To avoid unnecessary power consumption (especially important for battery powered
applications) and also to improve EMC performance, unused clocks, counters, or I/Os,
should not be left free, I/Os should be forced externally (pull-up or pull-down to the unused
I/O pins), and unused functions should be ‘frozen’ or disabled.
Alternatively, unused I/Os can be programmed as push-pull ‘low’ to keep them at a defined
level without using external components. However in this case, the I/O is not driven during
the power up phase, until the I/O is configured. This can add a little extra power
consumption, and may be undesirable in very power sensitive applications.
6.7 User options
STM8L devices have user option features that can be used for remapping or
enabling/disabling an automatic reset or low speed watchdog. For more details, please refer
to the product datasheets.
6.8 Bootloader
STM8L15x and STM8L16x devices have a bootloader embedded in a ROM memory.
Through this firmware the device memory can be re-programmed via:
● USART communication interface for medium density devices
● USART1, USART2, USART3, SPI1, and SPI2 communication interfaces for medium+
and high density devices.
Doc ID 16139 Rev 3 19/42
Reference design AN3029
7 Reference design
7.1 Component references
Table 1. Component list
ID Component name Reference Quantity Comments
Refer to the ‘pinouts and pin description’
1 Microcontroller STM8L 1
2 Battery 1.65 V to 3.6 V 1 Min 1.8 V when BOR is enabled
3 Capacitor 1 µF n Decoupling capacitor
4 Capacitor 100 nF n Ceramic capacitor (decoupling capacitor)
Components below are optional
5 Capacitor 10 µF 1 Ceramic capacitor (decoupling capacitor)
6 Crystal 1 to 16 MHz 1
7 Capacitor 20 to 40 pF 2 Used for crystal
and ‘package characteristics’ sections of
the STM8L datasheets, to choose the right
package
Crystal 32 kHz 1
8 Capacitor 5 to 20 pF 2 Used for crystal
Ferrite bead Depends on noise to be filtered
9 SWIM connector 4 pins 1
20/42 Doc ID 16139 Rev 3
AN3029 Reference design
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Figure 11. Reference design
&OR NOISY
ENVIRONMENT
1. If these components are removed, they have to be replaced by a short connection.
2. Optional: if a separate, external reference voltage is connected on V
connected. V
3. One 100 nF Ceramic capacitor for each VDDx pin and one single 1 µF Tantalum or Ceramic capacitor.
is either connected to V
REF+
DDA
or V
REF.
Doc ID 16139 Rev 3 21/42
, the two capacitors (100 nF and 1 µF) must be
REF+
STM8 development tools AN3029
SWIM entry
100
kHz Osc
Internal RC
Comm
layer
CMD
decode
DM
STM8
core
Peripheral
NVM
RAM
DBG
8 STM8 development tools
Typically, the following tools are needed to get started:
● STVD for integrated development environment
● STM8 C compiler (from Cosmic, Raisonance, or IAR)
● ST toolset and STM8 firmware library from STMicroelectronics
(STM8L10x_StdPeriph_Lib for STM8L101 or STM8L15x_StdPeriph_Lib for STM8L15x
and STM8L16x).
● STM8 evaluation board from STMicroelectronics (STM8L101-EVAL for STM8L101,
STM8L1526-EVAL for medium density STM8L15x and STM8L1528-EVAL for high
density STM8L15x/STM8L16x).
● If you use STM8L101-EVAL, you also need the HW SWIM debug interface "Rlink" from
Raisonance and ST-Link or STice-SWIM. The debug interface ST-LINK is included in
STM8L1526-EVAL and STM8L1528-EVAL.
8.1 Single wire interface module (SWIM)
8.1.1 SWIM overview
In-circuit debugging mode or in-circuit programming mode are managed through a single
wire hardware interface based on an open-drain line, featuring ultra fast memory
programming. Coupled with an in-circuit debugging module, the SWIM also offers a nonintrusive read/write to RAM and peripherals. This makes the in-circuit debugger extremely
powerful and close in performance to a full-featured emulator.
The SWIM pin can be used as a standard I/O (with 8 mA capability) which has some
restrictions if the user wants to use it for debugging. The most secure way to use it is to
provide a strap option on the PCB. Please refer to the STM8 SWIM communication protocol
and debug module user manual (UM0470) for more SWIM protocol details.
Figure 12. Debug system block diagram
22/42 Doc ID 16139 Rev 3
AN3029 STM8 development tools
4
4
1
1
2
3
2
3
AD/ICC SWIM adapter
Application board
STM8
SWIM cable
V
DD
V
DD
SWIM connector
8.1.2 SWIM connector pins
The SWIM connector pins consist of four pins as described in Ta bl e 2 .
Table 2. SWIM connector pins
Pin number Pin name
Pin 1 V
DD
Pin 2 SWIM pin
Pin 3 V
SS
Pin 4 Reset
8.1.3 Hardware connection
Figure 13. Hardware connection
Caution: It is recommended to place the SWIM header as close as possible to the STM8L device, as
this minimizes any possible signal degradation caused by long PCB tracks.
Doc ID 16139 Rev 3 23/42
STM8 development tools AN3029
Connection flex
Connection adapter
Adapter socket
Emulation system
8.2 STice emulator
8.2.1 STice overview
The STice is a modular, high-end emulator system which connects to the PC via a USB
interface, and to the application board in place of the target microcontroller.
It is supported by the free STM8 toolset: IDE ST visual develop (STVD) programmer, ST
visual programmer (STVP) and STM8 assembler. Please refer to the STice emulator for
STM8 for more details.
STice has two distinct modes of operation which are described further in this section:
● Emulation mode
● In-circuit mode
It can also be used instead of RLink for SWIM connection.
Figure 14. Connection description
Emulation system: STice
● Emulator box
● Cables for USB, power supply, trigger, and analyzer input
Connection flex
● 60-pin or 120-pin cable for connection to the application board
Connection adapter
● Links the connection flex to the footprint of the STM8L microcontroller
Adapter socket
● Package-specific socket for connection adapter and STM8L microcontroller
24/42 Doc ID 16139 Rev 3
AN3029 STM8 development tools
8.2.2 STice in emulation configuration
In emulation configuration, the STice is connected to the PC via a USB interface and to the
application board in place of the target microcontroller being used.
● Connection flex: Flexible cable (60-pin or 120-pin depending on the target
microcontroller) that relays signals from the STice to the application board.
● Connection adapter: Links the connection flex to the footprint of the target
microcontroller on the users application board.
● Adapter socket: Socket that solders to the application board in place of the
microcontroller and receives the connection adapter.
The above accessories are not included with the STice system. To determine exactly what
is required for any supported microcontroller, refer to the online product selector on
www.st.com.
Figure 15. STice in emulation configuration
Doc ID 16139 Rev 3 25/42
STM8 development tools AN3029
8.2.3 In-circuit programming and debugging
In the in-circuit debugging/programming configuration, STice allows the application to be
programmed in the microcontroller and for the application to be debugged while it runs on
the microcontroller on the application board. STice supports the SWIM protocol, making it
possible to in-circuit program and debug the microcontroller using only one general purpose
I/O.
In both the emulation and the in-circuit programming/debugging configuration, STice is
driven by the ST visual develop (STVD) or ST visual programmer (STVP) integrated
development environment running on the host PC. This provides total control of advanced
application building, debugging and programming features from a single easy-to-use
interface.
Figure 16. In-circuit programming and debugging
8.3 RLink and STLink
RLink and STLink are debug tools that allow the STM8L evaluation board or any user
application board with the SWIM interface to be connected to a host PC via USB for
debugging and programming. See Section 10.3.3: Connecting the hardware on page 35.
26/42 Doc ID 16139 Rev 3
AN3029 STM8 software toolchain
9 STM8 software toolchain
To write, compile and run the first software on an STM8L device, the following components
of the software toolchain are required (see Figure 17):
● Integrated development environment
● Compiler
● Firmware library (optional, used to ease the startup)
Figure 17. STM8 software toolchain
Doc ID 16139 Rev 3 27/42
STM8 software toolchain AN3029
9.1 Integrated development environment
The integrated development environment ST visual develop (STVD) provides an easy-touse, efficient environment for start-to-finish control of application development, from building
and debugging the application code to programming the microcontroller. STVD is delivered
as part of the free ST toolset, which also includes the ST visual programmer (STVP)
programming interface and the ST assembler linker.
To build applications, STVD provides seamless integration of C and assembly tool chains for
ST including the Cosmic and Raisonance C compilers and the ST assembler linker. When
debugging, STVD provides an integrated simulator (software) and supports a complete
range of hardware tools including the low-cost RLink in-circuit debugger/programmer, the
high-end STice emulator, and the low-cost ST-LINK tool.
To program applications to an STM8L, the STVD also provides an interface for reading from
the microcontroller memories, writing to them and verifying them. This interface is based on
the ST visual programmer (STVP), and supports all the target devices and programming
tools supported by STVP.
The free ST toolset for STM8 is available from STMicroelectronics homepage (see
www.st.com).
9.2 Compiler
STM8L devices can be programmed by a free assembler toolchain which is included in the
ST toolset.
As the core is designed for optimized high-level-language support, use of a C compiler is
recommended!
C compilers for STM8 are offered by the third party companies Cosmic, Raisonance, and
IAR.
A free version of the C compiler with up to 32 Kbytes of generated code is available at:
www.cosmic-software.com and www.raisonance.com.
9.3 Firmware library
The STM8 firmware library is a complete set of source code examples for each STM8
peripheral. It is written in strict ANSI-C and it is fully MISRA C 2004 compliant.
All examples can be used with four workspace and project definition files, one for STVD and
Cosmic C compiler, one for STVD and raisonance Compiler, one for Raisonance integrated
debugging environment and compiler (RIDE7 IDE), and one for IAR embedded workbench
for STM8 (EWSTM8). This enables the user to load and compile them easily into their
preferred development environment.
The examples run on the STMicroelectronics STM8L evaluation board and can be tailored
easily to other types of hardware.
For additional information and download of the STM8L firmware library connect to
www.st.com/mcu.
28/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
10 Setting up the STM8 development environment
10.1 Installing the tools
All software tools are delivered with a setup wizard which guides the user through the
installation process. It is recommended to install the tools in the following order:
1. C compiler
2. ST toolset
3. STM8 firmware library
ST-LINK does not need any dedicated software installation in the STM8 development
environment because the necessary drivers are delivered with the ST toolset.
The R-link drivers must be launched separately as follows:
Start/Programs/STtoolset/Setup/Install Rlink driver.
Doc ID 16139 Rev 3 29/42
Setting up the STM8 development environment AN3029
10.2 Using the tools
Once the tools installation is complete, the ST visual develop (STVD) integrated
development environment can be launched.
The user then has the choice to generate either a new workspace with a new project or to
open an existing workspace. If using the STVD for the first time, it is recommended to open
an existing project from the STM8 firmware library.
Note: Even if you are not intending to use the library, an existing library project can be used as a
template to configure all the compiler options. Enter your own code after main().
The STM8 firmware library includes several examples for each peripheral plus one
workspace containing a blank project which is ready to receive your C code. It is located in
the firmware subdirectory \Project\Template (see Figure 18). You can choose between
STVD\Cosmic, STVD\Raisonance, RIDE, or EWSTM8.
Figure 18. STVD open example workspace
30/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
10.2.1 Project editing
All project source files are visible and can be edited (see Figure 19).
Figure 19. STVD MCU edit mode
Doc ID 16139 Rev 3 31/42
Setting up the STM8 development environment AN3029
10.2.2 Online help
An online help manual is available inside the firmware installation directory (see Figure 20)
to help the user understand the structure of the STM8 firmware library.
Figure 20. STM8 firmware library online help manual
32/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
10.3 Running the demonstration software
● Go to www.st.com/mcu and search for STM8L products
● Choose STM8L1x-EVAL, STM8L1526-EVAL, or STM8L1528-EVAL firmware
● Open the desired project workspace within the chosen demonstration firmware
package.
To run the demonstration software on the STM8 evaluation board, the project has to be
compiled and the correct HW tool must be selected before the debug session can be
started.
10.3.1 Compiling the project
The project can be compiled using the ‘Build’ function in the ‘Build’ menu (see Figure 21).
Figure 21. STVD: Building the project
Doc ID 16139 Rev 3 33/42
Setting up the STM8 development environment AN3029
10.3.2 Selecting the correct debug instrument
In the example below, the Rlink tool is used for communicating via the SWIM interface with
the on-board debug module of the STM8.
The Rlink tool can be selected from the ‘Debug Instrument Selection’ list in the ‘Debug
Instrument Settings’ dialog (see Figure 22).
Figure 22. STVD: Selecting the debug instrument
34/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
10.3.3 Connecting the hardware
The debug tool, STLink, is included on the STM8L1526-EVAL and STM8L1528-EVAL
boards. You can connect the PC to the USB connector. This connection ensures the debug
connection and the power. If the jumpers on the boards are no longer in the default position,
please read the evaluation board user manuals to select power and debug support jumpers.
For the STM8L101-EVAL, the Rlink tool can be connected to the PC by a standard USB
connection. It is also powered by the USB interface. On the controller side, the connection to
the STM8 evaluation board is made using the SWIM interface cable. The STM8L101-EVAL,
evaluation board is powered by an external 5 V supply (see Figure 23).
Figure 23. Connecting the debug instrument to the STM8L101-EVAL evaluation
board
Doc ID 16139 Rev 3 35/42
Setting up the STM8 development environment AN3029
Figure 24. Connecting the debug instrument to the STM8L152x-EVAL evaluation
board
Caution: On the Rlink adapter board for STM8, the “SWIM” jumper must be set. If there is no pull-up
on the application SWIM line, the “ADAPT” jumper is also set. The “PW-5V” and “12MHz”
jumpers must not be set.
36/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
10.3.4 Starting the debug session
Debug mode can be entered by the command ‘Debug Start Debugging’ (see Figure 25).
Figure 25. STVD: Starting the debug session
Doc ID 16139 Rev 3 37/42
Setting up the STM8 development environment AN3029
10.3.5 Running the software
After entering debug mode, the software can be started by the run command in the menu ‘Debug Run’
(see Figure 26).
Figure 26. STVD: Run the software
38/42 Doc ID 16139 Rev 3
AN3029 Setting up the STM8 development environment
The LCD display on the STM8 evaluation board indicates a successful debug session (see
Figure 27).
Figure 27. STM8 evaluation board
10.3.6 Follow up
Step by step, additional peripherals of STM8L devices can be run, following on from the
initial debug session described above.
Many features of STM8L devices are supported by dedicated hardware on the STM8
evaluation board. The necessary software drivers, including STM8L peripheral drivers
(USART, ADC, SPI) and drivers for the EVAL board modules (LCD, serial memory), are
delivered in the STM8L1x firmware library.
Doc ID 16139 Rev 3 39/42
Documentation and online support AN3029
11 Documentation and online support
Documentation resources related to tool usage includes:
Application
● STM8L101, medium density STM8L15x, medium+ and high density STM8L15x and
STM8L16x datasheets.
● How to program Flash memory and data EEPROM on STM8L microcontrollers
(PM0054).
● STM8L101, STM8L15x and STM8L16x reference manuals
● STM8 CPU programming manual (PM0044)
Tools
● STM8L101, STM8L15x, and STM8L16x firmware library and release note (detailed
descriptions of the library are included as help files).
● STice advanced emulation system for ST microcontrollers data briefing
● STice user manual
● Cosmic, Raisonnance, or IAR C compiler user manual
● STM8L101-EVAL, STM8L1526-EVAL, or STM8L1528-EVAL evaluation board user
manual.
● STM8L1x-EVAL, STM8L1526-EVAL, or STM8L1528-EVAL firmware
● ST visual develop tutorial (included as help files in the ST-toolchain)
● ST visual develop (STVD) user manual
● STM8 SWIM communication protocol and debug module user manual (UM0470)
The microcontroller discussion forum on www.st.com can be used by developers to
exchange ideas. It is the best place to find different application ideas. In addition, the
website has a knowledge base of FAQs for microcontrollers, which provide answers to many
queries and solutions to many problems.
40/42 Doc ID 16139 Rev 3
AN3029 Revision history
12 Revision history
Table 3. Document revision history
Date Revision Changes
09-Sep-2009 1 Initial release
Updated all sections and references for medium density, medium+
density and high density devices.
Added STM8L16x devices.
16-Sep-2010 2
07-Mar-2011 3
Replaced V
DDIO
and V
Replaced 48-pin package by “some packages”.
Added IAR C compiler.
Section 2.1: Power supply overview: updated text.
Figure 1: added note 2; removed the + sign on the VLCD cappa.
Crystal/ceramic resonator: added reference to AN2867.
Section 3.2: Analog input: updated text.
Section 4.3.2: LSE clock: re-arranged section.
Section 5.1: Reset management overview: removed bullet
“electromagnetic susceptibility (EMS) reset (present only on STM8S
family).
Figure 7: removed EMS reset; added external reset circuit.
Section 5.2: Hardware reset implementation: added text about the
pull-down capacitor.
Table 1: Component list: updated “comment” information for ID
number 2 (battery); added ID number 5 (ceramic capacitor).
Figure 11: added external reset circuit and note 1.
Section 9.2: Compiler: updated “16 Kbytes” with “32 Kbytes” of
generated code.
Section 9.3: Firmware library: updated text explaining the workspace
and project definition files.
Section 10: Setting up the STM8 development environment:
removed introductory text.
Section 10.2: Using the tools: added EWSTM8.
Figure 1: updated figure content and footnotes.
Section 2.1: Power supply overview: updated bullet points.
Section 3.1: Analog power: updated bullet point concerning V
Section 6.4: Decoupling: updated value of the pool capacitor to 1 µF
(instead of 100 µF).
Figure 11: updated figure content and footnotes.
Section 8: STM8 development tools: updated bullet point 5 regarding
STM8L101-EVAL.
Section 9.1: Integrated development environment: added the low-
cost ST-Link tool in the list of hardware tools supported by STVD.
SSIO
by V
DDx
and V
respectively.
SSx
REF+
.
Doc ID 16139 Rev 3 41/42
AN3029
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