TS4657 single supply stereo digital audio line driver
Introduction
This application note focuses on the TS4657 demonstration board, designed to evaluate
STMicroelectronics’ TS4657 device.
This document provides:
■ a brief description of the TS4657 device.
■ a description of the demonstration board and all of its components.
■ the layout of the demonstration board.
Figure 1.TS4657 demonstration board
July 2009Doc ID 15911 Rev 11/12
www.st.com
About the TS4657AN3001
1 About the TS4657
The TS4657 is a stereo digital-to analog-converter (DAC) that integrates a highperformance audio line driver capable of generating a 2.2 Vrms output level from a single
3.0 to 5.5 V supply.
One single supply is sufficient for the digital and analog parts of the circuit, thus eliminating
the need for external regulators.
The TS4657 is a low-power consumption device. It features only 22 mW power dissipation
at a 3.0 V power supply in full operation.
A 16-bit multi-bit sigma delta DAC is used, operating at 256xFs with oversampling digital
interpolation filters. The digital audio data can be 16- to 24-bit long and sample rates from
32 to 48 kHz are supported.
The output stage signal is ground-referenced by using an internal self-generated negative
power supply, and as such external bulky output coupling capacitors are not necessary.
The TS4657 features the following.
●Power supply range: 3.0 V to 5.5 V.
●Audio line output: 2.2 Vrms for all V
●16- to 24-bit audio data format stereo DAC, 32 to 48 kHz sample rate.
●I²S, right- or left-justified compatible digital audio interface.
●95 dB SNR A-weighted at 48 kHz, V
●Low current consumption of 7.4 mA at V
●Internal negative power supply to ensure ground-referenced, capless outputs.
●No necessity for an external capacitor for negative power supply generation.
●Integrated structure to suppress pop and click noise
●Standby mode active low.
●QFN20 package, 4mmx4mm,500µm pitch.
range.
CC
CC
=5V.
= 3.0 V, full operation.
CC
Refer to the datasheet entitled "Single supply stereo digital audio line driver with 2.2 Vrms capless outputs" for complete information on the TS4657.
2/12 Doc ID 15911 Rev 1
AN3001Description of the demonstration board
2 Description of the demonstration board
The TS4657 demonstration board has been designed for evaluation purposes. The TS4657
device is soldered on a two-layer PCB.
Some key features of the TS4657 can be directly controlled through connectors or jumpers
on the demonstration board (Tab l e 1 ).
Table 1.Demonstration board connectors
ConnectorDescription
J1MCLK: master clock input
J2BCLK: bit clock input
J3SDAT: serial data input
J4LRCLK: left right clock input (channel selector input)
J5
Power supply connector (V
3.0 to 5.5 V.
J6Left audio output
J7Right audio output
Allows selection of level on Format1 pin. Format1 and Format2 pins select the digital
input format (see section 4.1.2Digital audio input format in the TS4657 datasheet).
JP1
If the jumper is removed, it is possible to control the Format1 by an external logic
signal (see section 3.3 DAC and output stage performances in the TS4657
datasheet).
and GND). Power supply voltage of the TS4657 from
CC
Allows selection of level on Format2 pin. Format1 and Format2 pins select the digital
input format (see section 4.1.2Digital audio input format in the TS4657 datasheet).
JP2
If the jumper is removed, it is possible to control the Format2 by an external logic
signal (see section 3.3 DAC and output stage performances in the TS4657
datasheet).
Controls the chip standby (JP1:1-2 = circuit activated, 2-3 = circuit in standby mode).
JP3
If the jumper is removed, it is possible to control the standby by an external logic
signal (see section 3.3 DAC and output stage performances in the TS4657
datasheet).
JP4
JP5
JP6
JP7
Caution:When you apply the power supply through J5, do not invert the polarity as doing so will
Allows connection of the C6 capacitor (used for the left output filter;
see Section 3.3: Output filters on page 6).
Allows short-circuiting of the R5 resistor (used for the left output filter; see
Section 3.3: Output filters on page 6).
Allows connection of the C7 capacitor (used for the right output filter; see
Section 3.3: Output filters on page 6).
Allows short-circuiting of the R7 resistor (used for the right output filter; see
Section 3.3: Output filters on page 6).
damage the chip.
Doc ID 15911 Rev 13/12
Description of the demonstration boardAN3001
Figure 2.Schematic diagram
VCCA
Digital
input
SDAT
MCLK
LRCLK
BCLK
VCCD
C2
2
Control
interface
1uF
nc20nc
Digital
audio
interface
3v to 5V5
VCC
GND
J5
J4
J3
J2
J1
VCCDVCCA
10 uF/6V3
C1
R1
100KR2100KR3100KR4100K
3
LRCLK
4
SDAT
5
BCLK
6
MCLK
19
VCCD
13
Digital
filters
and
DACs
C3
1uF
VCCA
18
TS4657
C4
1uF
VREGD
C5
1uF
14
VREGA
VOUTL
VOUTR
IC1
820
820
R5
R7
12
11
C6
2nF2
JP4
R6
nc
JP5
JP7
R8
JP6
nc
C7
2nF2
J6
SIP2
OUT L
OUT R
J7
SIL2
VCCD
123
JP1
FORMAT18FORMAT2
/STDBY
9
7
123
123
JP2
JP3
Format2Format1/Stdby
GNDD
1
GNDD
17
GNDA
10
GNDA15GNDA
16
Epad
User control
Table 2.Component list for the demonstration board
NameQuantityDescription
C1110 µF/6.3 V +/-20 %, SMD electrochemical capacitor