ST AN2870 APPLICATION NOTE
AN2870
Application note
L6585DE combo IC
Introduction
The modern requirements for fluorescent lamp electronics ballast concerns both efficiency
of the drivers and safety aspects.
The L6585DE offers the designer a high performance PFC stage, high capability half bridge
high voltage drivers, a fully programmable control and an enhanced set of protections.
Figure 1. Typical electronic ballast block diagram
March 2009 Rev 1 1/41
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Contents AN2870
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Typical configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Lamp requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 L6585DE combo IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Device blocks description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Start-up and shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 PFC section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.1 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.2 Multiplier block and THD optimizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.3 Current comparator and choke saturation detection . . . . . . . . . . . . . . . 11
3.2.4 Zero current detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2.5 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2.6 PFC protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Ballast controller section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.1 Oscillator and timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.2 Overcurrent control and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3.3 End of life detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.4 Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4 Designing with L6585DE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 PFC stage design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Ballast stage design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.3 PCB hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2/41
AN2870 List of figures
List of figures
Figure 1. Typical electronic ballast block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Start-up and shut-down waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. PFC section block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. PFCCS pin waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Protections block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Oscillator and starting sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Current control sequence during ignition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. HBCS thresholds summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Window comparator for rectifying effect detection (Cblock to GND). . . . . . . . . . . . . . . . . . 17
Figure 11. Window comparator for rectifying effect detection (lamp to GND) . . . . . . . . . . . . . . . . . . . 19
Figure 12. Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 13. PFC MOSFET losses (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 14. Multiplier characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 15. (A) voltage frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 15. (B) current frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 16. Oscillator characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 17. (A) k parameter versus Cosc (pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 17. (B) e parameter versus Cosc (pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 18. EOL - Cblock to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 19. EOL - lamp to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 20. Current consumption vs PFC frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3/41
Introduction AN2870
1 Introduction
1.1 Typical configuration
Typical fluorescent lamp electronic ballasts are composed by (Figure 1):
● An input PFC section, if input power is greater than 25 W, usually a TM PFC converter,
that generates a DC output voltage and absorbs power from mains with very high
Power Factor (typically 0.95 or grater) and very low THD (mandatory less than 10%).
● A high frequency half bridge driver, fed by the PFC output, with internal or external
oscillator, a timer and various protections in order to drive correctly the lamp, to avoid to
deliver an excessive power to the lamp and to detect any malfunction of the lamp
(broken lamp, broken cathode or lamp absence)
● An output resonant stage, realized by reactive components (capacitors and inductors),
that, together with the half bridge driver, optimizes the power delivered to the lamp (one
or more) during all working conditions (preheating, ignition and run mode).
1.2 Lamp requirements
Fluorescent lamp, during its normal operation, has to be supplied by means of alternative
and controlled current. In order to reduce the size of the ballast and increase the light
efficiency of the lamp a frequency greater than 20 kHz is typically used. A half bridge quasi
resonant inverter (series-parallel converter Figure 1) is used to obtain sinusoidal current into
the lamp and to reduce the power dissipation of the half bridge switches, in fact zero voltage
switching is achieved.
Lamp current and lamp voltage during normal operation are reported in lamp documentation
and are to be considered as design specification. Moreover, a well preheated lamp ignites at
a lower voltage; this implies a longer lamp life and a greater number of ignitions. The
efficiency of the preheating is mainly related with the total energy delivered to the cathode
(reported on lamp documentation), and then it depends on the time available for this
operation: keeping constant the preheating energy, longer is the preheating time, smaller is
the instantaneous power delivered to the cathode. During the preheating operation the
voltage across the lamp must be kept below a specified value in order to avoid unwanted
ignitions (when these happen, the lamp experiences multiple re-strike and dissipates large
amounts of power).
There are many ways to deliver power to the cathode, but the most used are two:
1. Current controlled preheating: the cathodes are interposed between the choke and the
resonant capacitor so they experience the same current of the resonant LC circuitry. An
efficient preheating is obtained controlling this current and the time of preheating. The
advantages of this method are the cheapness and easiness of design; it has also some
disadvantages, namely the difficulty of keeping low the lamp voltage during preheating
and the fact that during steady state the cathode experiences the sum of the lamp
current and of the resonant capacitor current.
2. Voltage controlled preheating: the current into the cathodes is generated by auxiliary
windings coupled with ballast choke or driven by an auxiliary oscillator. This implies
that, in any case, the design of the preheating circuitry is somewhat independent from
the design of the LC circuitry, even if it requires a lot of external components. This
method is then more efficient, but is cheaper and more difficult to design.
4/41
AN2870 Introduction
After a good preheating, the voltage across the lamp is suddenly increased in order to
generate a strike inside the tube and ignite the lamp. This phase should last between 10 ms
and 100 ms.
The strike voltage depends on various parameters, many of which cannot be exactly
evaluated: preheating energy, remaining lamp life, number and efficiency of the past
ignitions. An insufficient preheating causes greater ignition voltage and a subsequent stress
of the cathodes that lose small amounts of material that darken the region of the tube near
to the cathode itself (sputtering).
Lamp ageing is related with the symmetrical or, more often, asymmetrical increasing of the
cathodes resistance. A symmetrically aged lamp absorbs more power causing hard
switching and over-current. Asymmetrically aged lamps experience a current that is more
intense in one direction than in the other. This implies that the current flowing into the lamp
has positive or negative mean value (DC component). This effect can be detected
measuring the mean values of the lamp voltage that should be zero in normal lamps. The
worst case of rectifying effect causes the current flowing only in one direction: the voltage
across the resonant capacitor can reach very high values and heavy hard switching is
detected.
When symmetrical or asymmetrical ageing of the lamp reaches a value indicated in
international norms, the lamp reaches its end of life (EOL).
5/41
L6585DE combo IC AN2870
2 L6585DE combo IC
The L6585DE embeds both a PFC converter and a ballast regulator in a single SO20
package. It is intended to design complete high power electronic ballasts with a single chip.
● The most significant features of the L6585DE concern the following points:
● Transition mode PFC converter with over voltage and over current protection.
● Half-bridge controller with High voltage driver (600 Vdc) and integrated bootstrap
diode.
● 3% precise, fully programmable oscillator.
● Flexibility in programming preheating time and ignition time.
● Configurable EOL detection and over current protection.
● Hard switching detection.
The PFC section achieves current mode control operating in Transition Mode. The multiplier,
together with the internal THD optimizer, reduces input current distortion, and allows
reaching very high performances also in wide-range-mains operation and large load range.
The PFC output voltage is controlled by means of a voltage-mode error amplifier and a
precise internal voltage reference.
A static and dynamic OVP protects the IC from excessive output voltage and an over current
protection turns off the PFC gate driver in case of PFC choke saturation.
The PFC driver is able to provide 300 mA (source) and 600 mA (sink).
The half bridge section is driven by a current controlled oscillator (CCO) and the internal
control logic.
The steady state frequency, the preheating frequency, the pre-heating time, the over-current
protection time and the ignition time are independently set by means of six external
components (resistors and capacitors).
An over-current protection limits the voltage across the HBCS pin acting directly on the CCO
realizing a precise closed loop control. This control lasts for a time set by the Tch pin and,
after that, if the fault condition is still present, the IC is stopped in low consumption mode.
The HBCS voltage amplitude depends on actual operating mode, then this protection can
detect either a broken lamp during ignition (in this case the current regulation implies the
lamp voltage regulation) or the symmetrical ageing of the lamp during run mode.
An internal window comparator can be simply configured setting the window amplitude or
the comparator reference in order to detect the EOL status. The programmability of
comparator reference makes the L6585DE compliant with either “lamp-to-ground” (fixed
reference) or “block capacitor-to ground” (tracking with CTR) configurations.
The drivers of the half-bridge provide 290 mA source and 480 mA sink.
6/41
AN2870 L6585DE combo IC
Figure 2. Block diagram
7/41
Device blocks description AN2870
3 Device blocks description
3.1 Start-up and shut-down
During start-up the chip is supplied through a resistive path from the rectified AC Mains
voltage whereas, during normal operation, a self-supply source is recommended: a charge
pump, an auxiliary winding coupled either with PFC choke or resonant choke, or an auxiliary
converter.
As the voltage at Vcc pin reaches the turn-on threshold (Vcc
, Figure 3-A), the chip is
ON
enabled and (unless a lamp absence is detected) the Half-Bridge and the PFC sections
start at the same time (independently):
● The PFC section, as the synchronization signal at pin ZCD is not yet generated by the
external ZCD circuit, is forced to switch by internal starter (f
= 6 kHz (typ)) for the
starter
first few switching cycles, until the control loop operates correctly at a frequency higher
than f
● The oscillator starts switching at a preheating frequency set by values of C
and R
At shut-down (Figure 3-B), when the V
starter
PRE
.
, R
OSC
RUN
.
decreases below the UVLO threshold (either in
CC
case of mains removal or in case of fault):
● All drivers are off;
● EOI pin is discharged (the internal switch is on);
● RF reference is disabled;
● Tch is discharged.
8/41
AN2870 Device blocks description
Figure 3. Start-up and shut-down waveforms
A) Start-up
B) Shut down
9/41
Device blocks description AN2870
3.2 PFC section
3.2.1 Error amplifier
The error amplifier (E/A, Figure 4) is used to close the output voltage control loop. Its non
inverting input is connected to a precise voltage reference (2.52 V), the inverting input and
the output are externally available (pin 10 –INV; pin 9 – COMP).
The compensation network, placed between pins INV and COMP, is needed to reject the
mains ripple.
The E/A output dynamic is internally clamped: it can swing between 2.25 V and 4.2 V in
order to speed up the recovery after the E/A saturates low due to an over-voltage (static
OVP) or saturates high because of an over-current.
Figure 4. PFC section block
3.2.2 Multiplier block and THD optimizer
The multiplier (Figure 4) gives the sinusoidal voltage reference to the current sense in order
to absorb from the mains a sinusoidal current. This current will be function of both input
voltage and load current then this block has two inputs: the first one (Pin MULT – 8) takes a
partition of the instantaneous rectified line voltage and the second one (Pin COMP – 9) is
the output of the E/A.
An internal voltage clamp (1 V) sets the maximum allowed voltage of the multiplier output,
then it act as PFC current limiter.
When the rectified input voltage reaches 0 V the boost inductor cannot store enough energy
to discharge the input capacitor: this event increases the THD. In order to avoid this
additional distortion, a THD optimizer block is placed between the output of the multiplier
and the current sense comparator.
The characteristic curves of the multiplier block are reported in Figure 14.
10/41
AN2870 Device blocks description
3.2.3 Current comparator and choke saturation detection
The current comparator senses the voltage across the current sense resistor (R
pfccs
) and,
by comparing it with the programming signal delivered by the multiplier, determines the
exact time when the external MOSFET has to be switched off.
When PFC MOSFET is turned on, parasitic drain capacitances are discharged and an
intense current spike can be seen by PFCCS (Figure 5). In past solutions, an RC filter
between sense resistor and current sense input was commonly used to reject these spikes,
but it introduced a delay between the instant the current crosses the threshold and the
actual activation of internal comparator. This delay may cause the inductor saturation, then
an over dimensioned inductor had to be used. In L6585DE, an internal leading edge
blanking structure (LEB) masks the first 200 ns of the PFC gate at the time current spikes
occurs; the filter is no longer necessary and the inductor can be smaller and lighter. On the
other hand this LEB limits the maximum available “ON time”.
Moreover, the device is provided with a second comparator on the PFC current sense pin
that turns off immediately the PFC MOSFET if the voltage on the pin, normally limited within
1.0 V, exceeds 1.7 V. A current peak limiting control is therefore achieved avoiding MOSFET
overheating in case of boost inductor’s hard saturation. In this case the current up-slope
becomes so large (50-100 times steeper) that during the current sense propagation delay
the current may reach abnormally high values.
Figure 5. PFCCS pin waveforms
11/41
Device blocks description AN2870
3.2.4 Zero current detection
The zero current detection (ZCD) block switches on the external PFC MOSFET as the
current through the boost inductor has gone to zero. This feature allows TM operation.
When the circuit is running, the signal for ZCD is obtained with an auxiliary winding coupled
with the boost inductor. A Schmidt trigger prevents false activations and an internal clamp
limits the voltage across the pin during normal operation in 0 V-5 V range. As at start-up no
signal is coming from the ZCD, an internal starter is needed in order to turn on the external
MOSFET and to arm the ZCD trigger.
The repetition rate of the starter is ≅ 6 kHz and this maximum frequency must be taken into
account at design time.
3.2.5 Driver
A totem pole buffer, with 300 mA source and 600 mA sink capability, allows driving an
external MOSFET. A pull-down circuit holds the output low when the device is in UVLO
conditions, to ensure that the external MOSFET cannot be turned on accidentally.
3.2.6 PFC protections
The device is provided with a double over-voltage protection (OVP).
The first over voltage protection, also called dynamic OVP, is activated immediately when
CTR pin (pin 7) goes above 3.4 V. The maximum voltage allowed for the output voltage
(V
) is defined by a resistive divider connected between output voltage and CTR pin.
OVP
In case of over voltage, the output of the E/A will tend to saturate low with a long constant
time, because of the bandwidth of this stage (typ. 10 Hz).
If the over-voltage lasts so long that the output of E/A goes below 2.25 V, the PF gate driver
is stopped and Tch timer is started. If E/A output voltage doesn’t return above 2.25 V after
the timer finishes its count, the IC is stopped in latch condition. This protection prevents
damages due to the connection to an excessive input voltage.
An intense high voltage (e.g. a surge) may break the upper resistors (one or more than one)
of the voltage dividers connected to input voltage (MULT biasing) or to output voltage (INV
and CTR biasing). Losing of the bias on pin INV implies losing of the control of the loop: in
fact E/A output saturates high and causes an increased output voltage, eventually not seen
by OVP because of failure on CTR voltage divider. The feedback disconnection protection
prevents this failure stopping the PF gate if INV voltage falls below 1.2 V and CTR pin goes
above 3.4 V. CTR pin can be also used to disable the IC pulling its voltage below 0.8 V.
Figure 6. Protections block diagram
12/41
AN2870 Device blocks description
3.3 Ballast controller section
3.3.1 Oscillator and timer
The half bridge driver oscillation is regulated by a current controlled oscillator (CCO): it
needs a capacitor connected to OSC pin (pin 1) and uses the current flowing outside RF pin
(pin 2) as reference.
The RF pin has a 2 V precise voltage reference that let the designer fix the run mode
frequency simply connecting a resistor between RF pin and GND (Rrun).
The EOI pin (pin 3) is driven by the internal logic in order to set the frequency during the
preheating and to control the lamp current during an over-current event in the half bridge.
Preheating frequency is set by the parallel of Rrun and a resistor (Rpre) placed between RF
and EOI: in fact during the preheating the EOI pin is pulled to GND.
TCH pin is connected to the parallel of a resistor (R
) and a capacitor (CD) and is used in
D
order to define the preheating time and the protection time; its cycle (Tch cycle) is
composed by the following steps:
1. A 31 μA current generator charges the C
2. When TCH voltage reaches 4.63 V, the TCH pin is left in high impedance status and C
is discharged by R
,
D
causing TCH voltage to rise linearly,
D
D
3. When TCH voltage reaches 1.5 V the cycle finishes and an internal resistor pulls down
the TCH pin to GND.
Figure 7. Oscillator and starting sequence
13/41
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