ST AN2862 APPLICATION NOTE

AN2862

Application note

Demonstration board user guidelines for the TS2007FC 3 W filter-free class D audio amplifier with 6-12 dB fixed gain select

Introduction

This application note concerns the TS2007FC demonstration board, designed to evaluate the class D audio differential amplifier TS2007FC.

This document provides:

a brief description of the TS2007FC device.

a description of the demonstration board and all of its components.

the layout of the demonstration board.

About the TS2007FC

The TS2007FC is an audio power class D amplifier that can drive up to 1.4 W into an 8 Ω load at 5 V. It achieves better efficiency compared to a typical class AB audio power amplifier.

This device allows switching between two different gains: 6 or 12 dB via a logic signal on the GS pin. Pop and click reduction circuitry provides low on/off switch noise while allowing the device to start within 1 ms. A standby function (active low) reduces the current consumption to 1 μA typical. The TS2007FC also integrates an output short-circuit protection mechanism and thermal shutdown protection to avoid damage to the amplifier.

Key features of the TS2007FC

Operating range from VCC = 2.4 to 5.5 V.

Standby mode active low.

Output power: 1.4 W at 5 V or 0.5 W at 3.0 V into 8 Ω with 1% THD+N maximum.

Output power: 2.3 W at 5 V or 0.75 W at 3.0 V into 4 Ω with 1% THD+N maximum.

Two fixed gain selects: 6 or 12 dB.

Low current consumption.

Efficiency: 88% typical.

Signal-to-noise ratio: 90 dB typical.

PSRR: 68 dB typical at 217 Hz with 6 dB gain.

PWM base frequency: 280 kHz

Low pop and click noise.

Thermal shutdown protection.

Output short-circuit protection.

Flip-chip lead-free 9-bump package.

Refer to the datasheet for complete information on the TS2007FC.

February 2009

Rev 1

1/7

www.st.com

Description of the evaluation board

AN2862

 

 

1 Description of the evaluation board

The TS2007FC demonstration board is designed for the TS2007FC class D audio differential amplifier. The TS2007FC device, in a flip-chip package, is mounted on a twolayer PCB. Easily-accessible connectors on the board allow changing or driving the gain select and standby control pins, as well as changing the input configuration of the TS2007FC.

The TS2007FC’s gain can be set to either 6 or 12 dB via the P1 connector (see Table 1).

The input configuration is either capacitor-coupled or common-mode feedback. On the evaluation board, the JP3 and JP4 connectors allow you to change the input configuration.

In the capacitor-coupled configuration, the -3 dB cut-off frequency in Hz is:

1

=

1

 

2----π-----------Z---in------------C----1-

2----π-----------Z----in-----

------C----2-

 

with Zin in Ω (Zin = 75 kΩ typically), C in Farads and C1 = C2.

More information about component calculations is available in the TS2007FC datasheet.

Table 1. Evaluation board connectors

Connector(s) Description

JP1

Input signal connector (GND, In+, In-, GND).

 

 

JP1

Output signal connector (GND, Out-, Out+, GND).

 

 

 

Input configuration:

JP3, JP4

– capacitor-coupled when JP3 and JP4 are open.

 

– common-mode feedback when JP3 and JP4 are shorted by jumpers.

 

Gain select control connector:

 

1

2

3

pins 1 and 2 are shorted or pin 2 is floating, the gain is 6 dB.

 

 

 

`

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

 

 

3

pins 2 and 3 are shorted, the gain is 12 dB.

 

 

 

`

 

 

 

 

P1

The connector pins are connected as follows:

1 to VCC

2 to GS of the TS2007FC

3 to GND

 

Standby control connector:

 

 

 

 

 

 

pins 1 and 2 are shorted, the TS2007FC is in operation mode.

 

1

2

3

 

 

 

`

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

 

 

3

pins 2 and 3 are shorted, the TS2007FC is in standby mode.

 

 

 

`

 

 

 

 

P2

The connector pins are connected as follows:

1 to VCC

2 to STANDBY of the TS2007FC

3 to GND

JP5

Power connector (VCC and GND). Power supply voltage from 2.4 to 5.5 V.

Caution: When you apply the power supply through JP5, do not invert the polarity since this will irreversibly damage the U1 amplifier.

2/7

ST AN2862 APPLICATION NOTE

AN2862

Description of the evaluation board

 

 

Figure 1. Schematic diagram

 

 

 

 

VCC

 

VCC

JP5

 

 

 

 

 

 

P1

 

 

 

 

 

 

 

 

 

 

1

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP3

 

3

C3

 

 

 

 

 

 

 

 

 

 

 

1uF

 

 

 

 

 

 

 

 

1 2

 

 

 

 

 

 

 

 

 

 

 

 

 

A2

B1

 

B2

TS2007

 

 

 

 

 

C1

 

U1

 

 

 

 

 

 

 

 

 

GS

Vcc

Vcc

 

 

 

 

 

JP1

 

 

 

 

JP2

 

GND

1

220nF

C1

IN-

-

 

 

OUT+

C3

1

GND

IN-

2

 

Gain

 

 

H

 

2

OUT+

 

 

 

PWM

 

IN+

3

C2

A1

Select

+

Bridge

A3

3

OUT-

 

 

GND

4

 

IN+

 

 

OUT-

 

4

GND

 

 

 

 

 

 

 

 

220nF

 

Standby

Oscillator

Protection

 

 

 

 

 

 

 

Control

 

 

 

Circuit

 

 

 

 

 

 

 

Standby

Gnd

 

 

 

 

 

 

1 2

 

C2

 

B3

 

 

 

 

 

 

 

JP4

 

VCC

 

 

 

 

 

 

 

 

 

P2

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

Table 2.

Component list for the demonstration board

Designation

Quantity

Description

 

 

 

C1, C2

2

220 nF/16 V, SMD ceramic capacitors, 0603

 

 

 

 

 

C3

1

1 µF/16 V, SMD ceramic capacitor, 0603

 

 

 

JP1, JP2

2

4-pin header 2.54 mm pitch

 

 

 

JP3, JP4, JP5

3

2-pin header 2.54 mm pitch

 

 

 

P1, P2

2

3-pin header 2.54 mm pitch

 

 

 

 

 

U1

1

TS2007EIJT

 

 

 

 

3/7

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