ST AN2821 Application note
AN2821
Application note
Clock/calendar implementation
on the STM32F10xxx microcontroller RTC
The internal RTC (real-time clock) of the 32-bit, ARM® Cortex™-M3-based medium-density
STM32F10xxx microcontroller is an independent timer. It provides a set of continuously
running counters, which, using suitable software, can be used to implement a clock/calendar
function. The RTC and backup registers are supplied through a switch that draws power
from either the V
when the main supply is switched off.
This application note gives an example of how to implement the clock/calendar functionality
using the medium-density STM32F10xxx microcontroller in low-power and standard
applications. The firmware example also performs leap year counting and tamper time
stamping. It provides a low-power mode demonstration and a basic RTC calibration routine
to compensate for crystal and temperature variations.
The STM3210B-EVAL board supports the firmware example described in this application
note without any modification to its hardware.
Figure 1. STM3210B-EVAL board
supply (when present) or the backup battery. Thus the RTC runs even
DD
April 2009 Doc ID 14949 Rev 2 1/28
www.st.com
Contents AN2821
Contents
1 Overview of the medium-density STM32F10xxx backup domain . . . . . 6
1.1 Main backup domain features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Main RTC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Configuring the RTC registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Clock/calendar functionality features . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Clock/calendar basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.1 Implementing the clock function on the medium-density STM32F10xxx . 9
3.1.2 Implementing calendar function on the medium-density STM32F10xxx . 9
3.1.3 Summer time correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Clock source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4.1 Stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5 Tamper detection and time stamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.5.1 TAMPER-RTC pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.5.2 Tamper timestamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.5.3 Battery tamper timestamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 Hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 Running the demonstrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Clock/calendar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.1 Setting the time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.2 Setting the alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.3 Setting the date . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 Low-power demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1.4 Summer time correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2.1 Stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/28 Doc ID 14949 Rev 2
AN2821 Contents
6.3 Timestamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.1 Tamper events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.2 Battery removal and installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.4 Clock calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.5 Clock source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.5.1 50 Hz time base selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.5.2 60 Hz time base selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Appendix A Calibration table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Appendix B Additional notes on calibration and clock accuracy . . . . . . . . . . . 25
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 14949 Rev 2 3/28
List of tables AN2821
List of tables
Table 1. Calibration lookup table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 2. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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AN2821 List of figures
List of figures
Figure 1. STM3210B-EVAL board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. RTC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Time system flowchart
Figure 4. Calendar algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Leap year flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Calibration process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Stop mode entry sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Standby mode entry sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. STM3210B-EVAL board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. RTC time base connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 11. Clock source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Doc ID 14949 Rev 2 5/28
Overview of the medium-density STM32F10xxx backup domain AN2821
1 Overview of the medium-density STM32F10xxx
backup domain
Figure 2 shows the RTC block diagram.
Figure 2. RTC block diagram
HSE OSC
RTC alarm
=
RTC counter
RTC control register
AlarmITOverflowITSecond
IT
1.1 Main backup domain features
The backup domain of the medium-density STM32F10xxx:
● includes ten 16-bit backup data registers, backup control/status registers and RTC
registers.
● is powered by V
● is not reset due to system reset, power reset or when the microcontroller wakes up
from the Standby mode.
● is protected from parasitic write access after reset (access to the backup domain is
disabled after reset)
● consists of two main units:
– an APB1 interface used to interface with the APB1 bus. The backup domain
registers are accessible through the APB1 bus in read/write access mode.
– an RTC core which is clocked by the RTC clock.
when the VDD main power is switched off.
BAT
LSE OSC/ EXT CLOCK
RTC prescaler
RTC divider
Backup registers
LSI RC
RTCSel
[1:0]
1/128
f
rtc
ai15437
6/28 Doc ID 14949 Rev 2
AN2821 Overview of the medium-density STM32F10xxx backup domain
1.2 Main RTC features
The RTC:
● has three clock sources:
– LSE (low-speed external) clock that can also be bypassed by an external clock
– LSI (low-speed internal) RC oscillator
– HSE (high-speed external) clock divided by 128.
● has a 20-bit programmable prescaler that can be programmed to generate the RTC
time base. The prescaler load register contains the period counting value of the
prescaler.
● has three interrupt sources:
– second
–overflow
– alarm (also connected to EXTI Line 17 for auto-wakeup from Stop mode)
● its clock can be output on the TAMPER-RTC pin for calibration purposes.
Please refer to Figure 2 for an illustration of the medium-density STM32F10xxx RTC block
diagram.
All of the above mentioned features of the medium-density STM32F10xxx backup domain
can be used to develop a clock/calendar application equivalent to dedicated real-time
clocks.
Note: Be careful when choosing the 32.768 kHz crystal for your application. It is strongly
recommended to use a crystal with a load capacitance less than or equal to 7 pF. Never use
a crystal with a load capacitance of 12.5 pF.
Doc ID 14949 Rev 2 7/28
Configuring the RTC registers AN2821
2 Configuring the RTC registers
On startup, follow the steps below to configure the RTC to generate an interrupt every
second:
● Enable the APB1 backup domain and power interface clocks by writing the BKPEN and
PWREN bits to ‘1’ in the RCC_APB1ENR register
● Enable access to backup domain by writing the DBP bit to ‘1’ in the PWR_CR register
● Enable the LSE clock by writing the LSEON bit to ‘1’ (also write LSEBYP to “1” when
the external clock has to be bypassed)
● Poll the LSERDY flag in the RCC_BDCR register until the LSE clock is ready (if the
external crystal is used as the clock source).
● Select LSE as the RTC clock source by writing ‘01’ to the RTCSEL bits in the
RCC_BDCR register.
● Enable the RTC clock by setting the RTCEN bit in the RCC_BDCR register
● Poll the RSF bit in the RTC_CRL register until the RTC registers are synchronized (if a
50/60 Hz external clock source is used this step may take up to a minute to complete)
● Poll the RTOFF bit in the RTC_CRL register until the last operation on the RTC
registers is over
● Enable the RTC second global interrupt by setting the SECIE bit in the RTC_CRH
register
● Wait for the last task to complete
● Set the RTC prescaler value using the following formula:
f
= f
TRCLK
–f
–f
RTCCLK
RTCCLK
TRCLK
For example, if an external 32.768 kHz (32 kHz) crystal oscillator is used, set the
prescaler to 32767. If an external 50 Hz supply is used set the prescaler value to 49.
/(PRL[19:0]+1), where:
is the input clock frequency
is the time base generated from the prescaler block
8/28 Doc ID 14949 Rev 2
AN2821 Clock/calendar functionality features
Read RTC counter value
(TimeVar)
ai15438
Hours = TimeVar
3600
Minutes = TimeVar % 3600
60
Seconds =
(TimeVar % 3600) % 60
3 Clock/calendar functionality features
3.1 Clock/calendar basics
A real-time clock keeps track of the time (hours, minutes, seconds) and date (day, month,
year). It should also take into account leap years. A leap year is a year where an extra day is
added to the calendar in order to synchronize it to the seasons. Since the tropical year is
365.242190 days long, a leap day must be added roughly once every 4 years (4 × 0.242190
= 0.968760). Thus, every four years, the month of February counts 29 days instead of 28.
3.1.1 Implementing the clock function on the medium-density STM32F10xxx
The used registers are RTC registers: prescaler register, counter register and alarm register.
The medium-density STM32F10xxx RTC peripheral consists of a chain of programmable
counters consisting of two main units:
● the RTC prescaler block generates the RTC time base. Depending on the clock period
applied to the LSE input, this prescaler can be adjusted to generate a time base
(RTC_CLK) of 1 second by writing to the prescaler load register.
● the 32-bit programmable counter can be initialized to the current system time. The
system time is incremented at the RTC_CLK rate and compared with the alarm register
value. When it reaches the alarm register value, an interrupt is generated.
The current system time can be inferred from the value in the counter register by following
the steps shown in Figure 3 (“/” implies division, “%” implies modulus)
Figure 3. Time system flowchart
1. % is for modulo.
(1)
3.1.2 Implementing calendar function on the medium-density STM32F10xxx
The used registers are the 16-bit backup data registers.
When the 32-bit counter register value reaches 86399, this means that one day has
elapsed, and that the date has to be updated. The counter value is then reset. Whenever the
system date is updated, the new date is stored into the 16-bit backup data registers so that
Doc ID 14949 Rev 2 9/28
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