ST AN2800 Application note

AN2800

Application note

STM8A UART emulator

Introduction

This application note describes a technique to emulate the universal asynchronous receiver transmitter (UART) hardware peripheral, through the microcontroller medium end timer (TIMER3), without the use of additional hardware.

TIMER3 was chosen for this purpose because its capture and compare features can be easily used to receive and transmit data in a non return to zero (NRZ) serial format. This timer also provides a necessary time reference to establish when to send and read each outgoing and incoming data frame bit. In addition, TIMER3 was chosen because it has all the necessary features to build a software UART. Features include two timer channels, one for transmission (TIMER3_CC2) and one for reception (TIMER3_CC1). The input capture feature of channel one allows detection of an incoming data frame start bit, whereas its compare feature indicates when the bits have to be read. The output compare feature of channel two allows transmission of a data frame.

The algorithm described in this document is an example which can be further customized and improved. It is explained in Section 7: The UART emulator software algorithm on

page 14, together with information on how to configure and use a UART emulator. The

algorithm handles several UART hardware features via software such as, selection of the operating mode, noise and frame error detection, programmable data word length and configurable stop bit numbers.

The algorithm was tested by connecting the STM8A microcontroller to a PC through an RS232 interface.

For further information on STM8A devices, please refer to the STM8A datasheets which are available on st.com.

November 2008 Rev 1 1/33

www.st.com

Contents AN2800

Contents

1 Main features of the UART emulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 UART emulator receiver (RX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 UART emulator transmitter (TX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 UART communication protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 UART data frame description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Data transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1 Configurable stop bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.2 General procedure for sending a data word . . . . . . . . . . . . . . . . . . . . . . . . 9

4.3 Single byte transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.4 Consecutive byte transmissions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Data reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.1 Receiver data register full (RDRF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.2 General procedure for receiving a data word . . . . . . . . . . . . . . . . . . . . . . 11

5.3 Noise error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.4 Frame error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.5 Configurable stop bits during reception . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6 Baud rate generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7 The UART emulator software algorithm . . . . . . . . . . . . . . . . . . . . . . . . 14

7.1 UART emulator software registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.1.1 UART_CR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.1.2 UART_SR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.1.3 Receiver_Data_Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.2 UART emulator initialization function . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.2.1 Transmission time line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

7.3 UART emulator de-initialization functions . . . . . . . . . . . . . . . . . . . . . . . . . 21

7.3.1 Changing the operating mode: Example 1 . . . . . . . . . . . . . . . . . . . . . . 21

7.3.2 Changing the operating mode: Example 2 . . . . . . . . . . . . . . . . . . . . . . 21

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AN2800 Contents

7.4 Functional description of data transmission . . . . . . . . . . . . . . . . . . . . . . . 22

7.4.1 Sending a data frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.4.2 Transmitting a single data word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.5 Functional description of data reception . . . . . . . . . . . . . . . . . . . . . . . . . 26

8 Connecting the UART emulator to a PC . . . . . . . . . . . . . . . . . . . . . . . . 28

9 Main.c examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

9.1 Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

9.2 Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

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List of tables AN2800

List of tables

Table 1. UART_CR description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 2. UART_SR description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 3. Configuring channels 1 and 2 of timer2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 4. Bit value majority voting system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

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AN2800 List of figures

List of figures

Figure 1. Nine-bit data word with one stop bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 2. One bit delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 3. Stop bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 4. Start bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 5. Two stop bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 6. Data frame structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 7. Reception on TIMER3_CC1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 8. Reading the RX line level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 9. PC-ST232- STM8A system overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

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Main features of the UART emulator AN2800

1 Main features of the UART emulator

The main features of the UART emulator are:

● Transmitter mode up to 28800 bits per second (bps)

● Receiver mode up to 28800 bps

● Full duplex mode up to 28800 bps

● Control and status registers

● Separate enable bits for transmitter and receiver

● Two error detection flags: Noise error and frame error

1.1 UART emulator receiver (RX)

The main features of the UART emulator receiver are:

● Start bit detection: An invalid signal which is not followed by a low level signal for at

least a half bit period, is considered as a glitch and stops the reading procedure.

● Majority voting system: Three samples are taken from the middle of each bit to

determine bit value according to a two to one majority voting system.

● Frame error (FE) flag: This error flag is set when the incoming data word first stop bit is

not detected.

● Noise error (NF) flag: This error flag is set when at least one of the three samples taken

for each incoming data bit has a different value. It helps to discriminate between a noisy bit and a valid one as it indicates the presence of noise on the RX line. This flag acts on each bit, so, it is automatically cleared if all three samples have the same value.

● Receiver data register full (RDRF) flag: This status flag is set as soon as data have

been successfully received and their values are ready to be read.

1.2 UART emulator transmitter (TX)

The main features of the UART emulator transmitter are:

● Configurable stop bit number which provides support for one or two stop bits.

● Programmable data word length (eight or nine bits)

● End of transmission flag

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AN2800 UART communication protocol

2 UART communication protocol

The UART offers full-duplex data exchange with external equipment which requires an industry standard NRZ asynchronous serial data format. It also offers a very wide baud rate range (see Section 6: Baud rate generator on page 13).

The UART is externally connected to another device by two pins: The UART receive data input pin (TIMER3_CC1) and the UART transmit data output pin (TIMER3_CC2).

Over-sampling techniques are used for data recovery by discriminating between valid incoming data and noise. When the receiver is not enabled, captures on the input pin (CC1) are disabled. When the transmitter is not enabled, the output pin (CC2) is forced to high level. When the transmitter is enabled and nothing has to be transmitted (idle state), the output pin is at high level.

Through these pins, serial data is transmitted and received as frames. Each frame has:

● One start bit

● One data word of eight or nine bits with the least significant bit first

● One or two stop bits indicating that the frame is complete

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UART data frame description AN2800

3 UART data frame description

The data word length may be selected to be either eight or nine bits by programming bit 8/9 of the UART_CR register (see Section 7: The UART emulator software algorithm on

page 14). The UART_TX pin is in low state during the start bit. It is in high state during the

stop bit. The structure of a data frame is given in Figure 1.

Figure 1. Nine-bit data word with one stop bit

Next data frameData frame

Start

bit

Bit0 Bit8Bit7Bit6Bit5Bit4Bit3Bit2Bit1

Stop

bit

Next start

bit

ai15043

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AN2800 Data transmission

4 Data transmission

The UART emulator can transmit data words of either eight or nine bits depending on the 8/9 control bit value. When the 8/9 bit is set, word length is nine bits. In this case the 9th bit (the MSB) has to be specified in the data argument of the send function. If this is not done, the MSB is sent as 0. For example, SW_UART_Send(0x1FF) sends the MSB as 1, whereas SW_UART_Send(0xFF) sends the MSB as 0.

The transmitter is enabled during the initialization phase by setting the transmitter enable bit (TE) of the UART_CR register. Once this is done, the data is output serially on the UART_TX pin, each time the send function is called. The TC (transmission complete) flag must be set before calling the send function, otherwise, the data are not transmitted. Normally, a zero TC flag indicates that a transmission is ongoing. Therefore, it is necessary to wait until the current transmission is finished before sending the next one.

During a transmission, the data shifts out the least significant bit (LSB) first on the UART_TX pin, TIMER3_CC2. Every data word is preceded by a stop and a start bit which are logic level low for a one-bit period. The data frame is terminated by a configurable number of stop bits.

The stop bits listed in Section 4.1 below are supported by the UART emulator. A more detailed description of the send function is provided in Section 7: The UART emulator

software algorithm on page 14.

4.1 Configurable stop bits

The number of stop bits (SB) that can be transmitted with every data frame are programmed by the SB control bit of the control register (see Section 7.1.1: UART_CR on page 15).

● 1 stop bit: This is the default number of stop bits where the SB control bit is set to zero.

● 2 stop bits: This is supported by setting the SB control bit to one.

4.2 General procedure for sending a data word

1. Program the UART_CR 8/9 bit to define the word length

2. Program the UART_CR SB bit to define the stop bit number

3. Set the UART_CR TE bit to enable the transmitter

4. Select the desired baud rate

5. Enable all the interrupts

6. Call the init function (see Section 7.2: UART emulator initialization function on

page 17), specifying the UART_CR register and the baud rate.

7. Clear the CFLAG (consecutive flag) for a single byte transmission

8. Call the send function, specifying the data word to send

9. For consecutive data word transmissions, wait for the TC flag to be set before calling the send function again. In this case do not clear the CFLAG between two consecutive send calls.

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Data transmission AN2800

4.3 Single byte transmission

During a transmission the TC flag is cleared. While it is clearing, a send call does not trigger a further transmission instead, it checks the TC flag before starting a transmission.

When no transmission is taking place the send routine clears the TC flag and starts a data frame transmission. When a frame transmission is almost complete (at the beginning or at the end of the MSB transmission according to the selected number of stop bits) the TC flag is set. The TC flag is cleared automatically by a write to the UART_SR register, each time the send function is called. The CFLAG must be cleared before a single data word transmission as it impacts on the transmission start time reference.

4.4 Consecutive byte transmissions

By default, the transmitter is configured to send consecutive data words. Between two consecutive send calls, a wait condition for the TC flag has to be inserted. In this case, the CFLAG does not have to be cleared.

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