ST AN2713 Application note

AN2713

Application note

LNB power supply based on the LNBH23 supply

and control IC with step-up and I²C interface

Introduction

This application note is intended to provide additional information and suggestions for the correct use of the LNBH23 device. All waveforms shown are based on the demonstration board (order code STEVAL-CBL003V1) described in Section 5.

The LNBH23 is an integrated solution for supplying/interfacing satellite LNB modules. It provides good performance in a simply and cheaply way, with minimum external components necessary. It includes all functions needed for LNB supply and interfacing, in accordance with international standards. Moreover, it includes an I thanks to a fully integrated step-up DC-DC converter, it functions with a single input voltage supply ranging from 8 V to 15 V.

Figure 1. LNBH23 internal block diagram

C bus interface and,

SDA SCL

ADDR

PWM

Controller

Rsense

P-GND

Vup

VoRX

VoTX

EXTM

DSQIN

VCTRL

TTX

VSEL

Linear Post-reg +Modulator +Protections +Diagnostics

VOUT Control

22KHz Oscill.

LNBH23

A-GND

VSEL

TTX

ITEST

TEN

I²C interface

I²C Diagnostics

22KHz Tone Amp. Diagn.

22KHz Tone Freq. Detector

BypVcc Vcc-LISEL TTX

Preregulator +U.V.lockout +P.ON reset

DETIN

DSQOUT

November 2009 Doc ID 14431 Rev 1 1/40

www.st.com

Content AN2713

Content

1 Block diagram description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Step-up controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Pre-regulator block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.3 I

C interface and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.4 22 kHz oscillator and EXTM function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.5 Tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.6 DiSEqC communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.7 Linear post-regulator, modulator and protection . . . . . . . . . . . . . . . . . . . . 8

2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Component selection guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1 Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.2 Ferrite bead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3 DC-DC converter output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 DC-DC converter Schottky diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.5 DC-DC converter inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.6 Output current limit-RSEL selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.7 Undervoltage diode protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.8 DiSEqC implementation and inductor selection . . . . . . . . . . . . . . . . . . . . 15

3.9 TVS diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Other application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1 18 V to 13 V fast transition with high bus capacitance . . . . . . . . . . . . . . . 17

4.2 Reverse voltage and lightning surge protection . . . . . . . . . . . . . . . . . . . . 19

5 Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.1 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2 Startup procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/40 Doc ID 14431 Rev 1

AN2713 Content

6 Software installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.1 How to use the LNBH23 demonstration board with the LNBxxx control suite

software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Doc ID 14431 Rev 1 3/40

List of tables AN2713

List of tables

Table 1. LNBH23 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 2. LNBH23 demonstration board BOM list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 3. Recommended Schottky diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 4. Recommended inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 5. Recommended inductors for output R-L filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 6. Recommended LNBTVS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 7. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

4/40 Doc ID 14431 Rev 1

AN2713 List of figures

List of figures

Figure 1. LNBH23 internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. EXTM timing control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3. DiSEqC timing control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. LNBH23 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 5. LNB power supply schematic using the LNBH23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 6. External circuit to reduce 18 V to 13 V fall time transition . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 7. Fast transition timing sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 8. Fast transition timing control with 22 kHz tone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 9. External circuit protection schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 10. STEVAL-CBL003V1 demonstration board photo (PowerSSO-24 package). . . . . . . . . . . . 21

Figure 11. STEVAL-CBL005V1 demonstration board photo (QFN32 package) . . . . . . . . . . . . . . . . . 21

Figure 12. STEVAL-CBL003V1 PCB top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 13. STEVAL-CBL003V1 PCB bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 14. STEVAL-CBL003V1 component layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 15. STEVAL-CBL005V1 PCB top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 16. STEVAL-CBL005V1 PCB bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 17. STEVAL-CBL005V1 component layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 18. STEVAL-CBL003V1 connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 19. STEVAL-CBL005V1 connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 20. STEVAL-CBL003V1 bench test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 21. STEVAL-CBL005V1 bench test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 22. PC to I Figure 23. I

Figure 24. Main settings window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 25. Device selection window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 26. Parallel port setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 27. LPT1 setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 28. Password setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 29. I

Figure 30. Autoread setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 31. Power-on at 13.4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 32. Power-on at 18.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 33. LLC activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 34. Tone activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 35. Overload detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 36. Overtemperature detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 37. PCL deactivation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 38. AUX activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

C main window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

C bus communication error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

C device address setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Doc ID 14431 Rev 1 5/40

Block diagram description AN2713

1 Block diagram description

The internal blocks of the LNBH23 are described in the paragraphs that follow.

1.1 Step-up controller

The LNBH23 features a built-in step-up DC-DC converter that, from a single supply source ranging from 8 V to 15 V, generates the voltages that allow the linear post-regulator to work with minimum power dissipation. The external components of the DC-DC converter are connected to the Lx and VUP pins (see Figure 5). No external power MOSFET is needed.

1.2 Pre-regulator block

This block includes a voltage reference connected to the BYP pin, an undervoltage lockout circuit, intended to disable the whole circuit when the supplied Vcc drops below a fixed threshold (6.7 V typ) and a power-on reset that sets all the I Vcc is turned on and rises from zero above the on threshold (7.3 V typ).

C registers to zero when the

1.3 I2C interface and diagnostics

The main functions of the device are controlled via I2C bus by writing 5 bits on the system register (SR bits in write mode). In the same register there are 5 bits that can be read back (SR bits in read mode) and provide 5 diagnostic functions.

Five bits report the diagnostic status of five internal monitoring functions:

● VMON: output voltage diagnostic. If the output voltage level is below the guaranteed

limit (refer to the device datasheet) the VMON I

● TMON: 22 kHz tone diagnostic. If the 22 kHz tone amplitude and/or the tone frequency

is outside of the guaranteed limits (refer to the device datasheet.), the TMON I set to "1".

● IMON: minimum output current diagnostic to detect if no LNB is connected on the bus

or a cable not connected to the IRD. The LNBH23 is provided with a minimum output current flag by the IMON I lower than 12 mA (typ) with ITEST=1 and 6 mA with ITEST=0.

● OTF: overtemperature flag. If overheating occurs (junction temperature exceeds 150

°C), the OTF I

● OLF: overload flag. If the output current required exceeds the current limit threshold or

C bit is set to "1".

a short-circuit occurs, the OLF I

Moreover, three bits will report the last output voltage register status (EN, VSEL, LLC) received by the IC. The LNBH23 I addresses by setting the voltage level of the dedicated ADDR pin.

C bit in read mode, which is set to "1" if the output current is

C bit is set to "1".

C interface address can be selected among two different

C bit is set to "1".

C bit is

6/40 Doc ID 14431 Rev 1

AN2713 Block diagram description

1.4 22 kHz oscillator and EXTM function

The internal 22 kHz tone generator is factory-trimmed in accordance with current standards and can be controlled by the DSQIN pin (TTL-compatible), which allows immediate DiSEqC™ data encoding. The rising and falling edges are kept within the 5 µs to 15 µs range, 8 µs (typ) for 22 kHz. The duty cycle is 50% (typ), and modulates the DC output with a 0.650 Vpp (typ) amplitude as well as the DSQIN pin.

The EXTM is a logic input to allow the activation of the 22 kHz tone output, on the V

oTx

pin, by using the device’s integrated tone generator. If the EXTM pin is used, the internal 22 kHz generator must be kept ON (TTX pin or TTX bit set HIGH). When a TTL-compatible 22 kHz signal is applied (for example, a 22 kHz square wave from the demodulator), the EXTM internal circuit detects the 22 kHz TTL signal code and activates the internal 22 kHz tone on the V

output. The 22 kHz tone on the output is activated after a delay from the TTL signal

oTx

presence on the EXTM pin. The tone output starts with about a 1.5 T delay after the 1st cycle of the TTL signal and stops after about a 2 T delay after the TTL signal on the EXTM has expired (see Figure 2 below). The tone output can also be activated via the DSQIN pin. It starts with a 1.5 T ± 25 µs maximum delay and stops after 2 T ± 25 µs maximum delay with 20~24 kHz tolerance for EXTM input pin.

Figure 2. EXTM timing control

1.5 Tone detector

This block provides a complete circuit to decode the 22 kHz burst code present on the DETIN pin in a digital signal by the DSQOUT pin where an open drain MOSFET is connected. The tone is also monitored and a dedicated bit (TMON) provides the diagnostic function described in the Section 1.3.

Doc ID 14431 Rev 1 7/40

Block diagram description AN2713

1.6 DiSEqC communication

The following steps must be taken to ensure the correct implementation of the DiSEqC 2.0 communication:

● T0: before starting the DiSEqC transmission, the TTX function must be activated

(through the TTX pin or TTX I

● T1: after a 500 µs minimum, the IC is ready to receive the DiSEqC code through the

DSQIN pin (or, alternatively, the TEN I 22 kHz burst).

● T2: when the transmission has elapsed, the TTX function must be set to LOW (through

the TTX pin or TTX I

C bit) not earlier than 200 µs after the last falling edge of the

DiSEqC code.

Figure 3. DiSEqC timing control

C bit).

C bit can be set to HIGH to activate the

1.7 Linear post-regulator, modulator and protection

The output voltage selection and the current selection commands join this block, which manages all the LNB output function. This block gives feedback to the I diagnostic block, regarding the status of the thermal protection, overcurrent protection and output settings.

8/40 Doc ID 14431 Rev 1

C interface, from the

AN2713 Pin description

2 Pin description

The LNBH23 is available in exposed pad PowerSSO-24 or QFN32 packages for surface mount assembly. Figure 4 shows the device pinouts for each package. Tabl e 1 briefly summarizes the pin functionality.

Figure 4. LNBH23 pin configuration

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Table 1. LNBH23 pin description

Pin n°

QFN32

19 17 V

18 16 V

4 6 Lx NMOS drain Integrated N-channel power MOSFET drain

27 22 V

21 19 V

22 20 V

6 8 SDA Serial data Bi-directional data from/to I

9 9 SCL Serial clock Clock from I

12 12 DSQIN DiSEqC input

Pin n°

PSSO-24

Symbol Name Pin Function

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–L Supply input 8 to 15 V analog power supply

Supply input 8 to 15 V IC DC-DC power supply

1&.BOTTOMVIEW

Input of the linear post-regulator. The voltage on this pin

Step-up voltage

is monitored by the internal step-up controller to keep a

minimum dropout across the linear pass transistor

oRX

LDO output port Output of the integrated linear post-regulator

Output port for

oTX

22 kHz

TX output to the LNB

tone TX

C bus

This pin accepts the DiSEqC code from the main

microcontroller. The LNBH23 uses this code to modulate

the internally-generated 22 kHz carrier. Set this pin to

ground if not used

C bus

!-V

Doc ID 14431 Rev 1 9/40

Pin description AN2713

Table 1. LNBH23 pin description (continued)

Pin n°

QFN32

14 14 TTX TTX enable

Pin n°

PSSO-24

Symbol Name Pin Function

This pin, as well as the TTX I

C bit of the system register,

is used to control the TTX function enable before starting

the 22 kHz tone transmission. Set this pin to ground if not

used

29 1 DETIN

Tone decoder

input

22 kHz tone decoder input, must be AC coupled to the

DiSEqC 2.0 bus

Open drain output of the tone detector to the main

11 11 DSQOUT DiSEqC output

microcontroller for DiSEqC 2.0 data decoding. It is low

when a tone is detected on the DETIN pin

External modulation logic input pin which activates the 22

kHz tone output on the VoTX pin. Set to ground if not

used

13 13 EXTM

External

modulation

5 7 P-GND Power ground DC-DC converter power ground

20 18 A-GND Analog ground Analog circuits ground

Needed for internal preregulator filtering. The BYP pin is

15 15 BYP Bypass capacitor

intended only to connect an external ceramic capacitor. Any connection of this pin to external current or voltage

sources may cause permanent damage to the device

C bus addresses available by setting the address

10 10 ADDR Address setting

Two I

pin level voltage

28 23 ISEL Current selection

30 2 VCTRL

Output voltage

control

The resistor “R

defines the linear regulator current limit threshold with the

equation: Imax(typ.)=10000/R

13 V - 18 V linear regulator V

used only with VSEL=1. If VCTRL=1 or floating V

V (or 19.5 V if LLC=1). If VCTRL=0 then V

” connected between I

SEL

oRX switch control. To be

and GND

SEL

oRX

=18.5

oRX

=13.4 V

(LLC=either 0 or 1)

On the bottom side of the PowerSSO-24 package. Must

ePad ePad ePad ePad

be connected with power ground and to the ground layer

through vias to dissipate heat

10/40 Doc ID 14431 Rev 1

AN2713 Component selection guidelines

3 Component selection guidelines

The LNBH23 application schematic in Figure 5 shows the typical configuration for a single LNB power supply.

Figure 5. LNB power supply schematic using the LNBH23

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Note: TVS diode to be used if surge protection is required (see Section 3.9).

Table 2. LNBH23 demonstration board BOM list

Component Notes

IC1

C1 100 µF 35 V electrolytic capacitor, higher value is suitable

C3, C5 100 µF 25 V electrolytic capacitor, ESR in the 150 mΩ to 350 mΩ range (see Section 3.3)

C9 10 µF 35 V electrolytic capacitor

C2, C7 0.1 µF 35 V ceramic capacitors

C4, C6 0.47 µF 35 V ceramic capacitors

LNBH23 PSSO-24 ePad for STEVAL-CBL003V1

LNBH23 QFN32 ePad for STEVAL-CBL005V1

Doc ID 14431 Rev 1 11/40

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Component selection guidelines AN2713

Table 2. LNBH23 demonstration board BOM list (continued)

Component Notes

C8, C10,

C11

0.22 µF 35 V ceramic capacitors

C12 0.01 µF 35 V ceramic capacitor

R1 100 Ω 1/4 W resistor

R2 (R

)11 kΩ 1/16 W resistor (see Section 3.6)

SEL

R3 10 kΩ 1/4 W resistor

R4 15 Ω 1/4 W resistor

D1 STPS130A or similar Schottky diode (see Section 3.4)

D2, D4

BAT43 BAT43 (or Schottky diode with I

F(AV)

>0.2 A, V

1N5818

>25 V) or BAT30, BAT54, TMM BAT43,

RRM

D3 1N4007

L1 22 µH Inductor with Isat>I

Ferrite bead filter; recommended part numbers: Panasonic EXCELS A35, Murata BL01RN1-A62 or equivalent with similar or higher impedance and current rating higher than 2 A (see Section 3.2)

(see Section 3.5)

PEAK

L3 220 µH inductor with current rating higher than rated output current

TVS

LNBTVS22-XX TVS protection diode is recommended. Other solutions can be used depending on

the level of surge protection required (see Section 3.9)

3.1 Input capacitors

An electrolytic bypass capacitor (C1 in Figure 5) between 100 µF and 470 µF located close to the LNBH23 is needed for stable operation. In any case, a ceramic capacitor between 100 nF and 470 nF is recommended to reduce the switching noise at the input voltage pin.

3.2 Ferrite bead

The most important parameter when selecting the ferrite bead is the rated current. Ensure that the ferrite has a current rating of at least 2 A and impedance higher than 60 Ω at 100 MHz.

3.3 DC-DC converter output capacitors

Two low-cost electrolytic capacitors are needed on the DC-DC converter output stage (C3 and C5 in Figure 5). Moreover, two ceramic capacitors are recommended to reduce high frequency switching noise. The switching noise is due to the voltage spikes of the fast switching action of the output switch, and to the parasitic inductance of the output capacitors. To minimize these voltage spikes, special low-inductance ceramic capacitors can be used, and their lead lengths must be kept short and as close as possible to the IC pins (C4 and C6 in Figure 5). To further reduce switching noise, a ferrite bead is recommended between the capacitors (see Section 3.2 for required rating and impedance).

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