ST AN2708 APPLICATION NOTE

AN2708
Application note
2X36 W digital dimmable ballast with L6574 and ST7FDALI
Introduction
This document describes a high-efficiency, high power factor, low THD and digital dimming electronic ballast designed to drive 2X36 W T8 tube lamps.
The system consists of three main blocks:
The DALI control unit is dedicated to address the slaves, to display the lamp status and to send the dimming commands. This unit is provided with a keyboard which allows setting different dimming scenes over a wide range (5-100%) as well as putting in standby and restarting the ballast. The DALI communication protocol includes single and group mode, as well as broadcast mode to address the slaves.
The AC-DC adapter is based on the VIPer12A-E. This is an offline double-output isolated power supply in DCM flyback configuration. The outputs are set for 20 V to supply the communication bus and for 5 V to supply the MASTER microcontroller.
The three blocks are described in detail and their performances are shown. In addition some of DALI basics are explained.
March 2008 Rev 1 1/42
www.st.com
Contents AN2708
Contents
1 Block diagram and system operating conditions . . . . . . . . . . . . . . . . . 5
2 High-frequency ballast . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 PFC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Half-bridge inverter and ballast . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.1 Lamp dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.2 Supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.2.3 Lamp turn-on and lamp turn-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.4 Verification of lamp status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.2.5 Ballast performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3 DALI master unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 Master unit schematic and bill of material . . . . . . . . . . . . . . . . . . . . . . . . 26
4 Basics of DALI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 DALI master AC-DC adapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 Adapter description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 Adapter bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.3 Adapter performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3.1 Steady state tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3.2 Startup behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.3.3 Dynamic load tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.3.4 Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.3.5 Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.3.6 Efficiency variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.3.7 Conducted emissions test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2/42
AN2708 List of tables
List of tables
Table 1. System operating conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Ballast-slave communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. Ballast bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. PFC operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 5. Power stage design equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 6. L6562 biasing circuitry design equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 7. Lamp parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. L6574 biasing circuitry design equations for operating conditions . . . . . . . . . . . . . . . . . . . 16
Table 9. Ballast performances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 10. Master unit bill of material. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 11. SMPS operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 12. Adapter bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3/42
List of figures AN2708
List of figures
Figure 1. System block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. 2X36 W digital dimmable ballast with L6574 and ST7FDALI . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Ballast schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. PFC performances at 230 V
Figure 5. Lamp ballast model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6. Ballast transfer functions (magnitude) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. DALI protocol brightness values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 8. Ballast controls timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 9. Idle state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 10. Turn-on procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11. Turn-off procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 12. Forward frame timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 13. Backward frame timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 14. Ballast startup at 230 V Figure 15. Lamps turn-on at 230 V Figure 16. Lamps running at 230 V
Figure 17. Polling keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 18. Pressed button event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 19. Master unit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 20. Cable wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 21. Master flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 22. Slave flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 23. Adapter schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 24. Adapter PCB layout - top side -silkscreen (to scale). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 25. Adapter PCB layout - bottom side - copper tracks (to scale) . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 26. Flyback transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 27. VIPer12A-E steady state behavior at full load at 110 V Figure 28. VIPer12A-E steady state behavior at full load at 230 V Figure 29. VIPer12A-E steady state behavior at minimum load at 110 V Figure 30. VIPer12A-E steady state behavior at minimum load at 230 V Figure 31. Startup waveforms at full load at 110 V Figure 32. Startup waveforms at full load at 230 V Figure 33. Startup waveforms at minimum load at 110 V Figure 34. Startup waveforms at minimum load at 230 V Figure 35. Dynamic load waveforms at 110 V Figure 36. Dynamic load waveforms at 230 V
Figure 37. Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 38. Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 39. Efficiency variations vs. input voltage at full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 40. Conducted emissions at 110 V Figure 41. Conducted emissions at 110 V Figure 42. Conducted emissions at 230 V Figure 43. Conducted emissions at 230 V
-50 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ac
-full power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ac
-full power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ac
- full power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ac
- 60 Hz . . . . . . . . . . . . . . . . . . 36
ac
- 50 Hz . . . . . . . . . . . . . . . . . . . 36
ac
- 60 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
ac
- 50 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
ac
- 60 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ac
- 50 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ac
60 Hz - full load - line 1 peak detector . . . . . . . . . . . . . . 40
ac
60 Hz - full load - line 2 peak detector . . . . . . . . . . . . . 40
ac
50 Hz - full load - line 1 peak detector . . . . . . . . . . . . . . 41
ac
50 Hz - full load - line 2 peak detector . . . . . . . . . . . . . 41
ac
- 60 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ac
- 50 Hz . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ac
- 60 Hz . . . . . . . . . . . . . . 36
ac
- 50 Hz . . . . . . . . . . . . . . 36
ac
4/42
AN2708 Block diagram and system operating conditions

1 Block diagram and system operating conditions

Figure 1 shows the block diagram of the system.

Figure 1. System block diagram

HIGH
FREQUENCY
BALLAST
ACíDC ADAPTER
SCI communication is considered as an option.
MASTER UNIT
SCI
Communication
Option
5/42
Block diagram and system operating conditions AN2708
The present system has been designed according to the following specifications:

Table 1. System operating conditions

Parameter Value
Input voltage range 176-265 Vac/50 Hz; 90-140 Vac/60 Hz
Lamp type 2X36 W T8 tube lamps
Circuit power (max) 80 W
Lamp power (max) 72 W
Dimming range 5% to 100%
Power factor > 0.99
Current THD < 10%
Warm start < 1.5 sec
Standby mode power < 0. 6 W
In addition to the previous specs, the DALI communications are optically isolated, the digital dimming is performed with high precision, and the lamp filament preheating time is programmable as well as the ignition time.

Figure 2. 2X36 W digital dimmable ballast with L6574 and ST7FDALI

HIGH FREQUENCY BALLAST
MASTER UNIT
MASTER UNIT
ACíDC
ACíDC
ADAPTE R
ADAPTE R
6/42
AN2708 High-frequency ballast

2 High-frequency ballast

This section describes the high-frequency ballast board which includes the power factor correction stage, the half-bridge inverter driving circuitry, the output stage and the DALI slave unit. The schematic of the board is shown in Figure 3.

Figure 3. Ballast schematic

5VDD
9
+1+3+5+7+
IC_GND
+2+4+6+8+
SIGN
IC_GND
IC_GND
0
R64
R63
CON7
IC_GND
5VDD
D17
2K49
1%
1%
2K49
19
20
OSC1/CLKIN
U11
VSS1VDD2RESET3SS/AIN0/PB04SCK/AIN1/ PB15MISO/AIN2/PB26MOSI/AIN3/PB37CLKIN/AIN4/PB48AIN5/PB59DALIIN/AIN6/PB6
IC_GND
Reset
R62
4
U10
112
R61
11K
BAS16
4
U9
112
J5
ICP Connector
10
Reset
PWM0
IC_GND
13
12
14
16
11
17
18
OSC2
PA0(HS)/LTIC
PA7/DALIOUT
PA1(HS)/ATIC
ST7FDALIF2M6
PA4(HS)/ATPWM2
PA3(HS)/ATPWM115PA2(HS)/ATPWM0
PA6/MC0/ICCCLK/BREAK
PA5(HS)/ATPWM3/ICCDATA
10
R70
1k 1%
R69
1k 1%
PB1
C45
100nF
4K7
1%
5VDD
334
SFH6156-2
2
1%
334
SFH6156-2
2
IC_GND
PB2
EN2
EN1
0
R68
50V
IC_GND
PIN3 SFH6156-2
R67
10K
1%
IC_GND
PIN3 SFH6156-2
D18
BZX284C 2V7
0.5W
Q4
BC817-25
312
R66
4R7
1%
R65
+
R72
3K16
1%
1%
332R
C46
22uF
20V
R71
1K21
1%
1600V
C20
8.2nF
C21
100nF
250V
1 23
Lamp2
T8 36W
1W
R30_2
100K
250V
C17
100nF
18
18
R30_1
100K
1W
L1
L2
1.8mH
1.8mH
213
Q2
16
C14
100nF
630V
C11
1nF
R17
22E 1W
Rs= max 5 ohm @100kHz
C10
4.7nF
R14
10E
DZ1
15V
On Air On Air
D3
1N4148
R9
750K
1%1%
D2
STTH1L 06
8 1
T1
5 4
TRANSFORMER
R6
R4
180K
R1
750KR2750K
VS
12
IC_GND
C19
100nF
0.5W
IC_GND
+
IC_GND
50V
C7
4.7uF
R10
750K
1%
IC_GND
C5
100n
R8
12K
C4
1000n
68K
PB2
R5
180K
1%
C1
R26_2A
R26_1
750K
STP8NM50
R21
10E
15
HVG
VBOOT
RPRE2OPIN+
R12
120K
1
C3
2
5
U1
100nF
BRIDGE
432
180K
R26_2
750K
R15
10K
IC_GND
23
R7
INV
330n
W08G
1
FUSE
4A/250V
Line
J1
1 23
SIGN
7
C6
+
33E
COMP
ZCD
VCC
8
C18
8.2nF
Lamp1
T8 36W
R27_2
750K
R27_1
750K
213
Q3
STP8NM50
R22
10E
14
OUT
U2
L6574
OPIN-6OPOUT5RING
C9
400V
47uF
Q1
STP8NM50
1
7
CS
GD
GND
U1
L6562
MULT
3
C2
R3
-+
NTC
15E@25° 3A
Neutral
123
CON3
4
1600V
4
LVG11EN18EN2
100nF
4
6
10nF
10K
1%
R29_2
15K
R29_1
15K
R24_2
680K
R28_2
4.7K
L1&L2: Choke Induc t or
- E25x13x7 core
- 2.62mm gap f or 1.8mH indu ct a nce
- 267 turns (AWG 40)
R24_1
680K
4.7K
R28_1
IC_GND
D5 BAT46
D7 BAT46
R23
330E
R20
D11
1N4148
EN1
EN2
9
GND
CPRE
CF
4
R1668K
D4
1N4148
R11
1%
9.53K
RS2
0.82E
1W
RS1
0.82E
1W
R13
47K
D6 BAT46
RS_2
1E
0.6W 0.6W
RS_1
1E
1K
+
IC_GND
C15
D8
1N4148
330uF 25V
IC_GND
10
R1910K
IC_GND
C13
PWM0
1000nF 25V
1
3
Rf
15K
C12
470pF
IC_GND
R18
68K
IC_GND
Rup
120K
C8
IC_GND
600V 1A
D14
STTH1L06
T1: Boost Inductor Spec (ITACOIL E2543/E)
- E25x13x7 core, 3C 85 f errite
- 1.5mm gap f or 0.7mH prim ar y inductanc e
- Primary: 105 turns (20 x 0.1mm)
- Secondary: 11 t ur ns (0 . 1m m )
SIGN
D61
BAT46
D9 BAT46
68K
1%
R100
D10
BAT46
PB1
R25
470E
IC_GND
C16
10nF 25V
J2
1234567
EN2
EN1
5VDD
PB2
+
Cf
Rlow
100nF
SIGN
50V
4.7uF
IC_GND
4.7K
5VDD
IC_GND
1
IC_GND
VOUT
GND
2
VIN
U7 LE50CZ
3
Cout
+
95mA
L3
1.8mH
CVdd
10uF 25V
+
2
Cfb
S1S
DZ2
15V 0.5W
22nF 25V
FB
3
Vdd
4
D5D6D7D
8
+
L4
680uH
240mA
+
D15
1N4007 1A 1000V
HSMG-C670
GREEN
LD2
5VDD5VDD
LD1
RED
HSMS-C670HE
C44
100nF
50V
C43
1uF
16V
+
5VDD
IC_GND
C72
33nF
50V
IC_GND
C73
50V
68pF
J4
1234567
PB2
EN1
EN2
5VDD
PWM0
CON7
3
-+
IC_GND
142
D16
MB2S
Vss_STDALI
C42
2.2uF16V
+
D12
18V 0.5W
10uF 25V
D13
STTH1L 06
600V
1A
U8 Viper12A
Cin2
3.3uF 450V
Cin1
3.3uF 450V
R60
1
2
J3
DALI Bus
CON2
Vss_ST7DALI
5VDD
7/42
High-frequency ballast AN2708
This block is essentially a "double board" as the DALI slave board and its external circuitry are mounted on a small separated board which is connected to the bottom side by means of a 7-pin connector. Ta bl e 2 shows the ballast-slave communication.

Table 2. Ballast-slave communication

Pin ref. Description Analog stage Microcontroller
1 PWM0 (ref op-amp)
2 Disable L6574 EN1 & disconnected lamp
3 Enable L6574 EN2 & not ignited lamp
4GND
55 VDD
6 PB2 disable PFC
7 SIGN (lamp failure)

Table 3. Ballast bill of material

Reference Value Description
Bridge W08G 1.5 A 800 V Bridge rectifier
Cout, CVdd 10 µF 25 V Electrolytic cap
C7,Cf 4.7 µF 50 V Electrolytic cap
Cfb 22 nF 25 V Ceramic cap
Cin1,Cin2 3.3 µF 450 V Electrolytic cap
C1 100 nF 400 V Polyester cap
C2 10 nF 50 V Ceramic cap
C3 330 nF 50 V Ceramic cap
C4 1000 nF 50 V Ceramic cap
C5,C8,C9,C1
9
C6 47 µF 450 V Electrolytic cap
C14 100 nF 100 V Ceramic cap
C10 4.7 nF 100 V Ceramic cap
C11 1 nF 630 V Evox Rifa polypropylene cap Rs
C12 470 pF 50 V Ceramic cap
C13 1 µF 50 V Ceramic cap
C15 330 µF 25 V Electrolytic cap
100 nF 50 V Ceramic cap
= 5 Ω at 100 kHz
max
C16 10 nF 25 V Ceramic cap
C17, C21 100 nF 250 V Polyester cap
C18,C20 8.2 nF 1600 V Polyester cap
C42 2.2 µF16 V Electrolytic cap
8/42
AN2708 High-frequency ballast
Table 3. Ballast bill of material (continued)
Reference Value Description
C43 1 µF 20 V SMD tantalum cap
C44,C45 100 nF 50 V 0805 SMD cap
C46 22 µF 20 V SMD tantalum cap
C72 33 nF 50 V 0805 SMD cap
C73 68 pF 50 V 0805 SMD cap
DZ1,DZ2 15 V 0.5 W Zener diode
D2,D13,D14 STTH1L06
D3,D4,D8,D1
1
1N4148 Small signal rectifier 200 mA 100 V
STMicroelectronics ultrafast high voltage rectifier 1 A 600
V
D5,D6,D7,D9
, D10,D61
D12 18 V 0.5 W Zener diode
D15 1N4007 1 A 1000 V General purpose rectifier
D16 MB2S 0.5 A 200 V SMD bridge rectifier
D17 BAS16 Small signal diode
D18 BZX284C 2V7 0.5 W Zener diode
FUSE 4 A 250 V Radial fuse
J1 Input 250 V connector 3-way PCB screw terminal, 5.08 mm
J2 Ballast-slave connector 7-way strip line socket
J3 Dali Bus 2-way vertical PCB header, 3.81 mm pitch
J4 Ballast-slave connector 7-way strip line connector
J5 ICP connector 10-way 2-row vertical through-hole boxed header
J13 4-way strip line socket
J14 4-way strip line connector
Lamp 1 Lamp connector 4-way PCB screw terminal, 5.08 mm
Lamp 2 Lamp connector 4-way PCB screw terminal, 5.08 mm
LD1 LS M67K-H2L1-1 2 mA red LED SMD 0805
LD2 LG M67K-G1J2-24 2 mA green LED SMD 0805
L1,L2 1.8 mH
L3 1.8 mH 95 mA Epcos BC series Axial inductor
L4 680 µH 240 mA Epcos LBC series Axial inductor
BAT46 DO 35 STMicroelectronics small signal Schottky diode
Choke inductor 2.62 mm gap, 267 turns (AWG40);
E25x13x7
NTC 15 Ω at 25 °C 3 A Inrush current suppressor
Q1,Q2,Q3 STP8NM50 TO220
STMicroelectronics N-CHANNEL 550 V 0.7 Ω - 8 A
MDmesh MOSFET
9/42
High-frequency ballast AN2708
Table 3. Ballast bill of material (continued)
Reference Value Description
Q4 BC817-25 NPN small signal bipolar
RS_1,RS_2 1 0.6 W 1% metal film resistor
RS1,RS2 0.82 1 W resistor
R29_1,
R29_2,Rf
R28_1,
R28_2,Rlow
R12,Rup 120 k Resistor
R1,R2,R9,
R10, R26_1,
R26_2, R27_1,
R27_2
R15,R19 10 k Resistor
R3 10 k 0.6 W 1% resistor
15 k Resistor
4.7 k Resistor
750 k 0.6 W 1% resistor
R4,R5,
R26_2A
R6,R16,R18 68 k Resistor
R7 33 Resistor
R8 12 k Resistor
R11 9.53 k 1% Resistor
R13 47 k Resistor
R14,R21,R22 10 Resistor
R17 22 1 W resistor
R20 1 k Resistor
R23 330 Resistor
R25 470 Resistor
R60,R68 0 SMD resistor 0805
R61 11 k 1% SMD resistor 0805
R62 4.7 k 1% SMD resistor 0805
R63,R64 1 k 1% SMD resistor 0805
R65 330 1% SMD resistor 0805
R66 4.7 1% SMD resistor 0805
180 k Resistor
R67 10 k 1% SMD resistor 0805
R69,R70 1 k 1% SMD resistor 0805
R71 1.2 k 1% SMD resistor 0805
R72 3 k 1% SMD resistor 0805
10/42
AN2708 High-frequency ballast
Table 3. Ballast bill of material (continued)
Reference Value Description
R100 68 k 1% SMD resistor 0805
R24_1,R24_
2
R30_1,R30_
2
T1 Transformer Choke boost inductor (ITACOIL E2543/E)
U1 L6562N STMicroelectronics transition-mode PFC controller
U2 L6574 STMicroelectronics ballast driver
U7 LE50CZ TO-92 STMicroelectronics very low drop voltage regulators
U8 VIPer12A-E DIP8
U9,U10 SFH6156-2 Optocoupler
U11 ST7FDALIF2M6 SO20
680 k Resistor
100 k 2 W resistor
STMicroelectronics offline SMPS primary IC 730 V 0.4 A
27R
STMicroelectronics
8-bit MCU with single voltage Flash memory, data
EEPROM, ADC, timers, SPI, DALI
Note: Resistors are 0.25 W unless specified. Q1, Q2 &Q3 are mounted with 8 °C/W heatsink.

2.1 PFC converter

This block allows drawing a quasi-sinusoidal current from the mains, in phase with the line voltage in order to get a PF very close to 1 (more than 0.99).
To achieve such high PF the boost topology is implemented because of the advantages it offers:
Minimum number of external components, thus making it a low-cost solution
Low input di/dt thus minimizing the noise generated at the input and, therefore, the
requirements on the input EMI filter
The switch is source-grounded, therefore is easy to drive
However, boost topology requires the DC output voltage (400 Vdc) to be higher than the maximum expected line peak voltage.
ST's L6562 has been used as the driver. It implements a transition mode control (fixed ON time, variable frequency), that, for such output power, is preferred to the fixed frequency average current mode being simpler and cheaper. The circuit operates on the boundary between continuous and discontinuous current mode.
Besides providing good results in terms of power factor, this IC considerably reduces the Total Harmonic Distortion (THD) as it reduces the conduction dead-angle that occurs to the AC input current near the zero-crossings of the line voltage.
11/42
High-frequency ballast AN2708
The basic design specifications are listed in Tab le 4 .

Table 4. PFC operating conditions

Parameter Value
Mains voltage range: Virms(min) - Virms(max) 90 – 265 Vac
Regulated DC output voltage: Vo 400 Vdc
Rated output power: Po 75 W
Minimum switching frequency: f
sw
Maximum output voltage ripple: ∆Vo < ± 10 V
35 kHz
Maximum overvoltage admitted: ∆V
Expected efficiency: η
PFC
OVP
60 V
> 90 V
For reference, it is useful to define also the following quantities:
Input power: Pi (= Po / η ) 80 W
Maximum mains RMS current: Iirms (= Pi/Virms(min)) 1 A
Rated output current: Io (= Po/Vo) 0.2 A
The design guidelines are deeply explained in AN966 ("L6561, enhanced transition mode power factor corrector"), AN1757 ("Switching from the L6561 to the L6562) and AN1089 ("control loop model of L6561-based TM PFC"). The main design formulas are summarized as follows inTab le 5.

Table 5. Power stage design equations

Input capacitor (C1) Boost inductor Power MOSFET (Q1) Boost diode (D1)
C1
Irms
------------------------------- ---------------------------------------- -=
2π fsw r Vinrmsmin⋅⋅⋅
where
r 0.01 0.1÷=
Output capacitor (C6)
Volume 4K L I2irms⋅⋅
V2irms Vo 2 Virms()
L
-------------------------------- --------------------------------------------- -=
where
2fswPi Vo⋅⋅⋅
K1410
⋅⋅
V
Vo ∆V
DSS
2
Pon I
Qrms
where
3–
Ie
------------ -
Igap
I
Qrms
2 2 Iirms
OVP
=
R
Vm inarg++=
DS on()
42
1
---------- -
---
9π
6
=
Virms
---------------- -
Vo
V
RRM
IF3Io=
1.2 Vo=
--------------------------------- ---------------- -
C6
4π fVoVo⋅⋅ ⋅
Po
Pcu
I2irms Rcu=
3
Pcross Vo Iirms t
⎛⎞
Pcap 3.3Coss V
⎝⎠
4
---
12/42
⋅⋅⋅=
fallfsw
1.5 drain
1
-- -
Cd V2drain+
2
P
lossesVTIDC
fsw⋅=
Rd I2rms+=
AN2708 High-frequency ballast

Table 6. L6562 biasing circuitry design equations

Pin 1 (INV) Pin 2 (COMP) Pin 3 MULT Pin 4 (CS)
OVP R
V
out
high
R
-------------------------------- ---------- -
2.5
=
6–
40 10
⋅⋅=
+()
highRlow
R
low
A RC-C network is placed between this pin and pin 1, leading to a low crossover frequency (some tens of hertz) as well as to an adequate phase margin.
A small capacitor of 10 nF filters the signal on MULT pin.
V
MULTpkx
------------------------------- -
Rlow
250 106–⋅
R
low
--------------------------------- -----
R
+
lowRhigh
-------------------------------- --------------- -=
2V
2.5
----------------------------- -==
250 106–⋅
2.5
inrmsmax
R
sense
Pin 5 (ZCD) Pin 6 (GND) Pin 7 (GD) Pin 8 Vcc
The supply voltage is provided by a capacitive power supply connected to the half-bridge inverter.
R
start
Vout 2 V
m
--------------------------------- ---------------------------------------=
R6
()
2.1 1.15
Vout 2 V
---------------------------------- ------------------------------------ -
()
m310
⋅⋅
inrmsmax
inrmsmin
3–
IC ground. As a layout hint, this pin has to be kept separated from power ground. All the IC signals have to be referred to this pin.
Gate driver. A "bleeder" resistor between
the gate and the source is used to avoid undesired switch-on, without affecting the power consumption.
The PFC preregulator performances are shown in the following graphs:

Figure 4. PFC performances at 230 Vac-50 Hz

V
⎛⎞
inrmsmin
1.65 2.5
--------------------------------- --------------------------------------- -
Pd Rs I
-------------------------------- -
⎜⎟
V
⎝⎠
inrmsmax
22I
⋅⋅
inrms
2
=
Qrms
V
inrmsmin
-------------------------------- --------------=
I
2
startup
CH1 (yellow): rectified input voltage CH2 (blue): input current
13/42
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