ST AN2658 Application note
AN2658
Application note
Using the analog to digital converter of the STM8S microcontroller
Introduction
The purpose of this application note is to explain how to use the Analog to Digital Converter
implemented in many of the STM8S microcontroller family devices. It provides useful
information on how to configure the ADC registers and microcontroller resources and use
the ADC in different modes.
The STM8 firmware library, containing source code of all the examples described in this
application note, can be downloaded from the STMicroelectronics website: www.st.com.
July 2009 Doc ID 14152 Rev 2 1/23
www.st.com
Contents AN2658
Contents
1 ADC hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 General properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 ADC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Summary of features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Clock selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Conversion triggers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 ADC speed/sampling time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6 Input analog channel selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7 Data storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8 Extended functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8.1 Buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8.2 Buffer overrun flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.8.3 Analog watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.8.4 Scan mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.8.5 Bandgap reference channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Configuring ADC registers for conversion . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Selecting the operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.1 Single conversion mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.2 Continuous conversion mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.3 Conversion on external trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1.4 Scan conversion mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 Conversion speed selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3 Analog input selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4 Storing converted values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5 Analog watchdog function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.6 ADC interrupt management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Practical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 Areas of use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/23 Doc ID 14152 Rev 2
AN2658 Contents
4.2 Hardware connection examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3 Methods for precision improvement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5 Design recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 Displaying the ADC conversion result using LEDs . . . . . . . . . . . . . . . 20
6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.2 Hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3 Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7 ADC conversion triggered by TIM1 timer . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.2 Hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.3 Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Doc ID 14152 Rev 2 3/23
ADC hardware description AN2658
1 ADC hardware description
1.1 General properties
STM8 family microcontrollers include one Analog to Digital Converter which has up to 16
multiplexed inputs. Depending on the STM8 device, the ADC can be one of two types:
● A basic ADC type named ADC2
● An extended ADC type named ADC1
The resolution of both ADC types is 10 bits. The number of external analog inputs depends
on the package size of the chosen STM8 family device.
The ADC is a successive approximation Analog to Digital Converter (SAR). Conversion can
be performed in continuous mode or single mode. The analog input channels can be
selected individually or in scan mode. In scan mode, several channels are converted in
sequence, the channel number is incremented for each conversion. The digital result is then
stored in registers. Because the ADC resolution is 10 bits and the ADC data register bit
length is 16, one ADC result is stored in two 8-bit registers. The 10-bit data is either right or
left aligned (this is selectable) in the 16-bit register. Devices with ADC1 can use buffered
mode for data storage. In this case, the values converted by the ADC are stored in N data
buffers (to decrease CPU overhead).
The event used to start conversion can be generated by software or by the STM8
microcontroller's internal timer 1 (any type of timer event can be used). The start of A/D
conversion can also be triggered by an external pin.
The reference voltage for the ADC depends from package. It comes either from an external
source - in this case the reference must be connected to two external pins - or is connected
internally to analog power supply pins. The value of this reference voltage is restricted in its
magnitude - must be from 2.75V up to V
and V
. Resolution can be increased by so-called analog zooming - using a smaller
REF-
. The measured voltage must be between V
DDA
REF+
reference voltage around the range of values to be measured.
Devices with ADC1 have an analog watchdog function. This function compares the
converted data with high and low thresholds and if a threshold is reached then the analog
watchdog flag is set.
If needed, an interrupt can be generated at the end of conversion and if an analog watchdog
event occurred.
The ADC is driven by a clock derived from the MCU master clock through a programmable
divider. This allows you to select the ADC clock speed according to your application
requirements.
4/23 Doc ID 14152 Rev 2
AN2658 ADC hardware description
V
REF+
V
REF-
V
DDA
V
SSA
Power/Analog
pins
AIN0
GPIOs
AIN1
AIN15
ADC_ETR
Timer 1
Analog to digital converter
ADC registers
Clock
End of conversion
Data bus
EOC interrupt
Data register (10-bits)
f
MASTER
f
ADC
prescaler
trigger
V
REF+
V
REF-
V
DDA
V
SSA
Power/Analog
pins
AIN0
GPIOs
AIN1
AIN15
ADC_ETR
Timer 1
Analog to digital converter
ADC registers
Clock
End of conversion
Data bus
Overrun flag
Data register (10-bits)
f
MASTER
f
ADC
prescaler
trigger
Data buffer register 1
Data buffer register n
Bandgap reference
Analog watchdog registers
AWD interrupt
EOC interrupt
U = 1.232V
Analog watchdog
Figure 1. ADC2 block diagram (basic ADC)
Figure 2. ADC1 block diagram (extended ADC)
Doc ID 14152 Rev 2 5/23
ADC hardware description AN2658
conversion time (14 clocks)
sync clock*
3 clocks sampling time
10 clocks conversion
Power-on ADC
ADON=1
CLK
ADON
EOC
t
STAB (7µs)
Start conversion
ADON=1 or trigger
End of conversion
Software reads
ADC data
Software clears
EOC bit
Start conversion
ADON=1 or trigger
ADC inactive
next conversion
conversion time (14 clocks)
Power-on ADC
ADON=1
CLK
ADON
EOC
t
STAB (7µs)
Start conversion
ADON=1 or trigger
End of conversion
Software clears
EOC bit
Next conversion
starts immediately
next conversion time (14 clocks)
Software reads
ADC data
1.2 ADC operation
The ADC can operate in single or continuous mode. In single mode, the ADC stops after
one conversion. In continuous mode, it continues converting (on the same channel or
different channel).
Figure 3. and Figure 4. describe ADC operation in single and continuous mode.
Figure 3. Single conversion mode
Figure 4. Continuous conversion mode
In devices with ADC1, these two modes can be usefully combined with scan mode and use
of the data buffer registers (buffered mode).
Figure 5. shows all the possible ADC1 operating modes. ADC2 does not support scan and
buffered modes.
6/23 Doc ID 14152 Rev 2
AN2658 ADC hardware description
Start
Stop
Channel 1 conversion
Multiple channels
Scan conversion (buffered)
Start
Channel X conversion
Single channel
Continuous conversion
Start
Channel X conversion
Single channel
Continuous and
Buffered conversion
...
Channel n conversion
Start
Stop
Channel X conversion
Single channel
Single conversion
Channel X conversion
Channel X conversion
Channel X conversion
Start
Channel 1 conversion
Multiple channel
Continuous and
Scan conversion (buffered)
...
Channel n conversion
Figure 5. ADC1 operating modes
Doc ID 14152 Rev 2 7/23
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