ST AN2657 Application note

AN2657

Application note

An innovative verilog model for predicting

LDMOS DC, small and large signal behavior

Introduction

To reduce the design cycle time and cost for wireless applications it is useful to have models that can help RF Engineers predict and simulate the behavior of RF power transistors. Recently, STMicroelectronics has been strongly focused on developing new models for RF LDMOS power transistors.

The model introduced here is simple in concept, and describes with good approximation DC, small signal S-parameter and large signal behavior, and could be a starting point for designers in developing their new applications. This model has been implemented in Agilent Advanced Design System, in verilog Language, and includes the parasitic elements of the package, as well as a thermal node which takes self heating effects into account.

In this applicatio note we will briefly describe how to extract the model parameters for the PD54003L-E device, which is a 3 W - 7.2 V - 500 MHz LDMOS housed in a PowerFLAT plastic package (5 x 5 mm). As an internally unmatched device, the PD54003L-E can be used in various portable applications over HF, VHF and UHF frequency bands. At the end of this note we will validate this new model using ST's DB-54003L-175 demoboard, especially designed for 2-way portable radio applications using PD54003L-E over the 135-175 MHz frequency band.

Thanks to their cost effectiveness and high performance, LDMOS devices are widely used in radio frequency applications, ranging from digital communication infrastructures (cellular base stations) to low cost portable radios (private mobile radios) commonly known as walkie-talkies.

November 2007

Rev 1

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www.st.com

Contents	AN2657

Contents

1	Model description and parameter extraction . . . . . . . . . . . . . . . . . . . .	. 4
2	Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
3	References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
4	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17

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AN2657	List of figures

List of figures

Figure 1.	Model schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 4
Figure 2.	Rjfet vs. Vds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 7
Figure 3.	Gate-drain charge variation vs. Vds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
Figure 4.	Generic internal RF package structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
Figure 5.	PowerFLAT cross-section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
Figure 6.	Simulated version of the PowerFLAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 7.	S-parameters of the simulated package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
Figure 8.	Overall model schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 9.	Measured Ciss, Coss, Crss vs. simulated parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
Figure 10. Measured S-parameters vs. simulated parameters (Vds= 7.2 V; Idq= 100 mA) . . . . . . . .		14
Figure 11.	Measured input and output DC curves vs. simulated curves . . . . . . . . . . . . . . . . . . . . . . .	14
Figure 12.	DB-54003L-175 demoboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
Figure 13.	Measured RF demonstration board performance vs simulated performance. . . . . . . . . . .	15

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Model description and parameter extraction	AN2657

1 Model description and parameter extraction

The model introduced in this application note is a behavioral model with the equations written in verilog language [1] [2].

Figure 1. Model schematic

By observing the equivalent model schematic of Figure 1, the following elements can be noted:

●Parasitic elements associated with the device

●Nonlinear current generator

●JFET resistance

●Substrate-body diode

Parasitic elements

To model the parasitic elements of the device, a resistor and an inductor are placed in series at each terminal. The model can change the resistance and inductance values according to the simulation temperature.

Parameter P in Equation 1 is the temperature dependence, where Tc is its temperature coefficient, T is the temperature used in the simulation and Tnom is the temperature used to measure the parameter value.

Equation 1

P(T) = P(TNOM) (1 + TC (T – TNOM))

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AN2657 Model description and parameter extraction

Nonlinear current generator

The nonlinear current generator controlled by Vgs and Vds is the most important factor used to calculate the static and dynamic current of the device. Moreover, the static current is required to define the working region of the MOS.

Table 1.	Parameters required for the extraction of the current generator equations
	Name	Description
	VT0	Threshold voltage [V]
	ETA	Drain induce barrier lowering (DIBL) [V-1]
	KP0	Transconduttance [A*V-2]
	THETA	Mobility degradation [V-VGTHETA]
VGTHETA		Mobility degradation exponent [-]
THETA2..9		From 2nd to 9th degradation polynomial factor [V-2]
	XN	Slope subthreshold current [V-1]
	DEL	Body effect linearization coefficient [-]
DELVG		Body effect linearization coefficient independent of Vgs [V-1]
	L0	Critical length [m]
	L	Channel length [m]
	EPS	Output conductance factor if L0>L [m]
	KE	Output conductance factor if L0<L [Vm]
DT_KP		Mobility thermal coefficient [-]
	DT_VT	Thermal coefficient of threshold voltage [°C-1]

Table 1 reports all the parameters required to extract the equations of the current generator. To get the generator current equation, a set of equations must be defined. An important parameter to consider is the threshold voltage of the device shown in Equation 2.

Equation 2

V	TH	= V	T0	– η V	DS	+ DVVT (T – T	NOM	)
						-

Moreover, a new threshold voltage formula is necessary to describe the weak and strong inversion region in a single equation (Equation 3).

Equation 3

VR = VTH – 2 XN UTH
UTH	K T
	= --------------
	q

To describe both regions, a new gate voltage can be defined as in Equation 4.

Equation 4

						------------------------------------Vgs – VR
Vgg				XN	UTH	2 XN UTH
	= VTH	+ 2				e
					Vgs

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Model description and parameter extraction		AN2657
Equation 5	T( ° K)	-
KP = KP0	TNOM( ° K)	DTKP

Another important parameter to define is the gain factor with zero bias. Referring to Equation 5, 6 and 7, the gain factor degrades according to the Vgs voltage (mobility degradation). Equation 8 and 9, which define the drain saturation voltage, complete the set of equations needed to define the generator current (Equation 10 and 11).

Equation 6

1

Vgst ≤ 0

9

F( Vgst) =

+ T

V

vgT

I

Vgst > 0

1

gst +

∑TI V gst

I = 2

Equation 7

KPEFF =

KP

-------------------

F( Vgst)

Equation 8

A = L02 – L2

L

L0

2

B =

--δ

C =

KE L3

δ= ∆ + ∆VG

Vgg

δ= ∆ + ∆VG Vgg

D1 =

( B – A)

( Vgg – VTH) – C

( 1 – δ)

D2 =

D21 – 4

C

( Vgg – VTH)

( 1 + δ)

( 0.5

A – B)

Equation 9

VDSAT =

D2

+ D1

-----------------------------------------------------

( 1 + δ) ( 2 B – A)

Equation 10

KPEFF

Vds

( V gg – VTH – 0.05

Vds ( 1 + ∆ ) )

VDS < VDSAT

Vds – VDSAT

IDS =

IDSS

1 +

A

------------------------------------------

VDS ≥ VDSAT

B VDSAT + C

Equation 11

IDSS =

KPEFF

VDSAT ( Vgg–VTH – 0.5

VDSAT ( 1 + ∆ ) )

The automatic ADS optimizer was used to extract the parameters for the current generator. The threshold voltage and the gain factor have been extracted from the input characteristics with Vds at a low voltage level. Concerning mobility degradation, the transconductance parameter was used varying Vds and with Vgs at a high voltage level. The sub-threshold voltage was extracted from the input characteristics with a gate voltage level below the threshold voltage level.

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