Who has never experienced oscillations issues when using an operational amplifier? Opamps are often used in a simple voltage follow e r co nf igu r at ion . Howev er, this is not the b est
configuration in terms of capacitive loading and potential risk of oscillations.
Capacitive loads have a big impact on the stability of operational amplifier-based
applications. Several compensation methods exist to stabilize a standard op-amp. This
application note describes the most common ones, which can be used in most cases.
The general theory of each comp en sa tio n me th od is explained, and based on this, specific
data is provided fo r the TS507. The TS507 is a high precision rail-to-rail amplifier, with very
low input offset volta ge, and a 1.9 MHz gain bandwidth product, which is available in
SOT23-5 and SO-8 packages.
This document simplifies the task of designing an application that includes the TS507. It
spares you the time-consuming effort of trying numerous combinations on bench, and it is
also much more accurate than using Spice models which are not designed to study system
stability, even though they can give a general trend.
Consider a linear system modeled as shown in Figure 1.
Figure 1.Linear system with feedback model
VinVout
-
The model in Figure 1 gives the following equation:
out
---------------- -
1Aβ+
V
A
---------------- -
1Aβ+
is named closed loop gain.
From this equation, it is e vident that f or Aβ = -1, the circuit is unstable (V
V
).
in
Aβ is the loop gain.
A
ß
A
⋅=
V
in
is independent of
out
To evaluate it, the loop is opened and -V
is calculated as shown in Figure 2.
r/Vs
Figure 2.Loop gain calculation
A
Vout
-
Vs
Opening the loop leads to the following equation:
If a small signal V
amplitude above t hat of V
then the system oscillates and is unstable.
This leads to the definition of the gain mar gin, which is the opposite of the loop gain (in dB)
at the frequency for which its phase equals -180°. The bigger the gain margin, the more
stable the system. In addition, the phase margin is defined as the phase of the loop gain
plus 180° at the frequency for which its gain equals 0 dB. Therefore, from the value of Aβ it
is possible to determine the stability of the system.
is sourced into the system, and if Vr comes back in phase with it with an
s
(which means that Aβ is a real number g reater than or e qual to 1)
s
Vr
V
------–Aβ=
V
s
ß
r
3/22
Stability basicsAN2653
1.2 Operational amplifier modeling for stability study
Figure 3 illustrates the definition of phase and gain margins in a gain configuration.
Figure 3.Illustration of phase and gain
Figure 4.TS507 open loop gain
margins
Gain (dB)
-40
-80
-120
-160
-200
Loop Gain
40
0
Phase Margin
1.E+00
1.E+01
1.E+02
1.E+03
Frequency (Hz )
GainPhase
1.E+04
Gain Marg in
1.E+05
1.E+06
0
-45
-90
-135
-180
-225
-270
1.E+07
1.E+08
160
130
100
70
Phase (°)
Gain (dB)
40
10
-20
1.E-02
1.E-01
To apply this stability approach to operational amplifier based applications, it is necessary to
know the gain of the operation al amplifier when no f e edbac k and n o loads are used. I t is the
open loop gain (A(ω)) of the amplifier (shown in Figure 4 for the TS507). From this
parameter, it is possible to model the amplifier and to study the stability of any gain
configuration.
Figure 5.Equivalence between schematics and b lock diagram
TS507 Open Loop Gain
1.E+00
1.E+01
1.E+02
Frequency (Hz )
GainPhase
TS507 :
Vcc = 5 V
Vicm = 2.5 V
T = 25 °C
1.E+03
1.E+04
1.E+05
0
-30
-60
-90
Phase (°)
-120
-150
-180
1.E+06
1.E+07
The loop gain is:
V
r
------–A ω()
V
s
This equation shows the impact of the gain on the stability: if R
loop gain of the system increases and the loop gain decrease s. Because the phase remains
the same, the gain margin increases and stability is improved.
In addition, if you consider the case of a second order system such as the one shown in
Figure 6, a decrease of the loop gain allows to pass the 0 dB axis before the second pole
occurs. It minimize s the ef fect of the phase drop due to t his po le, and as a result, the phase
margin is higher. Therefore, a voltage follower configuration is the worst case for stability.
4/22
------------------ -
⋅=
RfRg+
R
g
increases, the closed
f/Rg
AN2653Stability basics
Figure 6.Impact of closed loop gain on stability
G
loop gain
(dB)
0
Closed Loop Gain (Case1) < Closed Loop Gain (Case 2)
Another parameter that impacts stability is the amplifier output impedance Z
this parameter in the model of the amplifier leads to t he model shown in Figure 7.
Figure 7.Follower configuration model with
capacitive load for loop gain
calculation
Case 1
Case 2
f
. Including
o
Figure 8.TS507 output impedance Zo
TS507 Output Impedance (Zo)
1.E+05
1.E+04
1.E+03
1.E+02
Impedance ( Ohm)
1.E+01
1.E+00
TS507 :
Vcc = 5 V
Vicm = 2,5 V
T = 25 °C
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
Frequency (Hz )
Impedanc ePhase
1.E+05
90
45
0
-45
-90
-135
1.E+06
1.E+07
Zo is neither constant over frequency nor purely resistive. Figure 8 shows how the output
impedance varies with the frequ ency in t he case o f the TS507 . Thes e variations complicate
the stability study.
Finally, to study the stability of an op-amp based system, two parameters need to be taken
into account in order to better fit reality: th e amplifier open-loop g ain and the amplifier ou tput
impedance. Then, a calculation of the loop gain indicates how stable the system is.
Phase (°)
5/22
Stability in voltage follower configurationAN2653
2 Stability in voltage follower configuration
This section examines a v o ltage follower configuration because it is the worst case scenario
for stability (compared with a gain configuration).
Figure 9.Voltage follower configurationFigure 10. Closed loop gain measured for a
voltage follower configuration
Voltage Follower Configuration - Closed Loop Gain
20
10
0
-10
Gain (dB)
-20
-30
-40
Without CL
CL=550 pF
TS507 :
Vcc = 5 V
Vicm = 2,5 V
T = 25 °C
RL = 10 kΩ
1.E+03
1.E+04
Gain without CLGain with CL = 550 pF
1.E+05
Frequency (Hz )
1.E+06
1.E+07
In voltage follower configuration, the loop gain is:
V
r
------–
V
s
----------------------------------------- -=
1
A ω()
Z
o
------ - jZoCLω++
R
L
The capacitive load adds a pole to the loop gain that impacts the stability of the system. The
higher the frequency of this pole, the greater the stability. In fact, if the pole frequency is
lower than or close to the unity gain freq uency, the pole can have a significant negative
impact on phase and gain margins. It means that the stability decreases when the
capacitive load increases.
Without C
, the system is stable. Howe ver, Figure 11 and Figure 12 show , f or the TS507, t he
L
oscillations due to instability with and without an AC input signal for a capacitive load of
550 pF. The oscillation frequency is in line with the peaking frequency observed in a closed
loop gain configuration (approximately 1.9 MHz according to Figure 10).
6/22
AN2653Stability in voltage follower configuration
Figure 11. Input and output signals measured
with grounded input
Voltage Follower Configuration -
0.08
0.06
0.04
Output Signal with Input Grounded
TS507 :
Vcc = 5 V
Vicm = 2,5 V
T = 25 °C
RL = 10 kΩ
CL = 550pF
0.02
0
Amplitude (V)
-0.02
-0.04
-0.06
0.000.501.001.502.00
Time (μs)
Output Si gnalInput Signa l
To remove this instability and work with higher capacitive loads, many compensation
methods exist, and this applicatio n note examines some of them. By adding zeroes and
poles to the loop gain, stability can be improved.
However, compensation components have to be chos en carefully. A compensation scheme
can indeed improve stability, but can also lead the system to instability, depending on the
choice of component values . Similarly, a compensation configurationcan work f or a specific
load, but modifying this load can affect stability.
Figure 12. Input and output signals measured
for an AC input signal
Voltage Follower -
0.2
0.15
0.1
0.05
0
Amplitude (V)
-0.05
-0.1
-0.15
0100200300400500
Input and Output Signals
Time (μs)
Output Si gnalInput Signal
TS507 :
Vcc = 5 V
Vicm = 2,5 V
T = 25 °C
RL = 10 kΩ
CL = 550 pF
7/22
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