ST AN2620 Application note

AN2620

Application note

3 A high-frequency synchronous 900 kHz

step-down converter based on the ST1S10

Introduction

The ST1S10 is a step-down DC-DC converter with an optimized inhibit function for powering high-voltage LCD applications and low-voltage digital core HDD applications. Generally, it replaces the high current linear solution when high power dissipation is a problem. It provides up to 3 A over an input voltage range of 2.5 V to 18 V and synchronous rectification saves the external Schottky diode. A high internal switching frequency (0.9 MHz) allows it to use tiny surface-mount components, as well as the resistor divider, to set the output voltage value. Only an inductor and 3 capacitors are required. The current PWM mode architecture and stable operation with low E.S.R SMD ceramic capacitors results in low, predictable output ripple. To maximize the power conversion efficiency in light load, the regulator can work in burst mode automatically. The device can operate in PWM mode at a fixed frequency or synchronized to an external frequency. It switches at a frequency of 900 kHz when SYNC is connected to ground or a fixed voltage (less than 5.5 V) and synchronizes the switching frequency between 400 kHz to 1.2 MHz from the external clock that is applied to SYNC. A thermal shutdown circuit is integrated and activates at 150 °C. Cycle-by-cycle current limitation provides protection against shorted outputs. The on-chip 260 µs power-on reset ensures the proper operation when switching on the power supply. The quiescent current is less than 6 µA in the inhibit state. The device is available in MLP4x4 and SO-8 ePad packages.

Figure 1. Simplified schematic

May 2010 Doc ID 13883 Rev 3 1/20

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Contents AN2620

Contents

1 Application information component selection . . . . . . . . . . . . . . . . . . . . 4

1.1 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.3 Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Board usage recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1 External component selection for the ST1S10 demonstration board . . . . 13

4.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.3 Capacitors selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.4 Heavy capacitive load condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.5 Low output voltage (Vout < 2.5 V) and 2.5 V < Vin < 8 V . . . . . . . . . . . . . 14

4.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Layout thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/20 Doc ID 13883 Rev 3

AN2620 List of figures

List of figures

Figure 1. Simplified schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. ST1S10 demonstration board typical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 3. Demonstration board layout ST1S10 MLP package - top side . . . . . . . . . . . . . . . . . . . . . . 10

Figure 4. Demonstration board layout ST1S10 MLP package - bottom side . . . . . . . . . . . . . . . . . . . 10

Figure 5. Demonstration board layout ST1S10 SO-8 ePad - top side . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 6. Demonstration board layout ST1S10 SO-8 ePad package - bottom side. . . . . . . . . . . . . . 11

Figure 7. Enable jumper selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 8. External synchronization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 9. ST1S10 application schematic for heavy capacitive load . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 10. ST1S10 application schematic for low output voltage (Vout < 2.5 V) and

2.5 V < Vin < 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 11. ST1S10 application schematic for low output voltage (Vout < 2.5 V) and

8 V < Vin < 16 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 12. PCB layout suggestion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 13. PCB layout Vin_A and Vin_SW detail. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 14. PCB layout details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Doc ID 13883 Rev 3 3/20

Application information component selection AN2620

1 Application information component selection

1.1 Input capacitor

The ST1S10 features two VIN pins: V

switching peak current is drawn, and V

drivers. The V

input capacitor reduces the current peaks drawn from the input power

IN_SW

for the power supply input voltage where the

IN_SW

to supply the ST1S10 internal circuitry and

IN_A

supply and reduces switching noise in the IC. High power supply source impedance requires

larger input capacitance.

For the V

input capacitor the RMS current rating is a critical parameter that must be

IN_SW

higher than the RMS input current. The maximum RMS input current can be calculated

using the following equation:

Equation 1

RMSIO

⋅

-------------- -–

where η is the expected system efficiency, D is the duty cycle and I

------ -+⋅= η

the output DC current.

This function reaches its maximum value at D = 0.5 and the equivalent RMS current is equal to IO divided by 2 (considering η= 1).

The maximum and minimum duty cycles are:

Equation 2

outVF

MAX

-----------------------------------=

–

inMINVSW

Equation 3

MIN

outVF

-------------------------------------=

–

inMAXVSW

where V internal PDMOS. Considering the range D I

RMS

A minimum value of 4.7 µF for the V

is the voltage drop across the internal NMOS and VSW the voltage drop across the

MIN

to D

following through the input capacitor.

and a 0.1 µF ceramic capacitor for the V

IN_SW

suitable in most application conditions. A 10 µF or higher ceramic capacitor for the V and a 1 µF (V

) are advisable in case of higher power supply source impedance or where

IN_A

it is needed to have long wires between the power supply source and the V above suggested higher input capacitors values are also advisable in case of high output capacitive load which can impact the switching peak current drawn from the input capacitor during the startup transient.

It is also advisable to use ceramic capacitors with a voltage rating in the range of 1.5 times the maximum input voltage. The input capacitors should be located as close as possible to the V

pins.

Different capacitors can be considered:

● Electrolytic capacitors. These are the most commonly used because they are the least

expensive and are available with a wide range of RMS current ratings. The only

4/20 Doc ID 13883 Rev 3

it is possible to determine the max

MAX

pins. The

IN_A

IN_SW

are

AN2620 Application information component selection

drawback is that, considering a requested ripple current rating, they are physically larger than other capacitors.

● Ceramic capacitors. If available for the requested value and voltage rating, these

capacitors usually have a higher RMS current rating for a given physical dimension (due to the very low ESR). The drawback is the quite high cost.

● Tantalum capacitor. Very good tantalum capacitors are becoming available, with very

low ESR and small size. The only problem is that they occasionally can burn if subjected to very high current during the charge. So, it is better to avoid this type of capacitor for the input filter of the device. In fact, they can be subjected to high surge current when connected to the power supply.

1.2 Output capacitor

The output capacitor is very important in satisfying the output voltage ripple requirement. Using a small inductor value to reduce the size of the choke is useful, but increases the current ripple. So, to reduce the output voltage ripple, a low ESR capacitor is required.

The most important parameters for the output capacitor are the capacitance, the ESR and the voltage rating.

The capacitance and the ESR affect the control loop stability, the output ripple voltage, and transient response of the regulator. The ripple due to the capacitance can be calculated by the following formula:

Equation 4

0.125 ΔISW⋅

-------------------------------- -=

SCout

⋅

where F

ripple C()

is the PWM switching frequency and ΔISW is the inductor peak-to-peak switching

current that can be calculated as:

Equation 5

VinV

–()

ΔI

------------------------------

out

D⋅=

L⋅

where D is the duty cycle while the ripple due to the ESR is given by:

Equation 6

ripple ESR()ISw

Δ ESR⋅=

Use the above equations to define capacitor selection range, but final values should be verified by testing an evaluation circuit.

Lower ESR ceramic capacitors are usually advisable to reduce the output ripple voltage. Capacitors with higher voltage ratings have lower ESR values, providing lower output ripple voltage.

Also the capacitor ESL value impacts the output ripple voltage, but ceramic capacitors usually have very low ESL, making ripple voltages due to the ESL negligible. In order to reduce ripple voltages due to a parasitic inductive effect, keep the output capacitor connection paths as short as possible.

Doc ID 13883 Rev 3 5/20

Application information component selection AN2620

The ST1S10 has been designed to have the best performances with ceramic capacitors. In typical application conditions a minimum value of 22 µF ceramic capacitor is suggested on the output, but higher values are suitable considering that the control loop has been designed to properly work with a natural output LC frequency given by a 3.3 µH inductor and 22 µF output capacitor in the typical application (V

=12 V, V

out

=5 V).

It is advisable to use ceramic capacitors with a voltage rating in the range of 1.5 times the maximum output voltage.

1.3 Inductor

The inductor value is very important because it fixes the ripple current flowing through the output capacitor. The ripple current is usually fixed at 20-40% of I I

= 3 A. The inductor value is approximately obtained by the following formula:

Omax

Equation 7

–

inVout

-------------------------

⋅=

IΔ

, that is 0.6-1.2 A with

Omax

where, T

For example, with V

is the ON time of the internal switch, given by D · T.

= 3.3 V, Vin = 5 V and ΔIO = 0.45 A, the inductor value is about

out

2.8 µH. The peak current thought the inductor is given by:

Equation 8

IΔ

PKIO

---- -+=

≥

SATIPK

It can be seen that if the inductor value decreases, the peak current (that has to be lower than the current limit of the device) increases. So, for fixed the peak current, a higher value of the inductor allows a higher value for the output current.

The ST1S10 is designed to have maximum performance with a 3.3 µH inductor value at 900 kHz.

The peak inductor current must be designed in order to not exceed the switching current limit.

6/20 Doc ID 13883 Rev 3

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