AN2615
Application note
A high precision, low cost, single supply ADC for
positive and negative input voltages
Introduction
In general the ADC embedded in the ST7 microcontroller is enough for most applications.
But, in some cases it is necessary to measure both positive and negative voltages. This
requires an external ADC with this particular capability. Most external ADCs require a dual
supply to be able to do this. However, microcontroller-based applications usually only have a
positive supply available.
This application note describes a technique for implementing an ADC for measuring both
positive and negative input voltages while operating from a single (positive) supply. This
converter is based on a voltage-to-time conversion technique. Like other slope converters,
this ADC also uses an integrating capacitor, but the measured time is inversely proportional
to the input voltage. An additional comparator with a voltage reference is used to improve
conversion accuracy.
As shown in the circuit diagram (Figure 1 on page 6), the converter is implemented using an
integrating capacitor, resistor, external op-amp, comparators and some microcontroller I/O
pins. The ST72F264 microcontroller is used in this application note as an example, but the
implementation is feasible using any ST7 microcontroller. The 16-bit timer of the
microcontroller measures the time using its input capture pins (PB0 and PB2). These pins
are connected to the output of the Comp1 and Comp2 comparators. The I/O pins PB1 and
PB3 are used to switch the M1 and M2 switches on or off. The circuit could also work with a
microcontroller equipped with an 8-bit timer. Only a small modification to the software would
be needed.
August 2007 Rev 1 1/37
www.st.com
Contents AN2615
Contents
1 Circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Theory of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Advantage of using two comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Circuit analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5V
vs time diagram for different input voltages . . . . . . . . . . . . . . . . . 10
out
6 Characteristics of different slope converters . . . . . . . . . . . . . . . . . . . . 11
6.1 Single-slope converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.1.1 Single-slope converter timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.2 Dual-slope converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2.1 Dual-slope converter timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.3 Solution presented in this application note . . . . . . . . . . . . . . . . . . . . . . . . 13
7 Error analysis/constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1 Input offset voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2 Correction factor for the product of R*C . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.3 Value of charging resistance R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.4 Charging capacitor C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.5 16-bit timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.6 Effect of temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.7 Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 Voltage references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9 Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10 Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
11 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/37
AN2615 Contents
11.1 Positive input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
11.2 Negative input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11.3 Effect of the capacitor value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
12 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
13 References and bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Appendix A Input stage conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.1 Case 1: Voltage measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.2 Case 2: Current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Appendix B Application board schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Appendix C Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Appendix D Software flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
D.1 Code size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3/37
List of tables AN2615
List of tables
Table 1. Results for positive input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 2. Results for negative input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 3. Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 4. Code size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4/37
AN2615 List of figures
List of figures
Figure 1. Circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Relationship between Vout and time for a given input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. V
Figure 5. Single-slope converter circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Single-slope converter timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Dual-slope converter circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Dual-slope converter timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. V
Figure 10. Voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Algorithm flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Results for positive input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Measured vs input for positive voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 15. Error vs input for positive input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 16. Results for negative input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 17. Measured vs input for negative voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 18. Error vs input for negative input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 19. Results for positive input with a 10 µF capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 20. Voltage measurement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 21. Potential divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 22. Use of input buffer for voltage measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 23. Current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 24. Application board schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
vs time for different input voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
out
versus time in AN2615 solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IN
5/37
Circuit diagram AN2615
1 Circuit diagram
Figure 1. Circuit diagram
PB1
M1
I
358
R
C
Amp
S
Comp1
358
V
out
D
V3
PB0
1. V1 < V2 < V3
V1
R
PB3
M2
V
IN
V2
358
Comp2
PB2
6/37
AN2615 Theory of operation
2 Theory of operation
V
is the input voltage. The voltages across resistor R are the reference voltage V1 and the
in
input voltage V
op-amp. Therefore, for a given input voltage, the current flowing through resistor R is
constant. Let this current be I.
Current I charges the capacitor C, and output starts increasing in a positive direction for the
input V
<= V1 (input Vin > V1 charges in the opposite direction).
in
The output is captured at two instants using the two output comparators at voltage
references V
respectively. The final reading of time T
The input voltage is calculated from this difference through the formulae given in the circuit
analysis.
This technique can only be used where the input voltage varies slowly, otherwise the
charging of the capacitor is non-linear.
2.1 Advantage of using two comparators
. Due to the properties of the op-amp, V1 is output on the inverting pin of the
in
and V3. The time corresponding to voltage levels V2 and V3 are T2 and T3
2
is taken as the difference of T3 and T2.
m
The purpose of using the second comparator (comp2) can be understood from the diagram
below (Figure 2), which shows the relationship between the op-amp output (Amp in
Figure 1: Circuit diagram on page 6) and the time for a given input value.
Figure 2. Relationship between V
V
out
V3
V2
V1
and time for a given input
out
Point o f
uncertainty
T2
T
m
T3
Time (t)
The time is measured as the difference of the two timer readings (T3 -T2) for the same
slope. So factors like the residual voltage of the capacitor ( V
(0+)) and any other constant
c
errors (like the effect of output offset voltage) on the output side of the op-amp are
subtracted. So its performance is better than a single-slope converter.
7/37
Timing diagram AN2615
3 Timing diagram
Figure 3 shows the overall operation of the ADC. Initially the capacitor is in the reset state
(M1- on and M2- off), the op-amp output V
comparators, Comp1 and Comp2 is high.
Capacitor charging can be started by switching M1 - off and M2 - on. When the charging
starts, V
rises. When V
out
becomes greater than V2, a falling edge occurs on Comp1. This
out
causes an input capture at pin PB2 and software reads the timer value T
When V
becomes greater than V3, a falling edge occurs on Comp2. Again this causes an
out
input capture at pin PB0 and software reads the timer value T
The capacitor is discharged by switching M1 - on and M2- off. After this, the ADC can be
kept in reset condition by switching M1 - on and M2 - off or we can continue repeating the
same process and make more measurements.
Figure 3. Timing diagram
is at V1 and so, the output of both
out
2
.
3
.
V
out
V3
V2
V1
Comp1
Comp2
M1
M2
Charging
0
T2
time
T
m
Discharg.
time
T3
Settling
time
Time (t)
T
m
8/37
AN2615 Circuit analysis
4 Circuit analysis
In this analysis, it is assumed that there is no noise present and the i/p offset voltage of the
op-amp is negligible.
I = (V
– Vin)/R = C * dVc/dt
1
Where, V
Applying the Laplace transform:
or,
Applying the inverse Laplace transform, we get
As shown in Figure 3: Timing diagram on page 8
So,
And,
Equation (2) and equation (3) can both be used as the characteristic equation for this
converter, but factors like Vc(0+) and other constant errors remain present. But if we use
both comparators, then we can remove these factors by subtracting equation (2) and
equation (3).
= V
c
(V
– Vin)/s * R = C * (s Vc(s) – Vc (0+))
1
(V
– Vin)/s2 = (R * C) * ( Vc (s) - Vc(0+)/s)
1
(V
– Vin) * T = (R * C) * ( Vc(t) - Vc(0+) ) ------------------- (1)
1
At T = T
– V1 and current ‘I’ is constant for a given input.
out
, Vc(T2) = V2 – V
2
1
And, at T =T3, Vc (T3)= V3 – V1
(V
– Vin) * T2 = (R * C) * (V2 – V1 - Vc(0+)) ------------------- (2)
1
(V
– Vin) * T3 = (R * C) * (V3 – V1 - Vc(0+)) ------------------- (3)
1
After subtracting equation (2) from equation (1) and rearranging we get:
V
= V1 - (R * C) *( V3 – V2 )/(T3 –T2) ------------------- (4)
in
Let measured time T
V
= V1 - (R * C) * ( V3 – V2 )/T
in
By using equation (5) we can measure the value of V
- T2 = Tm and we get:
3
m
9/37
------------------- (5)
depending on the value of T3 and T2.
in
V
vs time diagram for different input voltages AN2615
out
5 V
In Figure 4, we can see the relationship between the V
voltages. From the figure, it is clear that the conversion time for a negative input voltage is
less than the time taken for a positive input voltage.
Figure 4. V
1. T
2. This ADC works for the range Vin <= V1 but if the input voltage is greater than V1 the direction of current I is
3. For negative voltage currents I, that depend on the difference V
vs time diagram for different input voltages
out
and time for different input
out
vs time for different input voltages
out
Effective time Tm = T - T’
< 0 Vin =0 Vin > 0
V
in
V3
V
out
V2
V1
T1’ T2’ T1 T3’ T2
Time (t)
1: for Vin < 0; Tm2: for Vin = 0; and Tm3: for Vin > 0 (where Tin1 < Tin2 < Tin3)
m
inverted and the capacitor starts charging in the opposite direction and conversion never takes place.
- Vin, is high, so the charging time for
negative voltages is less than the positive voltages.
1
T3
10/37
AN2615 Characteristics of different slope converters
6 Characteristics of different slope converters
6.1 Single-slope converter
Figure 5. Single-slope converter circuit diagram
C
R
-V
ref
V
INT
V
in
6.1.1 Single-slope converter timing diagram
Here Vin is directly proportional to the time measured.
Figure 6. Single-slope converter timing diagram
V
in
Time
1. Here Vin = K * T
m
The major sources of conversion errors are the correction factor for the R*C product and the
input offset voltage.
A single-slope converter requires a dual supply voltage op-amp to be able to measure the
positive and negative voltages.
11/37
Characteristics of different slope converters AN2615
6.2 Dual-slope converter
Figure 7. Dual-slope converter circuit diagram
S0
-V
in
V
ref
S1
R
1
out
3
2
gnd
gnd
6.2.1 Dual-slope converter timing diagram
As shown in Figure 8 a dual-slope ADC has a charging phase followed by a fixed rate
discharging phase.
Figure 8. Dual-slope converter timing diagram
Charging phase Fixed-rate discharge
Vin1
V
2
in
-V
ref
-V
ref
clk
Control logic
S1 S2
1
out
2
cmp
ctr
enbl
clk
clk
Counter
V
in
V
ref
=
T
charge
T
discharge
The advantage of a dual-slope ADC is that it is not dependent on the correction factor for the
R*C product. However, the input offset voltage problem still persists and this ADC also
requires a dual supply op-amp to be able to measure positive and negative voltages.
12/37
Time
AN2615 Characteristics of different slope converters
6.3 Solution presented in this application note
In this application note, a single supply ADC for positive and negative input voltages is
described. It's input voltage is proportional to the inverse of the time measured. We can see
in Figure 9 below that as the input voltage becomes closer to V1, the conversion time also
increases. For an input of V
input voltage range depends on the value of V1 and the maximum delay that the application
can tolerate.
, the conversion time is infinite (1/T
1
= 0 in Figure 9). So the
m
Figure 9. V
1. Vin = V1 - (R * C) * (V3 -V2) /T
versus time in AN2615 solution
IN
V
in
+V
Positive
input
V
1
ref
V0
-V
ref
m
Negative
input
Total input range (+V
1/T
m
ref
to -V
)
ref
The significant advantage of this ADC is its ability to measure positive and negative input
voltages operating from single supply, while other solutions require a dual supply. Also this
converter does not require any negative voltage reference. Again, as in the single slope
converter, the major sources of error are the correction factor for R*C product and the input
offset voltage.
As shown Figure 9, the ADC is capable of measuring the input voltage ranging +V
where the absolute value of V
the value of V
.
1
is mod (V
ref
) < V1 so the input voltage range depends on
ref
ref
to -V
ref,
13/37
Error analysis/constraints AN2615
7 Error analysis/constraints
This ADC can be used for measuring any slowly varying input (voltage/current), for example
battery monitoring, and for measuring positive and negative input voltages. But, besides the
need for accurate power supply and voltage references, the following factors also affect the
accuracy of the conversion.
7.1 Input offset voltage
As mentioned previously, the output offset voltage is subtracted from the input, but the input
offset voltage of the op-amp (Amp) still remains present and is directly added to V
measurement purposes, let us refer to the input offset voltage of the op-amp as K
7.2 Correction factor for the product of R*C
As the value of the R and C changes with time and temperature, the factor R * C also
changes. Let the correction factor be K
Then eq(5) becomes,
V
= V1 + K
in
The coefficients K
values. These factors can also be compensated by software calibration techniques (like
using look-up tables or storing some known values). In the present example the first method
is used to calculate these coefficients.
offset
offset
– K
gain
and K
* (R * C) *(V3 -V2)/Tm ------------------ (6)
can be calculated by measuring Tm for two known input
gain
gain
.
. For
1
offset
.
7.3 Value of charging resistance R
If the charging resistance ‘R’ is too high then the current ‘I’ is comparable to the input bias
current of the op-amp, which can affect the output. Also if it is too low then the current
flowing through it is significant so the capacitor is charged very fast. This affects the
measurement accuracy of the ADC.
7.4 Charging capacitor C
Up to this point we have assumed that capacitor C discharges completely from the previous
conversion. However, this is not so in actual practice and a few millivolts worth of charge
(which adds to the offset voltage), may remain on the capacitor. This effect is called
capacitor dielectric absorption and varies depending on the capacitor's dielectric material
voltage to which it was charged during the last charge cycle and the amount of time the
capacitor has had to discharge. Also due to this effect, the output of the capacitor may not
be linear over the whole conversion range. So it is very important to choose the right
capacitor for your requirements. While Teflon capacitors exhibit the lowest dielectric
absorption, polystyrene and polyethylene are also excellent. Ceramic, glass and mica are
fair, while tantalum and electrolytic types are poor choices for A/D applications.
Also, as integrating ADC’s are dependent on the integration of the current flowing through
capacitor C, they do the averaging. So, the larger the value of the capacitor, the longer the
14/37
AN2615 Error analysis/constraints
conversion time and the better the accuracy. In conclusion, there is always a trade-off
between conversion time and accuracy.
7.5 16-bit timer
A 16-bit timer is used as the counter that measures the conversion time. Overflows are also
taken into account, so we can also use an 8-bit timer. The resolution of the ADC depends on
the operating frequency of the timer.
7.6 Effect of temperature
The value and characteristics of each component varies with temperature. The effect of
temperature can be broadly categorized as ‘offset drift’ and ‘gain drift’. So we need to
compensate the ADC for each significant change in temperature.
7.7 Comparator
The comparators are the cornerstone of the A/D conversion process. The ability of the
comparator to detect small voltage/current changes makes the comparator very important in
the A/D conversion process. Any degradation of the intended behaviour of the comparator,
which is most usually caused by unwanted noise, leads to the degradation of the ADC’s
ability to measure low voltages.
15/37
Voltage references AN2615
8 Voltage references
The following circuit is used to produce the different voltage references.
Figure 10. Voltage reference
V
DD
+5V
Gnd
R1
R2
C1
C2
V
ref
16/37
AN2615 Hardware setup
9 Hardware setup
Figure 11. Hardware setup
ST72
TD0
RS232 communication
Hyper terminal
RS232
interface
V
in
0134.85 mV
Multimeter
V
DD
External
ADC
Gnd
Comp1
M1
Comp2
M2
V
DD
PB0
PB1
PB2
PB3
Gnd
Application board
The external ADC is interfaced to the ST7 microcontroller The input capture pins PB0 and
PB2 are used for capturing the pulse from the comparators at two instants (when the output
is equal to V
and V3 respectively), while PB1 and PB3 are used for controlling the voltage
2
at the gate of the M1 and M2 switches (on/off the MOSFET). The results of the A/D
conversion are displayed on the Windows hyper terminal application through an RS232-SCI
interface. The general schematics of the board are given in Appendix B: Application board
schematics on page 31.
17/37
Algorithm AN2615
10 Algorithm
Figure 12. Algorithm flowchart
Start
Initialize I/O,timer and SCI
Calibrate the ADC
Count = 16
1 second delay
Start conversion
Conversion complete?
Ye s
No
Start new conversion
1 second delay
Convert the timer reading in to voltage and send the
result on the PC through SCI-RS232 interface
Decrement count
Count > = 0?
Ye s
Calculate the average and display on the
PC through SCI-RS 232 interface
No
18/37
AN2615 Result
11 Result
The result is given for a capacitor value of 100 µF. So the conversion time is long. The
conversion time can be reduced by choosing a capacitor with a lower value but accuracy is
also reduced. Other parameters are as follows:
R = 10 K, V
So:
R * C = (10 K) * (100 µF) = 1 s
= 1.5 V, V2 = 2V and V3 = 3 V
1
The input range is taken as +1V to -1V, where mod (V
The conversion time is in the range 1 to 3 s. The settling time (as shown in Figure 3: Timing
diagram on page 8) is fixed at 1s. The ADC is calibrated by reading two known input
voltages afterwhich K
voltage source.
11.1 Positive input
In Figure 13, an example of the readings measured by the converter, which are sent to the
hyper terminal, are shown. T
value in terms of voltage. The difference of the maximum and minimum value among the 16
values is also shown.
Figure 13. Results for positive input
offset
) (= 1 V) is less than V1.
ref
and K
avg
are calculated. The input voltage Vin is taken from a
gain
is the average of 16 conversions, and V
is the calculated
avg
19/37
Result AN2615
In Ta bl e 1 , the readings are shown for positive input voltages ranging from 0 to 1 V. V
voltage measured by the multimeter. V
measured
(equal to V
) is the average voltage
avg
is the
in
measured by the converter in a loop of 16. The last column shows the difference in the
maximum and minimum readings of the values measured by the converter in the loop. This
shows the variations recorded in the readings.
Table 1. Results for positive input voltages
Sl no
V
in
(taken from multimeter)
V
measured
(mV)
Difference (mV)
(V
measured
- Vin)
(mV)
1 8.93 8.93 0 0.45
2 18.94 18.98 0.04 0.25
3 28.82 28.87 0.05 0.21
4 38.72 38.78 0.06 0.39
5 49.07 49.13 0.06 0.46
6 58.93 59.02 0.09 0.38
7 68.82 68.92 0.1 0.08
8 79.12 79.25 0.13 0.39
9 88.98 89.07 0.09 0.33
10 98.85 98.98 0.13 0.12
Error in max and min
input measured in the
loop (mV)
11 108.75 108.9 0.15 0.37
12 119.05 119.19 0.14 0.43
13 128.95 129.13 0.18 0.29
14 138.57 138.76 0.19 0.24
15 158.75 158.96 0.25 0.25
16 178.97 179.18 0.21 0.4
17 198.68 198.91 0.23 0.1
18 218.83 219.1 0.27 0.37
19 239.08 239.35 0.27 0.34
20 258.55 258.83 0.28 0.14
21 278.8 279.11 0.31 0.19
22 299.02 299.34 0.32 0.31
23 318.68 319.09 0.41 0.37
24 338.93 339.29 0.36 0.35
25 358.38 358.78 0.4 0.39
26 378.62 378.98 0.36 0.36
27 398.85 399.25 0.4 0.27
28 438.84 439.23 0.39 0.15
29 478.64 478.93 0.29 0.35
20/37
AN2615 Result
Table 1. Results for positive input voltages (continued)
Error in max and min
input measured in the
loop (mV)
Sl no
(mV)
V
in
(taken from multimeter)
V
measured
(mV)
Difference (mV)
(V
measured
- Vin)
30 498.75 499.23 0.48 0.09
31 519 519.41 0.41 0.32
32 538.69 539.1 0.41 0.28
33 558.91 559.3 0.39 0.11
34 578.63 579.03 0.4 0.3
35 598.65 599.01 0.36 0.28
36 638.6 638.99 0.39 0.26
37 678.93 679.3 0.37 0.14
38 718.6 718.93 0.33 0.14
39 758.61 758.93 0.32 0.23
40 798.53 798.83 0.3 0.17
41 838.7 838.94 0.24 0.19
42 858.49 858.68 0.19 0.2
43 878.55 878.72 0.17 0.13
44 898.76 898.92 0.16 0.19
45 918.53 918.61 0.08 0.13
46 938.46 938.55 0.09 0.15
47 958.68 958.72 0.04 0.1
48 978.4 978.38 -0.02 0.14
49 998.63 998.56 -0.07 0.14
50 1018.8 1018.68 -0.12 0.18
21/37
Result AN2615
Figure 14 shows the relationship between the voltage measured by the ADC V
(average of the 16 readings measured by the converter) and the input voltage V
Figure 14. Measured vs input for positive voltages
measured
.
in
Figure 15 shows the relationship between the error voltage (as given in Ta bl e 1 in the
column ‘difference (V
measured
- Vin’)) and the input voltage Vin.
Figure 15. Error vs input for positive input voltages
Note: It may be seen from the readings in Tab le 1 and Figure 15, that for the positive input
between 0 to 1 V the maximum error is around 500 µV for an average of 16 conversions.
Thus the difference between the maximum and minimum values in a loop of 16 is around
500 µV. This shows that averaging has increased accuracy. The accuracy without averaging
is approx 1mV.
The variations of the 16 values may be due to changes in the input voltage itself, as the time
taken for 16 readings is very long (around 16 s).
22/37
AN2615 Result
11.2 Negative input
Similar to the positive input voltages, the readings for negative input voltage are taken in a
loop of 16 as shown in Figure 16.
Figure 16. Results for negative input
23/37
Result AN2615
Ta bl e 2 shows the readings for negative input voltages ranging from 0 to -1 V with the same
parameter notations as Table 1: Results for positive input voltages on page 20.
Table 2. Results for negative input voltages
Sl
no
(taken from multimeter)
Vin (mV)
V
measured
(mV)
Difference (mV)
(V
measured
- Vin)
Error in max and min input
measured in the loop (mV)
1 -9.23 -9.17 0.06 0.43
2 -18.92 -18.84 0.08 0.14
3 -28.96 -29.04 -0.08 0.27
4 -38.76 -38.89 -0.13 0.38
5 -49.03 -49.14 -0.11 0.37
6 -58.88 -59 -0.12 0.24
7 -68.74 -68.9 -0.16 0.8
8 -79.03 -79.2 -0.17 0.22
9 -88.88 -89.06 -0.18 0.34
10 -98.76 -98.96 -0.2 0.4
11 -128.87 -129.13 -0.26 0.32
12 -148.76 -149.07 -0.31 0.32
13 -178.9 -179.21 -0.31 0.39
14 -198.6 -198.94 -0.34 0.11
15 -218.73 -219.12 -0.39 0.43
16 -248.59 -249.04 -0.45 0.2
17 -268.81 -269.32 -0.51 0.46
18 -298.91 -299.51 -0.6 0.15
19 -318.61 -319.25 -0.64 0.38
20 -348.67 -349.37 -0.7 0.37
21 -378.42 -379.23 -0.81 0.23
22 -398.71 -399.57 -0.86 0.48
23 -418.45 -419.33 -0.88 0.25
24 -448.52 -449.5 -0.98 0.47
25 -478.36 -479.41 -1.05 0.26
26 -498.56 -499.69 -1.13 0.4
27 -538.52 -539.73 -1.21 0.38
28 -578.4 -579.8 -1.4 0.47
29 -618.63 -620.1 -1.47 0.19
30 -658.52 -660.17 -1.65 0.53
31 -698.51 -700.28 -1.77 0.26
32 -738.65 -740.44 -1.79 0.16
24/37
AN2615 Result
Table 2. Results for negative input voltages (continued)
Sl
no
(taken from multimeter)
33 -778.54 -780.59 -2.05 0.37
34 -818.25 -820.42 -2.17 0.43
35 -858.27 -860.61 -2.34 0.56
36 -898.57 -901.07 -2.5 0.2
37 -938.31 -940.94 -2.63 0.67
38 -978.21 -981.03 -2.82 0.43
Vin (mV)
V
measured
(mV)
Figure 17 shows the relationship between measured voltages V
readings measured by the converter) and input voltage V
Difference (mV)
(V
measured
- Vin)
(as measured by the multimeter)
in
Error in max and min input
measured in the loop (mV)
measured
(average of the 16
for negative voltages.
Figure 17. Measured vs input for negative voltages
Figure 18. Error vs input for negative input voltages
Figure 18, shows that for negative input voltages varying from 0 to -1 V, the maximum error
is around -2.89 mV for -1 V input. An error of 0.5 mV occurs for an input value of -269 mV
25/37
Result AN2615
and it increases gradually afterwards. The maximum difference between the maximum and
minimum value in a loop is around 600 µV. So, the accuracy of the average value measured
is around 3 mV. Without averaging, accuracy is around 3.6 mV.
11.3 Effect of the capacitor value
As discussed in Section 7: Error analysis/constraints on page 14, reducing the R*C time
constant by reducing the value of R or C, reduces the accuracy. Readings were taken with a
10 µF capacitor and accuracy of the ADC was found to be reduced. Figure 19 gives an
example of readings with a 10 µF capacitor.
Figure 19. Results for positive input with a 10 µF capacitor
Figure 19 shows that variation in the readings taken in a loop of 16 is around 5 - 6 mV which
is approximately 10 times higher than the readings for the 100 µF. This indicates that there is
always a trade-off between conversion time and the desired accuracy.
26/37
AN2615 Conclusion
12 Conclusion
This application note presents a technique for implementing a positive supply ADC, capable
of measuring slowly-varying positive and negative input voltages with high precision.
Accuracy of the converter depends on the different parameters involved. Greater accuracy
can be achieved with careful board design, more precise components and by taking into
consideration all the factors discussed in the document.
27/37
References and bibliography AN2615
13 References and bibliography
The following articles and reports provide useful information:
1. AN1636, Understanding and minimising ADC conversion errors
2. Comparators and bistable circuits, ECE60L lecture notes, winter 2002
3. Selecting the right buffer operational amplifier for an A/D converter, application report
SLOA050, August 2000, Texas instruments
4. MOSFET device physics and operation by T Ytterdal, Y Cheng and TA Fjeldly,
John Wiley and sons, ISBN: 0-471-49869-6
5. Comparators and offset cancellation techniques by Jieh-Tsorng Wu, 2003, National
Chiao-Tung University Department of Electronics Engineering
6. Reducing noise in data acquisition systems by Fred R Schraff, PE IOtech Inc., adapted
from an article that appeared in the April 1996 edition of SENSORS magazine,
Helmers Publishing
7. How do ADCs work? by Martin Rowe, senior technical editor, 7/1/2002, Test and
Measurement World
© 2003,
28/37
AN2615 Input stage conditions
Appendix A Input stage conditions
The ADC described here can be used for measuring both voltage and current with slight
changes in set-up in each case.
A.1 Case 1: Voltage measurement
There are two ways in which the input voltage appears at the ADC input. The first way is that
input comes directly from a voltage source as shown in Figure 20.
Figure 20. Voltage measurement
O/p
C
V1
R
I
R1
V
IN
Gnd
In Figure 20 above, there are no problems. However, if the input comes from a potential
divider circuit as shown in Figure 21, the effective input voltage V
across R2 due to the current I and current I
.
in
is the result of the drop
in
Figure 21. Potential divider
I
V
IN
R2
R1
I
in
In this case an input buffer has to be used to overcome the problem (see Figure 22: Use of
input buffer for voltage measurement on page 30).
29/37
Input stage conditions AN2615
Figure 22. Use of input buffer for voltage measurement
O/p
C
V1
V
R
I
V
IN
IN
A.2 Case 2: Current measurement
Figure 23 shows the current measurement circuit.
Figure 23. Current measurement
O/p
C
V1
R
I
V
in
IN
R
sense
sense
I
V
= (Iin + I) * R
in
I = (V
- Vin)/R = V1/(R * (1 + R
1
= Iin * (1 + I/Iin) * R
sense
sense
/R)) ------------ (2)
sense
The following points should be kept in mind while using R
1. R
2. R
should be chosen to correspond with the range of the current to be measured.
sense
affects the effective value of current I. To minimize its effect, it should be
sense
negligible compared to R. Otherwise ADC has to be compensated.
------------ (1)
:
30/37
AN2615 Application board schematics
Appendix B Application board schematics
Figure 24. Application board schematics
PB2
1
VDD
VDD
VDD
84
VDD
2
3
V3
C11
C10
100nF
R7
2k2
C8
100nF
R4
3k3
C6
100nF
R2
3k5
100nF
R5
3k3
V2
C9
100nF
R6
2k2
V1
C7
100nF
R3
1k5
VDD
D3
R13
1E
V1
Q2
MOSFET N
23
V2
U4
LM358
PB0
1
8
2
3
C14
1
R10
10K
PB1
U3
LM358
100uF
23
7
4
6
5
J7
V3
Q1
MOSFET N
1
VIN
PB3
SCI_RDI
J6
SCI_TDO
J8
VDD
7
9
13
14
SCI
2
1
2
1
T2OUT
R2OUT
R1OUT
T1OUT
R2IN
T2IN10T1IN
R1IN
U5
8
11
12
SCI1_RDISCI1_TDO
C18
1 2
J5
RTS
SCI_RTS
162738495
C13
16
VCC
C1+1V+
C1-3C2+4C2-5V-
2
C19
1uF 16V
100nF
15
GND
6
1uF 16V
DB9
GND
ST3232
C21
1uF 16V
VDD
C20
1uF 16V
VDD
2
1
J2
U1
D1
DC POWER
100nf
C5
C4
10uf/25v
R1
330E
D2
220uf/25v
220uf/25v
100nf
JACK
LED-Green-3mm
GND
VCC
1
2
J3
5V MAX
VDD
C3
3
Vout
LM7805
GND
2
Vin
1
C2
C1
IN400 7
J1
9~14V DC
100nF
VDD C12
31
30
26
29
32
PA128PA227PA3
PA0
VSS
VDD
ICCSEL
RESET1OSC12OSC2
SS/PB74SCK/PB65MISO/PB56MOSI/PB47NC8NC
U2
3
RESET
1 2
J4
Y1
16MHz
R9
1k
S1
C15
R8
4k7
100pf
24
NC25NC
ST72F264
9
C17
22pf
C16
22pf
PA423PA522PA621PA7
PB3
PB211PB112PB013PC514PC415PC3
10
PB3
PB2
PB1
SCI_TDO
20
19
17
PC0
PC118PC2
16
PB0
PB2
PB0
R11
10k
R12
10k
VDD
31/37
Bill of materials AN2615
Appendix C Bill of materials
Ta bl e 3 gives the bill of material for each block of the schematics shown in Figure 24.
Table 3. Bill of materials
Block Designator Part type/number Description
R13 1E Resistor
R10 10 kΩ Resistor
U3 LM358 Dual op-amp
ADC
U4 LM358 Dual op-amp
C14 100 µF Capacitor
Q2 STB100NF03L N - MOSFET
Q1 STB100NF03L N - MOSFET
D3 IN4007 Diode
C8 100 nF Capacitor
C9 100 nF Capacitor
Voltage references
SCI
C10 100 nF Capacitor
C11 100 nF Capacitor
C7 100 nF Capacitor
C6 100 nF Capacitor
R6 2.2 kΩ Resistor
R7 2.2 kΩ Resistor
R5 3.3 kΩ Resistor
R4 3.3 kΩ Resistor
R2 3.5 kΩ Resistor
R3 1.5 kΩ Resistor
U5 ST3232 Line driver
C18 1µF 16 V Capacitor
C19 1µF 16 V Capacitor
C20 1µF 16 V Capacitor
C21 1µF 16 V Capacitor
J5 jumper CON-2
J7 jumper CON-2
J6 jumper CON-2
C13 100 nF Capacitor
J8 DB9 9 pin connector
32/37
AN2615 Bill of materials
Table 3. Bill of materials (continued)
Block Designator Part type/number Description
R12 10 kΩ Resistor
R11 10 kΩ Resistor
Micro setup
Crystal
Reset
U2 ST72F264 Micro-controller
C12 100 nF Capacitor
Y1 16 MHz Crystal oscillator
C17 22 pF Capacitor
C16 22 pF Capacitor
R9 1 kΩ Resistor
R8 4.7 kΩ Resistor
C15 100 pF Capacitor
S1 Push button Micro switch
J4 CON-2 jumper
C4 10 µF/25 V Capacitor
C5 100 nF Capacitor
C1 100 nF Capacitor
DC power
C3 220 µF/25 V Capacitor
C2 220 µF/25 V Capacitor
R1 330E Resistor
J1 DC - Jack DC - Jack
D2 LED 3mm LED-green
U1 LM7805 Voltage regulator
D1 IN4007 Diode
J2 jumper CON-2
J3 Power connector 2 pin connector
33/37
Software flow AN2615
Appendix D Software flow
The f
chosen is 8 MHz. K
CPU
offset
and K
are calculated by taking a reading for two known
gain
inputs. The flow of software, used to implement the algorithm, is as follows:
1. The I/O pins, timer, SCI (Tx @ 9600 baud rate) and some global variables used in the
ADC are initialized.
2. A string is transmitted to check that the SCI is working well.
3. Settling time is fixed at 1 s for f
= 8 MHz.
CPU
4. Some initial readings are taken and ignored while the ADC stabilizes.
5. The control enters an infinite loop.
6. Inside the infinite loop, there is a loop in which the ADC captures the timer values 17
times. However, the first reading is ignored.
7. The remaining 16 captured values are converted into corresponding voltages (up to 10
µV precision) and then transmitted to a PC for display by the hyper terminal after being
converted into a buffer of ASCII characters.
8. The average of 16 timer readings is taken and sent to the hyper terminal as a time
value and a corresponding voltage in the same manner as described above.
9. The difference between the maximum and minimum captured value is also sent to the
hyper terminal in the same way as in step 8.
10. The software enters an ‘IF’ loop ‘if (mCount == 18)’, where the ADC is reset in order to
measure the next input value. Again, a few readings are ignored while the ADC
stabilizes. The counter and other global variables are also initialized.
11. The software re-enters the loop of 17 conversions and executes step 6 to step 9. This
process continues until the system is reset manually.
34/37
AN2615 Software flow
D.1 Code size
The software given is for guidance only. Here the display is done for up to 10 µV precision.
The user can modify and use their own code for display of the data. Tabl e 4 summarizes the
code size. Depending on the compiler and memory placement, these values can change.
The RAM requirements are not provided and the user has the choice to place the variables
as global or local.
.
Table 4. Code size
No. Function name Code size ( bytes)
ADCSys
1 Acquisition 128
2 Start_Capturing 7
3 Reset_ADC 5
4 ADC_InitializeVar 29
5 IsCaptured 13
6 Delay_Second 44
7 IO_Init 37
8 TimerA_Init 47
9 Timer_Interrupt_Routine 170
Main
10 main 1493
11 TIMERA_IT_Routine 38
12 Conversion_TimerReadingToREALInput 116
13 SCI_Init 25
14 SCI_SendBuffer 30
15 SCI_IsTransmissionCompleted 8
16 Dummy_Capturing 26
Note: Some floating point operations are used in this software for display purposes only. It is left to
the user to use the floating point operation or not as per his application requirement.
35/37
Revision history AN2615
14 Revision history
Table 5. Document revision history
Date Revision Changes
23-Aug-2007 1 Initial release
36/37
AN2615
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