This application note describes the 20 W dimmable CFL ballast solution which can
completely replace incandescent lamps in formal dimming systems. The dimmer controlled
range is 20% - 100% of full light output without changing the formal triac dimmer.
Compared to the formal CFL solution, this solution not only provides energy savings, but
also higher reliability and a much longer operating life.
The solution is based on the high performance ballast driver L6574D, two of the
STD4NK50Z Zener protected SuperMESH™ Power MOSFETs, and two of the STTH1L06
turbo 2 ultra fast high voltage rectifiers.
Figure 17.Lamp voltage and current at Ton=9 ms, Vlamp=100 V/div, Ilamp= 200 mA/div. . . . . . . . . 13
Figure 18.Lamp voltage and current at Ton=5 ms, Vlamp=100 V/div, Ilamp= 200 mA/div. . . . . . . . . 13
Figure 19.Lamp voltage and current at Ton=3 ms, Vlamp=100 V/div, Ilamp= 200 mA/div. . . . . . . . . 13
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Typical dimming system for incandescent lampsAN2590
1 Typical dimming system for incandescent lamps
A typical dimming system consists of the lamp(s) and dimmer (Figure 3). The dimmer
consists of the triac and a few components, see Figure 1. Dimmers of this type are
appropriate for incandescent lamps and are very popular in the market.
Figure 3.Typical dimming system consisting of incandescent lamp and triac
dimmer
The triac conducts once it has been triggered and holds latching current. The triac shuts
down when the current is less than the holding current. The dimmer works fine with a
resistive load. The triac can be triggered at any timing of the sinuous voltage (AC line input),
and can be kept in conduction state until reaching zero line voltage. This allows the lamp to
be dimmed nearly to 100%.
1.1 Formal CFL ballast and its disadvantages
Since the formal CFL is not a resistive load, the ballast has no power factor correction circuit
(PFC). If the incandescent lamp (Tungsten filament light bulb) is replaced by a formal CFL
(Compact Florescent Lamp) directly, the CFL cannot fully illuminate and may have
intermittant blinking or no light at all. Figure 4 shows the block diagram of a formal CFL.
Figure 4.Block diagram of formal CFL ballast
The formal CFL ballast consists of a rectifier, storage capacitor, ballast driver circuit, half
bridge and resonant circuit. The source energy stored only to the storage capacitor from the
AC input at the timing nears its peak voltage per half cycle. When the formal CFL ballast is
connected to the triac dimmer (see Figure 1), the triac conducts only after having been
triggered, that is, when the rectified voltage is higher than the voltage across the storage
capacitor. At this extreme moment the capacitor can be charged with the same peak from
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AN2590Typical dimming system for incandescent lamps
the AC input, and the triac is then immediately turned off. It is impossible to adjust the DC
voltage across the storage capacitor and then extend triac firing angle less than 90°.
However the lamp may continue to flicker and remain unstable if the DC voltage is not well
managed.
1.2 Proposed solution
The CFL ballast has been developed based on the L6574D. The lamp power can be
dimmed from below 20% up to 100% (full illumination) by adjusting the triac dimmer.
With the implementation of the PFC solution, the lamp power can be adjusted by switching
the frequency of the driver circuit that corresponds to the illumination level set by the triac
dimmer. The triac can be triggered at every point during the half cycle and conducts
continuously until the end of the half cycle (180°). In addition, a circuit detects the firing
angle of the triac and adjusts lamp power by adjusting the switching frequency of the half
bridge to control lamp power depending on the position of the triac dimmer.
Please note that while the triac dimmer is connected to the capacitive load (CFL), the triac
will not be fired if trigger angle is set lower than 50°. Because bus voltage (the voltage
across the storage capacitor) falls, the system stops operating at an angle less than 40°. For
this reason, the dimmable ballast cannot be operated in full dimming range. A hysteretic
range per half AC cycle was turned on at 50° and turned off at 40°. Figure 5 shows us the
Gate pulse (trigger) and firing angle per half cycle.
Figure 5.The half AC line cycle of sinuous wave and firing angle
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Board descriptionAN2590
2 Board description
2.1 Application circuit
The reference design board is made according to the schematic shown inFigure 6. It
includes an LC filter, bridge rectifier, single stage PFC with high frequency ballast driver and
resonant circuit.
Figure 6.Schematic of the reference design board
RAFT
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