19 V - 75 W laptop adapter with tracking boost PFC
pre-regulator, using the L6563 and L6668
Introduction
This application note describes the characteristics and features of a 75 W wide range input
mains and power-factor-corrected ac-dc adapter evaluation board. Its electrical specification
is tailored to a typical high-end portable computer power adapter. The distinctive attributes
of this design are the very low standby input consumption (< 0.3 W at 265 V), the excellent
global efficiency (> 85%) for a two stage architecture and the low cost.
Figure 1.L6668 and L6563-75W adapter evaluation board (EVAL6668-75W)
●Mains harmonics: in accordance with EN61000-3-2 class-D
●Standby mains consumption: less than 0.3 W @ 265 Vac
●Overall efficiency: greater than 85%
●EMI: in accordance with EN55022-class B
●Safety: in accordance with EN60950
●PCB single layer: single side, 70 µm, CEM-1, 78 x 174 mm, mixed PTH/SMT
The circuit is made up of two stages: a front-end PFC using the L6563 and a flyback
converter based on the L6668. The electrical schematic is shown in Figure 2.
The flyback stage works as the master stage and therefore is dedicated to controlling circuit
operation, including standby and protection functions. Additionally, it switches the PFC stage
on and off the by means of a dedicated pin on the control IC, thus helping to achieve good
efficiency even at light load. The input EMI filter is a classic Pi-filter, 1-cell for differential and
common mode noise. An NTC in series with the PFC output capacitor limits the inrush
current produced by the charging of the capacitor at plug-in.
The purpose of the PFC stage is to reduce the harmonic content of the input current to be
within the limits imposed by European norm EN61000-3-2. Additionally, it provides a
regulated dc bus used by the downstream converter.
The PFC controller is the L6563 (U1), working in transition mode. It integrates all functions
needed to control the PFC as well as an interface to the master converter. Its power stage
topology is a conventional boost converter, connected to the output of the rectifier bridge. It
includes the coil L2, the diode D3, the capacitor C6 and the power switch Q2, a power
MOSFET.
The secondary winding of L2 (pins 8-3) provides the L6563 with information about the core
demagnetization of the PFC coil, needed by the controller for TM (transition mode)
operation. The divider R7, R12 and R18 provides the L6563 with the instantaneous input
voltage information that is used to modulate the boost current, and to derive additional
information such as the average value of the ac line, which is used by the V
(voltage feed-
FF
forward) function. The divider R2, R6, R8, R9 is dedicated to sensing the output voltage and
feeds the information to the error amplifier, while the divider R3, R5, R11, R19, directly
connected to the output voltage, is dedicated to protecting the circuit in case of voltage loop
failure. To maximize overall efficiency, the PFC makes use of the so-called "tracking boost
option" (TBO). With this function implemented the dc output voltage of the PFC changes
proportionally with the mains voltage. The L6563 achieves this functionality by adding a
resistor (R30) connected to the dedicated TBO pin (#6).
The PFC is switched on and off by a switch (Q1) on the V
pin of the L6563, which is
CC
activated by the PFC-STOP pin of the L6668. The PFC-STOP pin is intended to stop the
PFC controller at light load by cutting its supply. This happens when the COMP pin on the
L6668 controller goes below 2.2V.
The downstream converter, acting as the master stage, is managed by the L6668 IC (U2), a
current mode controller. The 65 kHz nominal switching frequency has been chosen to
4/33
AN2521Main characteristics and circuit description
achieve a compromise between the transformer size and the harmonics of the switching
frequency, thereby optimizing the input filter size and the total solution cost. The power
MOSFET is a standard, inexpensive 800 V component housed in a TO-220FP package,
requiring a small heat sink. The transformer is the layer type, using the standard ferrite core
EER35. The transformer is manufactured by TDK and designed in accordance with
EN60950. The reflected voltage is ~130 V, providing sufficient room for the leakage
inductance voltage spike while maintaining a margin for the reliability of the power MOSFET.
The rectifier D8 and the Transil D4 clamp the peak of the leakage inductance voltage spike
at turn-off of the power MOSFET.
The controller L6668 offers maximum flexibility by integrating all the functionality needed for
high performance SMPS control with a minimum component count. A new feature
embedded in the device is a high voltage current source used at start-up which draws
current directly from the dc bus and charges capacitor C33. After the voltage on C33 has
reached the L6668 turn-on threshold and the circuit starts to operate, the controller is
powered by the transformer via the auxiliary winding and diode D11. After start-up, the HV
current source is deactivated, saving power during normal operation and allowing very good
circuit efficiency during standby.
The L6668 utilizes a Current Mode control system, so the current flowing through the
primary winding is sensed by R52 and R53 and is then fed into pin #12 (ISEN). Resistor
R41 connected between pin #12 (ISEN) and pin #15 (S_COMP) provides the correct slope
compensation to the current signal, necessary for correct loop stability in CCM mode at duty
cycles greater than 50%. The circuit connected to pin #7 (DIS) provides over-voltage
protection in case of feedback network failure, while the thermistor R58 provides for a
thermal protection of the power MOSFET (Q5). This pin is also connected to the
PWM_LATCH pin of the L6563 which is dedicated to stopping activity of the flyback
converter in case of PFC loop failure that could be damaging to the circuit. To definitively
latch this state, the internal circuitry of the L6668 monitors the V
and periodically
CC
reactivates the HV current source to supply the IC. After OVP detection and L6668 Disable
intervention, circuit operation can be resumed only after disconnection of the mains plug.
The switching frequency is programmed by the RC connected to pin #16 (RCT) and in case
of reduced load operation the controller can decrease the operating frequency via pin #13
(STBY) and resistor R42, proportionate with the load consumption. The resistor divider R60
and R61 connected to pin #9 (SKIPADJ) allows setting of the initial L6668 threshold to Burst
Mode functionality when the power supply is lightly loaded. Additional functions embedded
in the L6668 are the programmable soft-start and a 5 V reference, available externally.
Circuit regulation is achieved by modulating the voltage on the COMP pin (#10), by means
of the optocoupler U3. Also connected to the COMP pin is the Q6, Q8, R44, R62, C42 and
D13 network, which is dedicated to driving ISEN over its hiccup mode threshold in case of
overload or short condition. In this case the device will be shut down and its consumption
will decrease almost to pre-start-up level. The device will resume operation as soon as the
V
voltage has dropped below the VCC restart level. Thus a reliable hiccup mode is
CC
invoked until the short is removed. A short on-time and long off-time of the hiccup mode are
obtained allowing the average current flowing in the secondary side components to be kept
at a safe level, avoiding consequent catastrophic failures due to their overheating.
Output regulation is done by means of two loops, a voltage and a current loop working
alternately. A dedicated control IC, the TSM1014, has been used. It integrates two
operational amplifiers and a precise voltage reference. The output signal of the error
amplifiers drives optocoupler SFH617A-4 to transfer the information to the primary side and
achieve the required insulation of the secondary side. The output rectifier D7 is a dual
common-cathode Schottky diode. The output rectifier has been selected according to the
5/33
Main characteristics and circuit descriptionAN2521
calculated maximum reverse voltage, forward voltage drop and power dissipation. The
snubber, made up of R14, R66 and C8, damps the oscillation produced by the diode D7. A
small LC filter has been added on the output in order to filter the high frequency ripple.
6/33
AN2521Main characteristics and circuit description
g
Figure 2.Electrical diagram
R55
22R
C36
100N
5
6
8
7
C43
12J2
19V@4A
CON2-IN
C17
100N
100uF-25V YXF
C13
L3
TSL0706 - 1R5-4R3
R20
20K
R22
R015-1W - MSR1
1000uF-25V ZL
R66
3R9
1000uF-25V ZL
C16
R14
3R9
C7
2N2 - Y2
R3
2M2R52M2
R2
1M0-1%
C6
100uF-450V
R1
NTC 10R-S236
D3
STTH2L06
D1
1N4005
3
R4
SRW25CQ-T03H102
L2
65
+
D2
~
GBU4J
L1
HF2826-253Y1 R2-T01
F1
FUSE 4A
J1
INPUT CONN.
68K
8
C5
470N-400V
_
~
C4
470NF-X2
C2
2N2
C1
2N2
C3
470NF-X2
123
R11
2M2
R6
1M0-1%
R9
R8
C12
D7
C8
1N0-200V
STPS20H100CFP
10-11
15-16
2-3
D4
1.5KE250A
D8
STTH10 8A
C10
RES
R13
RES
D5
BZV55-B30
R19
36K
R16
10K
Q1
BC857C
C11
RES
C14
220N
U1
L6563
C9
100N
R15
RES
R12
3M3
D9
R21
RES
D6
RES
14
VCC
INV1COMP2MULT3CS4VFF5TBO6PFC-OK
R17
C15
R10
RES
75K-1%
75K-1%
R7
3M3
C24
2N2 - Y2
T1
SRW32EC-T01H114
5-6
R35
D11
R72
0R0
R32
RES
R31
4K7
C22
2u2-25V
R28
2K2
BZV55-C8V2
Q2
STP9NK50ZF P
R27
0R33
R29
RES
R24
100K
R25
470R
R23
27R
C20
10N
13
GD
62K
1uF
9
10
12
11
ZCD
RUN
GND
PWM-STOP
C19
2N2
C21
470N
R18
51K
D10
Q3
8
PWM-LATCH
C26
22N
7
R30
22K
C25
220PF
C23
RES
R26
120K
R69
1K0
R67
6K2-1%
R68
120K-1%
R39
56K-1%
R40
RES
C29
RES
R45
2K2
R36
1K8
12
43
U3
SFH617A-4
C28
RES
R38
2R7
BAV103
LL4148
RES
RES
Q4
RES
C27
47uF-50V
R73
62K
R71
RES
D15
RES
R43
Q7
RES
R33
10K
R34
270K
4R7
D12
LL4148
R37
10K-1%
2N2-5%
C30
15
16
RCT
U2
L6668
HV1HVS2GND3OUT4VCC5N.C.6DIS
VCC
CC_OUT
U5
V_REF
1
2
R49
24K-1%
R48
4K7-1%
C31
RES
Q5
STP10NK80ZFP
R53
0R39
R52
0R39
R47
100K
R46
47R
R51
2K2
C34
100PF
R42
8K2
R41
10K
11
14
12
13
SS
ISEN
STBY
S_COMP
PFC_STOP
C33
22uF-50V
C32
100N
R50
1K0
2N2
GND
CV_OUT
TSM1014
CV-
CC+3CC-
4
R65
22K
C44
100N
C35
270N
U4
R54
47K
TS3431IZ-RES
D14
LL4148
R64
43K-1%
Q6
BC857C
R44
47K
Q8
BC847C
R62
3K3
C42
10uF-50V
D13
LL4148
R57
100R
C37
82N
C39
4N7
9
10
COMP
7
C41
10N
SKIP_ADJ
R61
33K
R60
56K
VREF
8
C40
100N
R58
M57703
R59
24K
C38
470PF
OTP PROT
R56
4K7-1%
JP7
RES
1 2
90-264Vac
7/33
Test resultsAN2521
2 Test results
2.1 Efficiency measurements at full load, tracking boost option
(TBO)
The following table and diagrams show the single converter and overall efficiency measured
at different input voltages. These measurements are performed with nominal load (4 A).
Table 1.Efficiency measurements at full load using the TBO function
Vin
ac
Efficiency
PFCdc-dcGlobal
90 [V]93.63%89.83%84.11%
115 [V]95.62%89.07%85.17%
230 [V]97.84%89.81%87.87%
265 [V]97.53%89.06%86.86%
1. Compliant to CEC, EU-COC, regulation. In Table 1 and Figure 3 the single converter efficiency
measurement is shown. Thanks to the very good efficiency of any single block the overall efficiency is very
high too, especially if we compare this data with similar converters using a double stage and a flyback
topology as downstream converter.
Figure 3.EVAL6668-75W global efficiency measurements at full load
90%
89%
88%
87%
86%
85%
84%
83%
82%
OVERALL EFFICIENCY
81%
80%
WITH TBO
90115230265
Vin [Vrms]
(1)
(1)
Table 2.ENERGY STAR compliance
Vin
ac
115 [V]85.26%86.32%86.28%85.17%85.75%
230 [V]83.4%85.2%86.74%87.87%85.8%
1 A2 A3 A4 AAverage
In Ta bl e 2 the ENERGY STAR efficiency measurements are shown. The average of the two
mains voltage inputs in four different load conditions is compliant with the target requirement
(better than 84%).
8/33
ENERGY STAR efficiency
AN2521Test results
To achieve optimal efficiency the PFC stage implements the tracking boost function. It
consists of a PFC output voltage that follows the input voltage. Typically, in traditional PFC
stages, the dc output voltage is regulated at a fixed value (typically 400 volts) but in some
applications, such as this one using a flyback as the downstream converter, it could be
advantageous to regulate the PFC output voltage with the tracking boost or "follower boost"
approach. In this way the circuit with the TBO function provides improved efficiency and,
thanks to the lower differential voltage across the boost inductor, the value of L2 can be
reduced as compared to the same circuit without the TBO function. In the present case a
400 µH inductor has been used, while with a fixed output voltage PFC working at a similar
operating frequency, a 700 µH inductor is required.
To achieve the TBO function on the L6563, a dedicated input of the multiplier is available on
TBO pin #6. This function can be implemented by simply connecting a resistor (RT) between
the TBO pin and ground.
Figure 4.L6563 tracking boost and voltage feed-forward blocks
Vout
COM
IR
R1
INV1
I
R
R2
9.5V
I
TBO
2.5V
+
E/A
-
CURRENT
2
1:1
L6563
L6563A
ITBO
current
reference
MULTIPLIER
3V
6
TBO
R
T
1/V
2
"ideal"
-
diode
+
9.5V
5
VFF
CF
Rectified mains
R5
3
MUL
R6
RF
The TBO pin presents a dc level equal to the peak of the MULT pin voltage and is then
representative of the mains RMS voltage. The resistor defines the current, equal to
V(TBO)/RT, which is internally mirrored 1:1 and sunk from the INV pin (pin 1) input of the
error amplifier. In this way, when the mains voltage increases, the voltage at the TBO pin will
increase as well, and so will the current flowing through the resistor connected between
TBO and GND. A larger current will then be sunk by the INV pin and the output voltage of
the PFC pre-regulator will be forced higher. Obviously, the output voltage will move in the
opposite direction if the input voltage decreases.
To avoid an unwanted rise in output voltage should the mains voltage exceed the maximum
specified value, the voltage at the TBO pin is clamped at 3 V. By properly selecting the
multiplier bias it is possible to set the maximum input voltage above which input-to-output
tracking ends and the output voltage becomes constant. If this function is not used, the pin
should be left open; the device will regulate at a fixed output voltage.
9/33
Test resultsAN2521
Y
Y
Figure 5.EVAL6668-75W PFC output voltage vs. ac input voltage
417
384
351
318
285
252
219
PFC OUTPUT VOLTAGE [V]
186
80130180230280
242
218
Vin [Vrms]
351
384
In Figure 5 we can see that the PFC output voltage variation vs. the ac input voltage (i.e. the
input voltage for the flyback stage) is dependent on the input mains voltage, but its range is
narrower than a wide range input. Thus the design of the flyback converter is not completely
optimized as with a standard PFC delivering a stable 400 V output, but its design is much
simpler than that of a wide range flyback. Additionally, the PFC converter using the TBO,
with its lower differential voltage across the inductor and lower current ripple, will have lower
RMS current and therefore better efficiency at low mains, where normally the efficiency of
typical PFCs is lower. The result is a global efficiency of the circuit that will be higher than
that of a fixed output voltage one circuit, especially at lower mains. Most of the power
dissipation will not be concentrated on the PFC only but will be shared with the flyback.
Therefore, there will not be thermal hotspots and the reliability of the circuit will be improved.
This is confirmed in the diagram in Figure 6, where the efficiency of the PFC has been
measured both with the active TBO function and without it. As shown, at low input mains the
circuit has an efficiency improvement better than 2 percent. As the input mains voltage
increases the switching losses become more significant and the fixed output voltage PFC
appears more efficient.
Figure 6.PFC efficiency with and without
TBO function at full load
100%
PFC STAGE EFFICIENC
99%
98%
97%
96%
95%
94%
93%
92%
91%
90%
WITHOUT TBO
WITH TBO
90115230265
Vin [Vrms]
Using the TBO function even the flyback converter efficiency is very good, as shown in
Figure 7 where it is compared with the efficiency of the same converter powered by a fixed
Figure 7.Flyback converter efficiency with
and without TBO function at full
load
95%
94%
93%
92%
91%
90%
89%
88%
87%
86%
85%
FLYBACK STAGE EFFICIENC
400 Vdc FIXED I/P VOLTAGE
WITH TBO
90115230265
Vin [Vrms]
10/33
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