ST AN2512 Application note

AN2512

Application note

Three-phase meter based STPM01, VIPer12A

Introduction

This application note describes how to design a three-phase meter using STPM01 as the measuring device and a VIPer12A based SMPS (Switch Mode Power Supply).

STPM01 is a metering ASSP implemented in an advanced 0.35 µm BCD6 technology. It is designed for the effective measurement of active, reactive and apparent energies, Vrms, Irms, instantaneous voltage and current, frequency in power line systems that use the current transformer, Rogowski coil and/or shunt principle.

This device can be used as a standalone on-board metering device in single-phase energy meter applications or as a peripheral in a microprocessor based single- or three-phase meter.

In a standalone configuration STPM01 outputs a pulse train signal having a frequency proportional to the active power used, while in peripheral mode STPM01 is used in a microprocessor based application. In this case, measured data are read at a fixed time interval from the device internal registers by means of SPI interface processed by a microcontroller.

In the following paragraphs a circuit description is explained, with particular focus on the power supply section, the three-phase design, and the clock management network. Then, the power calculation algorithm is discussed and finally some layout hints and experimental results are shown.

This application note should be used in conjunction with the STPM01 and VIPer12A datasheet.

Three phase block diagram

April 2007 Rev 1 1/38

www.st.com

Contents AN2512

Contents

1 Application description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.1 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.2 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.3 Power supply circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.4 Phase circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.4.1 Current sensing circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.4.2 Anti-aliasing filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.4.3 Voltage sensing circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.4.4 Crosstalk cancellation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.5 Clock management network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2 Communication with microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3 Power calculation algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 STPM01 SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.2 STPM01 Initialization (latching) and reading (shifting) . . . . . . . . . . . . . . . 14

3.3 Data record structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.4 Data integrity checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 Unpacking of data records . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6 Processing of phase energy values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.7 Three-phase energy calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.8 Pulse generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4 Layout rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1 Phase one results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2 Phase two results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.3 Phase three results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.4 Voltage and frequency influence on phase three . . . . . . . . . . . . . . . . . . . 24

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

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AN2512 List of figures

List of figures

Figure 1. Top layer circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. SMPS circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3. Phase circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Clock management network schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5. Connectors schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 6. Flow chart of phase reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7. Timing for data records reading in 3 phase system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. Data records reconstruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 9. STPM01 data register structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10. Typical profile of output of an energy integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 11. Graph of experimental results of phase n.1 tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 12. Graph of experimental results of phase n.2 tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 13. Graph of experimental results of phase n.3 tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 14. Graph of voltage and frequency influence on phase n.3 . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 15. Instantaneous voltage (or current) in one voltage cycle of a three-phase system . . . . . . . 25

Figure 16. Per-phase powers in (a) delta-connected load and (b) wye-connected load . . . . . . . . . . . 26

Figure 17. Two-wattmeter method in star- or delta-connected load. . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 18. The wattmeter connections in the three-phase four-wire loads . . . . . . . . . . . . . . . . . . . . . 28

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Application description AN2512

1 Application description

Three-phase meters (which derive as particular cases from poly-phase systems), are most commonly used in practical industrial applications, and in a few cases also for domestic use.

This three-phase meter can be used as a reference board to build a Class 0,5 three-phase microprocessor based meter for power line systems 3-Wire DELTA service, 4-Wires DELTA and WYE service. It uses a multi-chip topology, in which each phase is monitored using a single-phase device.

In this way, three STPM01 have been used with a common clock network. The power supply is implemented in fly-back topology using a VIPer12A.

The meter cannot be used in standalone mode and a management/supervisory board must be used for energy integration and data displaying. Such a control board should be plugged in the connector J2 (referring to board schematics below), while the connector J1 is used for calibration purposes in association (or conjunction) with the STPMxx parallel programmer/reader released with the application.

1.1 Operating conditions

Table 1. Operating conditions

Value Min Max Unit

NOM

NOM/IMAX

LIN

AMB

1.2 Circuit description

The meter consists of one board divided into the following sections:

● Power supply management circuit

● Phase circuit

● Clock management network

● Connectors.

The schematic of the board is shown in Figure 1.

80 480 V

530A

45 65 Hz

- 40 +85 °C

RMS

4/38

AN2512 Application description

Figure 1. Top layer circuit schematic

PHASE_1

VDD

VDD GND

CLKIN

CLKIN CLKOU T

PHASE

PHASE_2

P2 VOTPL2

VDD

P3 N

GND

CLKIN CLKOUT

PHASE

PHASE_3

P N

VDD GND

CLKIN CLKOUT

PHASE

U8A

4.194304MHz

15pF

74HC14A/SO

1 2

U8B

74HC14A/SO

VDD

VOTPL1

VOTP

SDA

SCSL1

SCS

SCL

LEDL1

LED

SYN

VOTP

SDA

SCSL2

SCS

SCL

LEDL2

LED

SYN

VOTPL3

VOTP

SDA

SCSL3

SCS

SCL

LEDL3

LED

SYN

SCL SDA SYN SCSL1 SCSL2 SCSL3 LEDL1 LEDL2 LEDL3

J14

1 2

VOTPL1

3 4

VOTPL2

5 6

VOTPL3

JUMPER3 J13

1 2

SCSL1

3 4

SCSL2

5 6

SCSL3

SCSJUMPER

J7 1 J111

J8 1

J9 1

J10 1

1 2 3 4 5 6 7 8 9 10 11

VDD

12 13 14 15 16 17 18 19 20

CON20

VOTP

1 2 3

SDA

SCS

SCL

6 7

SYN

8 9

VDD

SMPS

VDD

3.3V

GND

J121

J51

1.3 Power supply circuit

A 3-phase 4-wire bridge is used for mains rectification because the neutral rectification is needed to ensure proper operation in case of missing neutral connection or neutral misswiring.

A varistor is connected between each line and neutral to guarantee pulse voltage test immunity according to the EN62052-11 standard.

The input EMI filter is a simple, undamped LC-filter for both differential and common mode noise suppression.

The circuit for input voltage limiting is connected between the input EMI filter and the bulk capacitor C4. Such a circuitry includes a Power MOSFET and a self driven control section. The MOSFET Q1 is a standard N-Channel 500 V 3.3 Ω in D-PAK package, mounted on a small copper area to improve thermal performance. The self driven control section consists of a voltage divider and zener diodes. The resistors R1, R2 and R3 ensure the gate-source charge for the switch, while the zener diodes D3 and D4 set the maximum voltage value (360 V) across the bulk capacitor.

An NTC limits the inrush current and ensures Q1 operation inside its safe operating area.

The Flyback converter is based on VIPer12A, a product in the VIPerX2A family, which combines a dedicated current mode off-line PWM controller with a high voltage power MOSFET on the same silicon chip. The switching frequency is fixed at 60 kHz by the IC internal oscillator in order to optimize the transformer size and cost. The transformer reflected voltage has been set to 60 V, providing enough margin for the leakage inductance voltage spike and no snubber circuit is needed which allows consequent cost savings.

As soon as the voltage is applied on the input of the converter, the high voltage start-up current source connected to the drain pin is activated and starts to charge the V

capacitor

C8 through a constant current of 1 mA. When the voltage across this capacitor reaches the V

on threshold (about 14 V), the VIPer12A starts to switch. During normal operation the

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Application description AN2512

smart power IC is powered by the auxiliary winding of the transformer via the diode D7. No spike killer for the auxiliary voltage fluctuations is needed thanks to the wide range of the V

pin (9-38 V). The primary current is measured using the integrated current sensing for

current mode operation.

The output rectifier D6 has been chosen in accordance with the maximum reverse voltage and power dissipation. In particular a 0.5A-80 V Schottky diode, type TMBAT49, has been selected.

The output voltage regulation is performed by secondary feedback on the 5 V output dedicated to the display, while the 3.3 V output, dedicated to the logic part and the microcontroller, is linearly post-regulated from the 5 V output. This operation is performed by a very low drop voltage regulator, L4931ABD33, in SO-8 package. The voltage regulator delivers up to 100 mA, ensuring good reliability with no heat sink. The feedback network ensures the required insulation between the primary and secondary sections. The optotransistor directly drives the VIPer12A feedback pin which controls the IC operation.

A small LC filter has been added to the 5 V output in order reduce the high frequency ripple with reasonable output capacitors value.

The Flyback transformer is a layer type based on E13 core and N27 ferrite, manufactured by Pulse Eldor, and ensures safety insulation in accordance with the EN60950.

For more info on the power supply, please refer to AN2264, "Three-Phase SMPS for low power applications with VIPer12A". The schematic of the power supply section is shown in

Figure 2.

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AN2512 Application description

Figure 2. SMPS circuit schematic

R62 22E 1W

SO5K275/275V

R64 22E 1W

RV3

BRIDGE

10uF 50V

C21

180V

Vdd

VIPer12AS/SO-8

47nF 50V SMD

C24

3 1

R25

4.7K 1% SM D

TS2431

100nF 50V SMD

5.6K

R24

PC817

C23

GND

LL4148

220E SMD

R21

R22

1K SMD

4.7K 1% SM D

180V

10E SMD

R20

D10

R23

GND

INHIB

1000uF 50V

C20

R63 22E 1W

BRIDGE

220nF 630V

C19

330k

U2 L4931ABD33

VOUTVIN

3.3V@100mA

220nF 630V

C16

R59

330k

R60

ZMM 15/S OD-80

C18 2.2uF450V

330uF 25V

22uF 16V

100nF SMD

3.3V

SO5K275/275V

RV2

R58

330k

120E

TMBAT49

C14

10uH 125mA SMD

C15

C17

5V@10mA

R61 22E 1W

RV1

1mH

NTC1

4 3

Q1 STD5nk40Z

C22

2nF/2kV (Y1)

7/38

Application description AN2512

1.4 Phase circuit

This paragraph explains the implementation of the phase network which performs the power calculation.

The three phases are identical. Figure 3 shows the implementation of the STPM01 used for energy calculation of each phase.

The schematic can be divided into the following subsets:

● Current sensing circuit (1)

● Anti-aliasing Filter (2)

● Voltage Sensing Circuit (3)

● Crosstalk Cancellation Network (4).

Figure 3. Phase circuit schematic

SDA

SCS

SCL

SYN

LED

VOTP

GND

VDD

CLKI N

CLKOUT

GND

LED

VOTP

SDA

LED

R2 750

VDD

SCL

SYN

SCS

R10

150K

2,2K

C12

C11

R13

2.2M

R8 1k

Scl

Sda

led

MON

1245687

1MY

1nF

1MY

1nF

12131416171531819

Vip

Vin

Iln2

Syn

Scs

CLKin

CLKout

Vdda

STPM01_TSSOP20

Votp

Ilp1

Iln1 Ilp2

10 11

10nF

R5 1k

3.4

VOTP

MOP

Vddd

Vss

Vcc

VDD

LL4148

33nF

4.7u

R17 470

R16

200K

R15

270K

R14

270K

8/38

AN2512 Application description

1.4.1 Current sensing circuit

The STPM01 has two external current sensing circuits, primary and secondary current channels.

Normally, the second current circuit is used in single-phase meter implementation when the anti-tamper feature is required. In this way it is possible to read also the current flowing into the neutral wire to have a comparison with the current flowing into the line wire and detect possible tampers.

In this application only the primary channel has been used. As a consequence, the configuration of STPM01 is:

● PST= 2 if a current transformer is used (this is the case of this meter);

● PST= 0 (or 1) if a Rogowski coil is used

in the latter case ADDG bit can be used to have a further gain of x8.

The current channel uses a current transformer to sense mains current. The burden resistor is used to produce a voltage between VIN1 and VIP1 proportional to the current measured.

1.4.2 Anti-aliasing filter

The anti-aliasing filter is a low-pass filter. It has a negligible influence on the voltage drop between IIN1 and IIP1. Its aim is to reduce the distortion caused by the sampling, also called aliasing, by removing the out-of-band frequencies of the input signal before sampling it with the analog-to-digital converter.

Filtering is easily implemented with a resistor-capacitor (RC) single-pole circuit which obtains an attenuation of -20dB/dec.

1.4.3 Voltage sensing circuit

A resistor divider is used as voltage sensor. The 740 kΩ resistor is separated into three, 2x270 kΩ and 1x200 kΩ, in-series resistors,

which ensure that a high voltage transient does not bypass the resistor. This also reduces the potential across the resistors, thereby decreasing the possibility of arcing. The following resistors are used to implement resistor divider:

● R=R14+R15+R16=740 KΩ,

● R5=470 Ω.

Capacitor C11 and resistance (R19+ R15) create a filter which prevents Electromagnetic Interference (EMI).

1.4.4 Crosstalk cancellation network

The voltage front-end handles voltages of considerable amplitude, which makes it a potential source of noise. Disturbances are readily emitted into current measurement circuitry where they interfere with the actual signal to be measured. Typically, this produces a non-linear error at small signal amplitudes and non-unity power factors. At unity power factor, voltage and current signals are in phase and crosstalk between voltage and current channels merely appears as a gain error, which can be calibrated. When voltage and current are not in phase, crosstalk has a non-linear effect on the measurements, which cannot be calibrated.

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Application description AN2512

Crosstalk is minimized by means of good PCB planning and the proper use of filter components in the crosstalk network. Recommended filter components are shown in

Figure 3. The network subtracts a signal proportional to the voltage input from the current

input. This prevents cross talking within the STPM01.

1.5 Clock management network

4.194 MHz quartz is used to supply the clock to the three STPM01 devices. Figure 4 shows the schematic of the enhanced clock network which prevents EMI influences.

A discrete inverter network is used to change the impedance of the common node of the three blocks. The output of the inverter prevents the second order antenna effect of the node.

The CLKOUT pins are grounded to guarantee the current loop.

To select the measurement frequency range, MDIV must be set to 0 in the configuration register of STPM01. If an 8 MHz quartz is used, this bit must be changed to 1.

Figure 4. Clock management network schematic

PHASE_1

VDD

CLKI N

VDD GND

CLKI N CLKOUT

PHASE

VOTP

SDA SCS

SCL LED

SYN

VOTPL1

SDA SCSL1 SCL LEDL1 SYN

U8A

74HC14A/SO

1 2

U8B 74HC14A/ SO

15pF

4.194304MHz

10/38

VDD

PHASE_2

P2 VOTPL2 N

VDD

P3 N

P N

VDD GND

CLKI N CLKOUT

PHASE

PHASE_3

P N

VDD GND

CLKI N CLKOUT

PHASE

VOTP

SDA SCS

SCL LED

SYN

VOTP

SDA SCS

SCL LED

SYN

SDA SCSL2 SCL LEDL2 SYN

VOTPL3

SDA SCSL3 SCL LEDL3 SYN

AN2512 Communication with microprocessor

2 Communication with microprocessor

A control board with embedded microprocessor should be connected to connector J2 of module using 20-wire flat cable. Ta bl e 2 below describes the pin-out of the connector.

Each STPM01 has an SPI communication port implemented by four multi-purpose pins. Through the J2 connector, the control board can read data records or it can access the mode or configuration signals of each metering device by means of dedicated protocol.

Each pin can draw up to 4 mA at +3.0 V from the control module. The selection of the device to be read is done acting on one of the three SCSLx (STPM01 device select) pins.

By default, the STPM01 is configured in peripheral mode by setting configuration bits APL = 0.

This implies also the following output settings:

● watchdog reset signal on MON pin;

● zero-crossing (ZCR) on MOP pin;

● a pulse train with frequency proportional to the power consumption on LED pin.

To display the information on the power consumption, it is either possible to feed three LEDs, each one showing the information on one phase, from the LED pins of the three measurement devices, or the control board can generate an LED signal to show the global power consumption by reading and manipulating energy information from the three STPM01 registers. In this case, the control board may also recalibrate any result read from the module through appropriate software.

Figure 5. Connectors schematic

SCL SDA SYN SCSL1 SCSL2 SCSL3 LEDL1 LEDL2 LEDL3

VOTPL1 VOTPL2 VOTPL3

SCSL1 SCSL2 SCSL3

VDD

J14

1 2 3 4 5 6

JUMPER3

J13

1 2 3 4 5 6

SCSJUMPER

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

CON20

VDD

VOTP

SDA SCS SCL

SYN

1 2 3 4 5 6 7 8 9 10

11/38

Communication with microprocessor AN2512

Table 2. J2 connector pin description

Pin No. Pin name Functional description

1. 5 V

2. SCL SPI Interface Pin

3. SDA SPI Interface Data Pin

4. SYN SPI Interface Pin

5. SCSL1 Phase n.1 SPI enable signal

6. SCSL2 Phase n.2 SPI enable signal

7. SCSL3 Phase n.3 SPI enable signal

8. LEDL1 LED output of Phase n.1

9. LEDL2 LED output of Phase n.2

10. LEDL3 LED output of Phase n.3

11. GND Signal reference level 0 V and power supply return

12. VDD

13. --- NC

14. --- NC

15. --- NC

16. --- NC

17. --- NC

18. --- NC

Up to 25 mA can be drawn from this pin

Up to 100 mA can be drawn from this pin

Power out of +5.0 V

Power out of +3.3 V

19. --- NC

20. --- NC

A host system can communicate with each measurement module (actually, with the STPM01) using SPI interface, through connector J2. The STPM01 always acts as an SPI slave while the host system acts as an SPI master. An application control board or an external system can be considered as host.

Connector J1 is used in the evaluation phase to connect the measurement module to a PC through the STPM01 parallel Programmer/Reader hardware interface.

This allows the user to set temporarily or permanently the internal STPM01 registers using a dedicated GUI. Jumpers J13 and J14 select which of the three devices will be accessed.

The VOTP pin on the connector J1 is used when a host wants to permanently write some configuration bits in the metering device. In this case, a +15 V power level must be present on the VOTP. This level must be delivered from the host itself because the module does not have an on-board charge pump.

Ta bl e 3 shows the pin description of the connector J1.

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