ST AN2510 Application note

AN2510

Application note

Combo IC for PFC and ballast control

Introduction

A new control IC, the L6585D, has been designed to manage electronic ballasts for fluorescent lamps. It includes both Power Factor Correction and half-bridge sections and embeds a wide range of features to provide an energy saving and cost effective solution.

The high-voltage single chip approach optimizes the management of lamp critical conditions such as the pre-heating and ignition of start up and fault and lamp replacement. The internal logic, guided by precise internal references and timings, is able to carry out all of these phases. The PFC section has superior performance in terms of harmonic content mitigation. High Power Factor (PF) and Total Harmonic Distortion (THD) reduction are obtained as required by international norms, especially concerning Universal input voltage operations.

Particular care has been given to pre-heating and ignition phases prior to lamp start up in order to ensure the proper filament warming up and extend lamp life.

Innovative circuitry allows an improved control of the lamp voltage during ignition as well as protection against failures due to lamp aging.

The use of this new control IC simplifies the industrialization of electronic ballasts which increases application reliability and reduces its dimensions and cost.

March 2007

Rev 1

1/22

www.st.com

Contents

AN2510

 

 

Contents

1

L6585 Integrated circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4

2

Device blocks description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.1

Start-up and shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.2

PFC section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6

2.2.1 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2.2 Over-voltage and feedback disconnection detection . . . . . . . . . . . . . . . . 6 2.2.3 Zero Current Detection and triggering block . . . . . . . . . . . . . . . . . . . . . . 7 2.2.4 Multiplier block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.5 Current comparator and choke saturation detection . . . . . . . . . . . . . . . . 8 2.2.6 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Oscillator and pre-heating / ignition / run mode sequencing . . . . . . . . . . . 8 2.4 Half-bridge current sensing: lamp voltage / power control . . . . . . . . . . . . . 9

2.4.1 Controlled lamp voltage/current during ignition . . . . . . . . . . . . . . . . . . . . 9 2.4.2 Over-current protection during run mode . . . . . . . . . . . . . . . . . . . . . . . . 11

2.5 End of life . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.5.1 End-of-life detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.6 Re-lamp comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3

L6585 Biasing circuitry (pin by pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

3.1

Pin1 OSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

3.2

Pin2 RF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

3.3

Pin3 EOI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

3.4

Pin4 TCH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

3.5

Pin5 EOLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

3.6

Pin6 EOLR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

 

3.7

Pin7 CTR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

 

3.8

Pin8 MULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

 

3.9

Pin9 COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

 

3.10

Pin10 INV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

 

3.11

Pin11 ZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

 

3.12

Pin12 PFCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

2/22

AN2510

 

 

Contents

 

 

 

 

 

3.13

Pin13 PFG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . 18

 

3.14

Pin14 HBCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . 18

 

3.15

Pin15 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 18

 

3.16

Pin16 LSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 18

 

3.17

Pin17 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . 18

 

3.18

Pin18 OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 19

 

3.19

Pin19 HSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 19

 

3.20

Pin20 BOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 19

4

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 21

3/22

ST AN2510 Application note

L6585 Integrated circuit

AN2510

 

 

1 L6585 Integrated circuit

Designed in High-voltage BCD Off-line technology, the L6585D embeds a PFC controller, a half-bridge controller, the relevant drivers, and the logic necessary to build an electronic ballast.

The advanced and precise logic circuitry, combined with the programmability of the End-of- Life windows comparator, makes the L6585D compliant with either "lamp-to-ground" or "block capacitor-to ground" configurations.

Another outstanding feature is the possibility of controlling the ignition lamp voltage.

The pre-heating and ignition durations are independently adjustable as well as the halfbridge switching frequencies for each operating phase (pre-heating, ignition and normal mode).

Other features (half-bridge over-current with frequency increase, PFC over-voltage) allow building a reliable and flexible solution with a reduced part count.

The PFC section achieves current mode control operating in Transition Mode. The highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range mains operation with an extremely low THD, even over a large load range.

The PFC output voltage is controlled by a voltage-mode error amplifier and a precise internal voltage reference.

The driver of the PFC is able to provide 300 mA source and 600 mA sink and the drivers of the half-bridge provide 290 mA source and 480 mA sink.

Figure 1. Block diagram

 

COMP

MULT

 

PFCS

 

 

Vcc

 

 

 

 

2.5V

E/A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

MULTIPLIER

 

LEB

 

1.7V

 

 

 

 

BOOT

 

 

 

 

 

 

 

 

 

 

 

INV

_

and THD

 

 

 

 

 

17V

 

 

 

 

OPTIMIZER

 

 

 

 

 

 

 

 

 

 

 

+

+

_

 

UV

 

HVG

HSD

 

 

 

 

 

 

DRIVER

 

 

 

_

 

 

SYNCHRONOUS

 

 

 

PWM

 

 

 

DETECTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BOOTSTRAP DIODE

 

 

1.2V

 

 

 

COMP.

 

 

 

 

 

OL

 

 

 

CHOKE

 

 

 

OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SAT.

DEAD

 

LEVEL

 

ZCD

 

 

 

 

 

 

 

TIME

 

SHIFTER

Vcc

 

 

 

 

 

 

 

 

 

DRIVING

 

 

S

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STARTER

Q

 

 

 

 

 

LATCH

 

LVG DRIVER

 

0.7V

 

 

 

 

 

 

 

LOGIC

LSD

 

Vcc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OVP

 

 

 

 

PFG

 

 

 

 

 

PFSTOP

CONTROL

 

1.6V

GND

 

PFSTOP

WINDOW

 

 

 

 

HB STOP

 

 

 

 

 

DIS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COMPARATOR

 

 

 

LOGIC

 

 

 

 

 

 

EOL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CTR

OL

 

 

& REF.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HBCS

 

OVP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.4V

 

 

 

 

 

 

 

1.9V

TIMING

 

0.9V

 

 

 

 

 

 

 

 

 

 

DIS

 

 

 

 

 

 

 

MANAGEMENT

Vcc

 

 

 

 

 

 

 

 

 

 

 

 

2V

 

2V

 

 

 

 

 

 

4.6

 

0.75V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.5

 

EOLR

 

 

 

 

VCO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RELAMP

 

 

 

 

 

 

 

 

 

 

4.63V

 

 

 

 

 

 

 

 

 

 

 

 

 

EOLP

 

RF

OSC

EOI

 

 

 

Tch

4/22

AN2510

Device blocks description

 

 

2 Device blocks description

2.1Start-up and shutdown

During start-up, the chip is supplied through a resistive path from the rectified AC Mains voltage whereas during normal operation, a charge pump or a self-supply winding (as well as an auxiliary converter) can provide the required current.

As the voltage at Vcc pin reaches the turn-on threshold (Vcc(ON)), the chip is enabled and (unless a lamp absence is detected) the oscillator starts switching at a frequency set by values of COSC and RRUN and RPRE.

The Half-Bridge and the PFC sections start at almost the same time. As the synchronization signal at pin ZCD is not yet generated by the external ZCD circuit, an internal structure forces the PFC gate driver to switch for the first switching cycles. The pulses are generated at a typical frequency of 15 kHz.

At shutdown, when the VCC decreases below the UVLO threshold (either in case of Mains removal or in case of fault), the following conditions are met:

all drivers are off;

EOI pin is discharged (the internal switch is on);

RF reference is disabled;

Tch is discharged.

Figure 2. Start-up and shutdown sequences

5/22

Device blocks description

AN2510

 

 

2.2PFC section

2.2.1Error amplifier

The Error Amplifier (E/A) is used for frequency compensation. The inverting input (INV) is connected by an external divider to the output bus and compares a partition of the boosted output DC voltage, Vo, with the internal reference in order to maintain the pre-regulator output DC voltage constant.

The compensation network, placed between pins INV and COMP (E/A output), is usually done with a feedback capacitor. The E/A bandwidth will be extremely low because the output of the E/A must be constant over a line half-cycle to achieve high PF.

The dynamics of the E/A output is internally clamped so that it can swing between 2.25 V and 4.2 V in order to speed up the recovery after the E/A saturates low due to an overvoltage or saturates high because of an over-current.

Figure 3. Error amplifier, feedback divider and CTR

PFC OUTPUT

R1 RHOVP

CTR

INV

R2 RLOVP

 

+

OVP

 

_

 

 

3.4V

 

 

_

DISABLE

 

 

 

+

 

 

0.8V

OPEN LOOP

 

 

 

 

DETECTION

 

_

 

 

+

MULT

 

 

 

ERROR

 

2.5V

AMPLIFIER

 

 

COMP

COMPENSATION

 

NETWORK

 

2.2.2Over-voltage and feedback disconnection detection

The device is provided with a double over-voltage protection (OVP).

In case of over-voltage, the output of the E/A will tend to saturate low, but the E/A response is very slow, so it will take a long time to go into saturation. On the other hand, an overvoltage must be corrected immediately.

A fast OVP detector, based on a different concept, is necessary.

The maximum voltage allowed for the PF output bus (VOVP) is defined by the resistive divider connected to the pin CTR (Figure 3):

6/22

AN2510

 

 

 

 

Device blocks description

 

 

 

 

 

 

Equation 1

 

 

 

 

 

V

 

= V

 

RHOVP

OVP

TH

1 + ------------------

 

 

 

RLOVP

 

 

 

 

where VTH is the CTR internal comparator input reference (3.4 V typ.)

Moreover if the over-voltage lasts so long that the output of E/A goes below 2.25 V, the PF gate driver is stopped until the E/A output goes back into its linear region.

If instead, the over-voltage is due to feedback disconnection (for example R1, Figure 3 fails open), these two structures work together. In fact if the VOVP threshold is crossed and simultaneously the INV voltage falls below 1.2 V, typ. (due to the fact that the E/A source capability is limited) the IC stops in a latched condition.

2.2.3Zero Current Detection and triggering block

The Zero Current Detection (ZCD) block switches on the external PFC MOSFET as the voltage across the boost inductor reverses, just after the current through the boost inductor has gone to zero. This feature allows TM operation.

As the circuit is running, the signal for ZCD is obtained with an auxiliary winding on the boost inductor. As at start-up no signal is coming from the ZCD, a circuit is needed that turns on the external MOSFET. This is done with an internal starter, which forces the driver to deliver a pulse to the gate of the MOSFET, producing also the signal for arming the ZCD circuit.

The repetition rate of the starter is greater than 15 kHz and this maximum frequency must be taken into account at design time.

2.2.4Multiplier block

The multiplier (see Figure 4) has two inputs. The first one takes a partition of the instantaneous rectified line voltage and the second one takes the output of the E/A. If this voltage is constant (over a given line half-cycle), the output of the multiplier will be shaped as a rectified sinusoid too. This is the reference signal for the current comparator, which sets the MOSFET peak current cycle by cycle.

Figure 4. Multiplier, current sense and choke saturation

7/22

Loading...
+ 15 hidden pages