ST AN2500 Application note

AN2500
Application note
ST10 electric motor control library:
SPI drivers for MP49 power board
Introduction
STMicroelectronics provides a library of motor control functions that can be used as base blocks for motor control applications.
March 2007 Rev 1 1/18
www.st.com
Contents AN2500
Contents
1 Functions set overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 MP49 to CPU board communication overview . . . . . . . . . . . . . . . . . . . . 6
2.1 SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 SPI diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Fault detection interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 API specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Function definition for motor power board configuration . . . . . . . . . . . . . . 9
3.1.1 SetCom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2 Function definitions for the motor power board diagnosis . . . . . . . . . . . . 10
3.2.1 ShortMotorDriver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.2 LowVoltPreDriver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.3 SPINGFailDetect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 Type definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3.1 DIAG1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3.2 DIAG2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3.3 DIAG3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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AN2500 List of tables
List of tables
Table 1. SPI master signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. SPI commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. DIAG1 structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 4. DIAG2 structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 5. DIAG3 structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 6. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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List of figures AN2500
List of figures
Figure 1. ST10 EMC library structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. SPI registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Fault signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
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AN2500 Functions set overview

1 Functions set overview

The SPI_FS is a set of functions included in ST10 electric motor control library (see
Figure 1). It uses the ST10 peripheral SSC configured like SPI interface to allow the full
duplex communication with MP49 (slave) and to set a specific MP49 parameters configuration or diagnosis requests, see Tabl e 2.

Figure 1. ST10 EMC library structure

ST10 EMCL
Flux
Oriented
Control
Sinusoidal
Control
Observer
Leunberger
spi.c
spi.h
SPI
Driver
Encoder
Driver
Hall sensors
Driver
Current sensing
Driver
PWM
Driver
The communication between the CPU board and the motor power board is based on SPI interface with a chip select (4 signals in total).
The exchanged data set some parameters and the command to read the status of the motor power board. The configuration command allows to choose the shape of fault pin output signal. Another subset of commands allows to send diagnosis requests to read the status of the inverter driver and of the powerMOS.
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MP49 to CPU board communication overview AN2500

2 MP49 to CPU board communication overview

The MP49 motor power board communicates with the CPU board using an SPI interface and using a fault signal to report to the CPU faults as soon as they are detected.
The MP49 requires only to be configured after reset and the CPU does not need any action after initialization as long as the fault pin is not active.

2.1 SPI interface

The SPI interface provides a full-duplex, synchronous serial communication between microcontrollers and peripherals. It is based upon a Master-Slave protocol where the master is the device that drives the serial clock signal (SCLK), used to synchronize the communication.
The SPI bus consists of four wires, Serial Clock signal (SCLK), Master Transmit / Slave Receive (MTSR), Master Receive / Slave Transmit (MRST), and Chip Select (CS), which carry information between the devices connected to the bus (see Figure 2).

Table 1. SPI master signal description

Name Direction Description
MTSR Output
MRST Input
SCLK Output
CS Output

Figure 2. SPI registers

SPI Serial Data Output. Serial data output from
the SPI Master to a SPI slave.
SPI Serial Data Input. Serial data input from a SPI slave to the SPI Master.
SPI Serial Clock. Normally high, and the correct clock pulse number is sixteen.
SPI Slave Selects. Normally high, this input signal starts the communication when it is forced low (for selecting the MP49 board use pin P2.7).
The SCLK control line is driven by the SPI Master and regulates the flow of data bits, so that data is shifted on falling edge of SCLK and is sampled on the opposite edge when the data is stable.
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