Introduction
AN2466
Application note
STMPE801 - Hardware Interface guide
STMPE801 is an eight-bit port expander that can be interfaced to the main digital ASIC or
processor via the two-line bidirectional I
platforms usually come with a limited number of I/Os. The port expander I Cs ca n be used t o
increase the number of I/Os or control sig nals in such applications.
STMPE801 can be used in advanced digital platforms such as:
● Portable media players
● Game consoles
● Mobile phones
● Smart phones etc.
This application note explains the setup and hardware interfacing of the device to the main
processor.
2
C bus. The digital engines in mobile multimedia
March 2007 Rev 1 1/13
www.st.com
Contents AN2466
Contents
1 STMPE801 Device features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin description of STMPE801 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Power Supply - VCC and VIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
2.2 I
2.3 Reset pin (RESET_N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Interrupt pin (INT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5 GPIO Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2.1 I2C General call . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.5.1 Configuring GPIO registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5.2 GPIO Level shifting feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.5.3 GPIO-Hot Key feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 Minimum pulse width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.7 Power saving mode of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.8 Power-Up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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AN2466 STMPE801 Device features
1 STMPE801 Device features
Figure 1. Concept of GPIO Port Expander
VCC VIO
Processor
CLOCK
DATA
ADDRESS
INT
RST_N
STMPE801
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
Hotke
Chi
Enable
erature Sensor
Tem
Control Signal/Ext.Interrupt
LED BANK
GND
– Low CPU utilization (Interrupts available and so no Polling!)
– Configurable Hotkey Detection on each GPIO
– Flexibility in configuration of each of the eight GPIOs
– Simpler communication with CPU (just two I
2
C lines)
– Low power consumption with ultra low standby current (< 1 µA)
– IO and core voltages from 1.65 V up to 3.6 V
– Interrupt output (open drain) pin
– No external clock input required
– Small package QFN16 - 16 pins 1.8 mm x 2.6 mm, making it optimal for use in
portable application like mobile phones with critical space constraints.
The STMPE801 offers great flex ibility as each I/O can be independently configured as input
or output. The eight GPIOs can be connected externally to different modules like LEDs ,
temperature sensors, chip selects for other devices, or as interrupt inputs from other
devices.
This device has been designed with very low quiescent current in standby mode and
includes a Hot Key detection for each I/ O to optimize the power consumption of the IC.
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Pin description of STMPE801 AN2466
Figure 2. Block diagram of STMPE801
GPIO Controller
ADDRESS
CLOCK
DATA
2
P
I
P
C
Interface
GND
VCC
2 Pin description of STMPE801
The table below gives a list of all the pins on STMPE801.
Table 1. STMPE801 Pin description
GPIO
0-7
POR
GPIO 0-7
VIO
INT
RESET_N
Pin Name Type Description
1 INT O Interrupt output (open drain)
2 Reset_N I External reset input, active LOW
2
3CLOCKAI
4 ADDRESS I Digital Input for I
5DATAAI
6 VCC - Supply voltage for I
7VIO-
C Serial clock line
2
C slave address (either High or Low)
2
C Serial data line
2
C block
Supply voltage for GPIO controller (Note: VIO must alwa ys
be ≥ VCC)
8 GND - GND
9 GPIO_0 IO GPIO
10 GPIO_1 IO GPIO
11 GPIO_2 IO GPIO
12 GPIO_3 IO GPIO
13 GPIO_4 IO GPIO
14 GPIO_5 IO GPIO
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