ST AN2454 APPLICATION NOTE

AN2454

Application note

Universal input voltage power supply for ESBT based breaker and metering applications

Introduction

This document describes how to design a 3-phase power supply with the UC3845B PWM driver and the new STC04IE170 ESBT as main switch. It is associated with the release of the STEVAL-IPB001V1 demo board (see figure below). The design is a complete solution for the 2 W single output SMPS, which is widely used as a power supply in breaker applications. However, the design method can also be applied to an SMPS suitable for 3- phase power metering applications, as it can easily be upgraded for higher output power.

In this report particular attention has been paid to the ESBT base driving circuit, where some useful methods have been investigated to better optimize power dissipation (see

Section 6: Base driving circuit design).

The influence of the parasitic capacitances of the transformer on the ESBT is also explained in detail (see Section 3: Parasitic capacitances and related issues). In addition, an active start-up circuit has been implemented on the demo board to optimize the converter efficiency, is also described (see Section 7: Active start-up circuit). A dedicated active component (the Darlington Q3) has been developed to support the very high voltage required (see Figure 1).

Finally, the most important waveforms and thermal results are given in Section 8: Experimental results: waveforms and Section 9: Experimental results: efficiency and special considerations. They demonstrate the benefits of using this solution with the start-up circuit.

Refer to AN1889 for the overall design of an auxiliary power supply using an ESBT.

STEVAL-IPB001V1 demo board

December 2006

Rev 1

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www.st.com

Contents	AN2454

Contents

1	Design specifications and schematic diagram . . . . . . . . . . . . . . . . . .	. 4
2	Flyback stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 6
3	Parasitic capacitances and related issues . . . . . . . . . . . . . . . . . . . . . . .	8
4	Fine tuning of the application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
5	Transformer design characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
6	Base driving circuit design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	11
7	Active start-up circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
8	Experimental results: waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
9	Experimental results: efficiency and special considerations . . . . . .	19
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23

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AN2454	List of figures

List of figures

Figure 1. Schematic diagram of the SMPS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Small signal equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. Current sense circuit (a) and waveform of sense resistor ( b) . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. The normal operation waveforms of output pulse and current spike . . . . . . . . . . . . . . . . . 10 Figure 5. ESBT driving circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. hFE curve from datasheet STC04IE170HP, section 2.1, figure 3 . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Start-up circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Minimum input voltage: storage highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. Minimum input voltage: switch-on highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10. Minimum input voltage 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. Minimum input voltage 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. Minimum input voltage: switch-off highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 13. 560V input voltage 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 14. 560V input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 15. 560V input voltage: switch-on highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 16. 560V input voltage: switch-off highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 17. 1050V input voltage 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 18. 1050V input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 19. 1050V input voltage: switch-off highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 20. 1050V input voltage: switch-on highlighted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 21. 110 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 22. 220 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 23. 420 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 24. 480 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 25. 600 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 26. 760 Vac envelope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 27. Top view of the STEVAL-IPB001V1 demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 28. Bottom view of the STEVAL-IPB001V1 demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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Design specifications and schematic diagram	AN2454

1 Design specifications and schematic diagram

Table 1 lists the converter specifications and main parameters of the STEVAL-IPB001V1 demo board.

Table 1.	Converter specifications and main parameters of the STEVAL-IPB001V1
	demo board
Symbol			Description	Values
	Vinmin		Rectified minimum input voltage	150
	Vinmax		Rectified maximum input voltage	1200
	Vout		Output voltage	24V/83mA
Pout max			Maximum output power	2W
Pout min			Minimum output power	0.2W
	η		Converter efficiency	60%
	F		Switching frequency	50kHz
	Vfl		Reflected flyback voltage	150V
	Vspike		Max over voltage limited by clamping circuit	150V

A schematic diagram of the SMPS is given in Figure 1 The most relevant components are:

●HV ESBT main switch and simple driving circuit (see Section 6: Base driving circuit design).

●Active start-up circuit with HV bipolar Darlington (see Section 7: Active start-up circuit) .

●A specially constructed transformer, with very low parasitic capacitance.

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AN2454	Design specifications and schematic diagram

Figure 1. Schematic diagram of the SMPS

J1

1
2
3
	R1
CON3	1M 1/8W
C2
+
33uF450V
	R4
	1M 1/8W
	R7
C5	1M 1/8W

+

33uF 450V

R9

1M 1/8W

R11 R12

1M 1/8W

1M 1/8W

C6

	+
	33uF 450V	3
			2
	2	Q2

1

		R13	1PN2222A
						3
		680k
						C11
R14	C8	100p				100nF
18k					7
				U1
			2	VFB	VCC
	R16	150k	1			6
			8	COMP		OUT
		R18 2.2k		VREF
						3
					SENSE
R20	R21		4	RT/CT	GND
100k	3.9K
		C10	UC3845B		5
		12nF

			D1		CON2
4	T1	7
R2					2
			STTH110	+ C1
					1
10k 1/4W
					J2
		8		220uF 35V
		2
R5			D2		D3
10k 1/4W
5		1	STTH110 R3 1	R6	C4 1N4148		D5
					+	+ C3	20V
R8				10k	47uF 25V	330uF 25V
10k 1/4W

R10

10k 1/4W

R24

10k 1/4W

R25

10k 1/4W

Q3

STP03D200

				1
				Q4
	R15	3.3k	R26	10
				4
	D4	STTH110		STC04IE170HP
			C7	2
R17	22		10nF
				3
R19	1k
C9			R22	R23
820pF			10k	6.8

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Flyback stage	AN2454

2 Flyback stage

In this section, only the main steps of the flyback stage are given. For more detailed guidelines on Discontinuous Conduction Mode (DCM) flyback converter design, refer to AN1889.

First, the transformer turn ratio, NP/NS, must be calculated. NP and NS are the respective number of primary and secondary windings. Calculation of the turn ratio is correlated to the maximum voltage rating of the transistor which is used as the primary switch. The voltage of the power switch collector, VT, for flyback operation is given by:

Equation 1

VT	= Vdcmax	NP	(Vo	+ VF, diode) + Vspike + m argin
		+ -------
		NS

	NP	where
		• (Vo + VF, diode)= Vfl= the flyback voltage
	-------
	NS

where Vspike is the over voltage limited by the clamp network. It must be chosen so that the total voltage across the power switch does not exceed the maximum breakdown voltage of

the power switch device (see Equation 1).

Once the Vspike voltage is fixed, the designer must choose the flyback voltage taking account of various voltage capabilities available from standard transistors. The higher the flyback voltage the higher the exploitable maximum duty cycle i.e. a higher duty cycle at fixed output power leads to a lower IRMS current. This improves overall efficiency of the primary side, leading to easier design of wide input range voltage converters.

ESBTs, which have breakdown voltage capabilities as high as 2200V, offer designers a valuable tool to simplify projects from an early stage.

For the STEVAL-IPB001V1 demo board using the STC04IE170HP switch, the following parameters must be set:

●Margin = 200V.

●Vspike = 150V.

From Equation 1, the flyback vlotage (Vfl) gives a result of 150 V. The transformer turn ratio may then be calculated using Equation 2.

Equation 2

	NP	=	BV – Vdcmax – Vspike – m argin		=	1700 – 1200 – 150 – 200	= 6
	N------S-		---------------------------------------------------------------------------------Vo	+ VF, diode		---------------------------------------------------------------24 + 1 -

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AN2454	Flyback stage

Once the turn ratio is calculated, the system must be stabilized to ensure that the converter operates in discontinuous mode. Equation 3 guarantees that the energy on the primary coil will be completely transferred to the secondary coil before the next cycle occurs.

Equation 3

VdcminTonmax =	NP	(Vo	+ VF, diode)Treset= VflTreset
	-------
	NS

A safety margin of 20% is recommended to guarantee the complete demagnetization of the primary side (see Equation 4).

Equation 4

Tonmax – Treset = 0.8TS

where Tonmax is the maximum power-on time, Treset the time needed to demagnetize the transformer inductance, and TS the switching time.

Combining Equation 3 and Equation 4 , Tonmax, may be calculated using Equation 5:

Equation 5

Tonmax	Vfl0.8TS
	= ------------------------------
	Vdcmin + Vfl

Once output power has been set to 2 W and the desired efficiency to 60%, the operating switching frequency must be chosen. To do this, a value of 50 kHz should be selected. It is then necessary to calculate the primary inductance (LP) of the transformer. Using Equation 6, input power (PIN) may be calculated to give an approximate value which does not account for losses due to the power switch, the input bridge and the rectified network.

Equation 6

		1	• LPIP	2		1	2
		--				2--Vonmax
PIN	= 1.66POUT=	2			=
		-----------------------	TS	-		-------------------------LPTS

Using Equation 7, LP may be calculated as follows:

Equation 7

LP =	Vdcmin2Tonmax2
	------------------------------------------ ≈ 11mH
	3.33TSPOUT

Peak current, (IP) on the primary side may be calculated using Equation 8.

Equation 8

	IP =	VdcminTonmax	≈ 110mA
		------------------------------------LP -

It is also important to determine the maximum primary current, Irms(primary), (see Equation 9) and maximum secondary current, Irms(secondary), (see Equation 10) to obtain correct dimensions for the wire size of the primary windings.

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Parasitic capacitances and related issues					AN2454
Equation 9
Irms(primary)	=	IP	Tonmax	≈	40mA
		------	------------------
		3	TS
Equation 10
Irms( secondary) =		IS	Treset	≈	240mA
		------	---------------
		3	TS

3 Parasitic capacitances and related issues

In a flyback converter stage it is important to take into account the parasitic capacitances since their influence may affect the correct operation of the converter itself. Figure 1 shows the main schematic diagram of a flyback converter and Figure 2 shows the small signal equivalent model.

The parasitic capacitances between the ESBT collector and ground are mainly due to three components (see Figure 2):

●C1, the primary inter-winding capacitance;

●C2, the intrinsic capacitance of the ESBT between its collector and source;

●C3, the parasitic capacitance between the collector of the ESBT and the heat-sink.

Usually transistors are mounted on a heat-sink by interposing an insulation layer. The heatsink has to be grounded either for safety reasons, or to minimize the RFI so that C3 results are in the same range as C1 and C2. The resulting total parasitic capacitance (C) is equal to C1 + C2 + C3. C may be large enough to produce additional and non-negligible switch-on power dissipation. Large parasitic capacitances may produce noise problems (origin ringing). Parasitic capacitance are worse at higher input voltages, like those observed in 3- phase power supply.

Figure 2. Small signal equivalent circuit

		T		T	Ic1		T
			C1
					C1
		Insulaion Pad		C3
Cbus		Heatsink			Heatsink
	ESBT		ESBT		ESBT
+							Ic2	Ic3
				C2
					Ic	C2	C3
a)					b)

The flyback converter of the demo is operated in DCM, thus, before the end of the off-time the secondary of the transformer has discharged all energy stored in the primary inductance during the previous cycle.

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