This document describes a software and hardware smart card interface for the STR71x Smart
Card peripheral.
The main purpose of this software and hardware package is to provide resources facilitating the
development of an application using the Smart Card Peripheral.
The software interface is composed of library source files and some application template
source files.
Tabl e 7 .Firmware P a ckage : D i r e c tories Descr iptio n . . . . . . . . . . . . . . . . . . . . . . . 35
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1 File Organization Of The Smart Car d Libr aryAN2284
1 File Organization Of The Sm ar t Card Library
The following table presents the library modules:
Table 1.File Library Description
File Description
Device_SCR.hSmart Card definiti ons, types definitions and function prototypes
Device_SCR.cT0 protocol management
sc.h,sc.cPhysical layer
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AN22842 Smart Card Reader Using STR710: Overv iew
2 Smart Car d R ea d er Usi ng STR710: Over view
A smart card reader was developed using the STR710 ARM7TDMI powered microcon troller
and a basic HW to interface 5V powered smart card.
The Smart Card Library was developed in order to support ISO7816-3/4 specification.
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3 Device DescriptionAN2284
3 Device Description
3.1 STR710 Microcontroller
Here is a brief description of the STR710 microcontroller. Please refer to the STR710 datasheet
for a detailed description.
●Memories
- 272KB (256+16K) FLASH program memory (100,000 cycles endurance, data retention
20 years)
- 64KB RAM
- External Memory Interface (EMI) for up to 4 banks of SRAM, Flash, ROM
- Multi-boot capability
●Clock, Reset and Supply Management
- 3.3V application supply and I/O interface
- Embedded 1.8V voltage regulator for core supply
- 0 to 16MHz external main oscillator
- 32kHz external backup oscillator
- Internal PLL for CPU clock
- Up to 50MHz CPU operating frequency when executing from flash
- Realtime Clock for clock-calendar function
- 4 power saving modes: SLOW, WAIT, STOP and STANDBY modes
●Nested interrupt controller
- Fast interrupt handling with multiple vectors
- 32 vectors with 16 IRQ priority levels
- 2 maskable FIQ sources
●Up to 48 I/O ports
- 30/32/48 multifunctional bidirectional I/O
- 14 ports with interrupt capability
●5 Timers
- 16-bit watchdog timer
Four 16-bit timers each with: 2 input captures, 2 output compares, PWM and pulse counter
●10 Communications Interfaces
- 2 I2C interfaces (1 multiplexed with SPI)
- 4 UART asynchronous serial communications interfaces
- Smart Card ISO7816-3 interface on UART1
- 2 BSPI synchronous serial interfaces
- CAN interface (2.0B Active)
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AN22843 Device Description
- USB v 2.0 Full Speed (12Mbit/s) Device Function with Suspend and Resume support
- HDLC synchronous communications interface
●4-channel 12-bit A/D Converter
- Conversion time:
- 4 channels: up to 500Hz (2 ms)
- 1 channel: up to 1kHz (1 ms)
- Conversion range: 0 to 2.5V
●Development Tools Support
- JTAG with debug mode trigger request
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4 SC Peripheral Descript ionAN2284
4 SC Perip h er al Description
4.1 Introduction
The SmartCard Interface is an extension of UART1; for the description of the UART registers,
please refer to STR710 datasheet. The SmartCard interface is designed to support
asynchronous protocol SmartCards as defined in the ISO7816-3 standard.
With SmartCard mode enabled, UART1 is configured as:
- eight data bits plus parity
- 0.5 or 1.5 stop bits
A 16 bit counter and the SmartCard clock generator provide the clock to the SmartCard. GPIO
bits in conjunction with software are used to provide the rest of the functions required to
interface to the SmartCard.
The inverse signalling convention as defined in ISO7816-3, inverted data and MSB first, is
handled in the software.
4.2 External Interface
Table 2.Smart Card Pins
Pin NumberPin NameFunction
P0.12SCCIkSmart card clock
P0.10I/OI/O serial data: open drain @ both ends
Any GPIORSTRese t to card
VCCSupply voltage
VppProgramming voltage
The ScRST, ScCmdVpp (command for Vpp), ScCmdVcc (command for Vcc), and ScDetect
signals (signal for card detection) are provided by GPIO bits of the IO ports under software
control. Programming the GPIO bits of the port for alternate function modes connects the UART
TXD data signal to the ScDataOut pin with the correct driver type and the clock generator to the
ScClk pin.
4.3 Protocol
The ISO standard defines the bit times for the asynchronous protocol in terms of a time unit
called an ETU which is related to the clock frequency input to the card. One bit time is of length
one ETU. The UART transmitter output and receiver input need to be connected together
externally. F or the transmission of data from the STR71x to the SmartCard, the UART will need
to be set up in SmartCard mode.
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AN22844 SC Peripheral Descr iption
Figure 1.ISO 7816-3 Asynchronous Protocol
4.4 Smart Card Clock Generator
The SmartCard clock generator provides a clock signal to the connected SmartCard. The
SmartCard uses this clock to derive the baud rate clock for the serial I/O between the
SmartCard and another UART. The clock is also used for the CPU in the card, if present.
Operation of the Smart Card interface requires that the clock rate to the card is adjusted while
the CPU in the card is running code so that the baud rate can be changed or the performance
of the card can be increased. The protocols that govern the negotiation of these clock rates and
the altering of the clock rate are detailed in ISO7816-3 standard.
The clock is used as the CPU clock for the Smart Card, therefore updates to the microcontroller
clock rate must be synchronized to the SmartCard clock, i.e. the clock high or low pulse widths
must not be shorter than either the old or new programmed value.
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5 SC Reader: Basic Hw For 5v CardAN2284
5 SC Reader: Basic Hw For 5v Card
Some adjustments are needed when using a 5V powered smart card. Figure 2. shows how to
interface a 5V smart card with the microcontroller (STR710):
Figure 2.Basic Hardware For 5V Card Interface
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