ST AN2252 APPLICATION NOTE
AN2252
Application note
Zero-voltage switching and emitter-switched bipolar transistor
in a 3-phase auxiliary power supply
Introduction
The flyback converter is a popular choice in applications where the required power is
normally less than 200W. The main reasons explaining its popularity are its simplicity, low
cost and high efficiency for a small number of active components.
In switching converters power loss is caused by power dissipation within the parasitic
elements of both passive and active components. Power loss in passive components can be
reduced by selecting suitable passive components and carefully designing the transformer.
Power loss in active components can be improved by selecting suitable active components
and making sure that they are used correctly.
Power loss generated by active components can be divided into two categories:
● conduction loss
● switching loss
The aim of the proposed zero-voltage switching control is to reduce switching loss (in this
application, the primary switch turn-on loss). The zero-voltage switching control also greatly
reduces the EMI generated by primary switch turn-on.
Conduction loss is generated with the device fully turned-on, by the voltage drop across the
conducting device. The proposed use of the Emitter-Switched Bipolar Transistor (ESBT) as
the primary switch reduces conduction loss efficiently. Moreover, with its low saturation
voltage and fast switching capability compared to an IGBT or a bipolar junction transistor
(BJT), the ESBT is well suited for this use. These characteristics are essential in
applications where a high breakdown voltage capability is required.
The reference board presented in this Application Note gives a solution of a power supply
for 3-phase applications like inverters for induction motors, welding machines, UPS etc. Very
commonly in this kind of applications, the neutral line is not available or its use is not
allowed, and only phase-to-phase voltage is available. The nominal European phase-tophase voltage is 400VAC. Taking into account a ±20% tolerance, the rectified input bulk
capacitor voltage can reach up to 680VDC. The zero-voltage switching topology requires a
reflected flyback voltage equal to the input bulk capacitor voltage. For this reason it is
necessary to use a switch which will accept at least 1500V and exhibits a low conduction
loss during the ON-time. The high-voltage MOSFET switches rated for this voltage, available
on the market today are rather expensive due to their large die size. The ESBT, thanks to its
low voltage drop, high speed, square reverse bias safe operating area, smaller die size and
lower price is well suited for use as a high-voltage power switch.
November 2006 Rev 2 1/21
www.st.com
Contents AN2252
Contents
1 Theory of ESBT and quasi-resonant operation . . . . . . . . . . . . . . . . . . . 4
2 Application circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Circuit operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2 Transformer design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.3.1 Evaluation and measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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AN2252 List of figures
List of figures
Figure 1. Flyback converter switching cycle - primary switch voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Zero voltage turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Non zero voltage turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. ESBT’s internal schematic and symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6. Power transformer dimensions and winding arrangement . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Current transformer dimensions and winding arrangement . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 8. Assembly schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Picture of the converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Converter efficiency versus output power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Converter switching frequency versus output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Primary switch collector voltage, gate voltage and base current at full load and minimum input
voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Primary switch collector voltage, gate voltage and base current at full load and maximum
input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 15. Primary switch collector voltage, gate voltage and base current at 10% load and minimum
input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Primary switch collector voltage, gate voltage and base current at 10% load and maximum
input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. Detailed view of the primary switch base current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 18. Detailed view of the primary switch base current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 19. Proportional base current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Detailed proportional base and collector current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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Theory of ESBT and quasi-resonant operation AN2252
1 Theory of ESBT and quasi-resonant operation
As mentioned in Introduction, the application studied in this Application Note implements
zerovoltage switching (ZVS). This principle of operation is also known as quasi-resonant or
valley switching.
These names come from the waveform shape of the voltage across the primary side switch
during or just before switch turn-on. Figure 1. shows the switch voltage, which is the sum of
V
, the DC bulk capacitor voltage, and V
IN
winding.
The winding voltage depends on the state of the switch and the amount of magnetizing
energy stored in the magnetic circuit of the transformer. One switching period can be divided
into three basic areas determined by the state of the primary switch and the output diode
conduction: the ON time, the OFF time and the DEAD time areas.
● The “ON time” area corresponds to the time during which the primary switch is on and
the transformerfs magnetizing inductance stores energy.
● During the “OFF time”, the primary switch is off and the magnetizing inductance energy
is discharged through the conducting output diode to the output capacitor. A ringing
voltage of amplitude V
also occurs during this phase. It is generated by the layout-
spike
related track inductance and by the leakage inductance created by the imperfect
magnetic field coupling between the transformer primary and secondary windings. The
ringing voltage amplitude is controlled and limited by a clamp circuit.
● The “DEAD time” starts once all the stored magnetizing inductance energy has been
discharged to the output capacitor. It is called “DEAD time” because neither the primary
switch nor the output diode is conducting. So there is no energy transfer between the
primary side and the secondary side. The primary winding voltage during this phase is
resonating and has a cosine waveform starting from a voltage equal to the OFF-time
plateau voltage. The DEAD time is used for the initiation of the next switching cycle,
only there is no energy conversion, which is why this concept is called QUASI resonant,
in comparison with pure resonant converters where the resonance of the primary
current or voltage is the means of energy conversion. The voltage waveform has a
negative slope and approaches or can even cross zero. The suitable moment to turn
the primary switch on again is when the voltage across the primary switch is lowest.
The shape of the switch voltage waveform at this point evokes a valley. This is why
quasi-resonant or zero-voltage switching is also called valley switching. The resonance
frequency during the DEAD time is determined by the magnetizing inductance and
parasitic capacitance. The parasitic capacitance consists of the primary switch
capacitance, the transformer winding capacitance, the inter-winding capacitance, the
capacitances of the diodes located in the secondary, auxiliary and clamp circuits
transformed to the primary side. The PCB tracks also generate some parasitic
capacitance depending on the layout.
, the reflected voltage across the primary
flyback
4/21
AN2252 Theory of ESBT and quasi-resonant operation
Figure 1. Flyback converter switching cycle - primary switch voltage
The zero-switching operation mode was selected because it has a higher efficiency and
produces less EMI. The benefits of using zero-voltage turn-on for the primary switch can be
clearly seen by comparing Figure 2. and Figure 4. The switch voltage obtained with zero-
voltage turn-on has a higher waveform and the drain or collector current is lower.
Figure 2. Zero voltage turn-on
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Theory of ESBT and quasi-resonant operation AN2252
Figure 3. Non zero voltage turn-on
Beside its advantages, the ZVS mode of operation has challenges. The main challenge lies
in the voltage rating of the primary switch. One of the conditions required for ZVS is that the
voltage across the switch must be able to fall to zero for a certain time during the DEAD
time.
This condition can be met by selecting the V
than DC bulk capacitor voltage V
least twice the maximum V
680VDC, a spike voltage V
IN
spike
. The total voltage across the switch can then reach at
IN
voltage. Considering a double maximum value of VIN of
of 100V plus a safety margin, a switch rated at a minimum of
voltage so that it is equal to or greater
flyback
1500V is required.
Among the available switches rated for such a high voltage, the high-voltage ESBTs from
STMicroelectronics have a low on-state voltage drop like BJTs, a square safe operating
area, they are easy to drive and have a switching speed comparable to that of MOSFETs.
The ESBT is the cascade configuration of a high-voltage BJT and a low-voltage power
MOSFET, as shown in Figure 5. This configuration is not brand new and its discrete version
is well known. Since STMicroelectronics has a good knowledge and portfolio of high-voltage
BJTs and lowvoltage power MOSFETs with very low drain-source on-state resistances
(Rds-on), the next step was to integrate and optimize the performance of the two devices by
cascading them in a single package to reduce the application complexity, EMI and price,
and to increase reliability.
Figure 4. ESBT’s internal schematic and symbol
6/21
AN2252 Application circuit description
Quasi-resonant controller L6565 controls the ESBT by sending a PWM (Pulse Width
Modulation) signal through the gate electrode. The gate electrode drives the internal
lowvoltage MOSFET which switches the emitter of the high-voltage BJT to the external pin S
(source). This is the reason why the transistor is qualified as "emitter switched". The source
pin is usually connected to the application ground.
The base (pin B) of the BJT requires a current bias proportional to the collector current (pin
C). This proportional bias may be provided by a current transformer. The current ratio
between the base and collector currents is given by the current gain h
The current transformer turns ratio must be adapted to the current gain. An example of a
current bias arrangement is given in the Section 2. More details concerning the theoretical
and practical realizations of the bias circuit and the device operation are beyond the scope
of this application note. More details are mentioned in Application Notes AN1699 and
AN1889 (see Section 4), available from the STMicroelectronics website: www.st.com.
of the internal BJT.
21E
2 Application circuit description
2.1 Operating conditions
Table 1. Input/Output specifications
Description Value
Input AC voltage range (400 VAC input) 320 - 480VAC
Input DC voltage range (400 VAC input) 450 - 680VDC
Input AC voltage range (230 VAC input) 160 - 240VAC
Input voltage frequency range 50/60Hz
Nominal output voltage 24VDC
Maximum output current 4.3A
2.2 Circuit operation
Figure 5. shows the schematic of the power supply. The power supply can be supplied from
either an AC or a DC voltage source.
For demonstration purposes in case of an AC supply, power can be supplied through the J2
connector from a single-phase mains of 230VAC. In this case, the input voltage is doubled
by a voltage doubler consisting of diodes D2 and D3, and of capacitors C1 and C2.
If the input voltage source is AC with an RMS value above 240VAC, or if it is a DC source,
the power supply must be connected through connector J1. In this case diodes D2, D3 and
diodes D1, D4 form a bridge rectifier which charges the series-connected capacitors C1 and
C2. In the schematic (Figure 5.), diodes D1, D2, D3, D4 and capacitors C1, C2 are shown
only for demonstration purposes and the converter can be supplied directly from the bus
voltage in the application. The control device is a quasi-resonant controller L6565. During
normal converter operation it is supplied from the auxiliary winding T1C of power
transformer T1 through the one-way rectifier consisting of D5, C4 and C5. Resistor R5 and
7/21
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