ST AN2200 Application note
AN2200
APPLICATION NOTE
Guidelines for migrating ST7LITE1x applications to ST7FLITE1xB
Introduction
This application note provides information on migrating ST7FLITE1x-based applications to
ST7FLITE1xB.
Table 1. Feature comparison
ST7FLITE1x ST7FLITE1xB
Package SO20 300 SO20 300"/ DIP20/ SO16 300" /DIP16
ST7LITE10
Device Name
Program Memory 4K (No change)
Operating Supply 2.4V to 5.5V 2.7V to 5.5V
Operating Temperature -40°C to 85°C (No change)
RAM (stack) - bytes 256 (128) (No change)
Data EEPROM - bytes 128 (No change)
I/Os 15, PA7:0, PB6:0 17, PA7:0, PB6:0, PC1:0
Interrupt 10 12
Power saving modes Slow, Wait, Active Halt, AWUFH, Halt (No change)
Clock Source 1% Internal RC, PLLx4/8, External clock source, Crystal, Resonator oscillator,
Lite Timer Yes (no change)
Watchdog Timer Yes (no change)
12-bit Autoreload Timer
with 32 MHz input clock
SPI Yes (no change)
10-bit ADC with Op-Amp Yes (no change)
Analog Comparator No Yes
Emulator ST7MDT10-EMU3 (No change)
ST7 DVP3 Series ST7MDT10-DVP3(No change)
Programming tools (EPB) ST7MDT10-EPB
Programming tools
(Socket Board)
ICD Tool
INDART kit (Softec) and Reva kit
ST7LITE15
ST7LITE19
Ye s
(Raisonance)
Yes with two counters, one pulse mode,
ST7MDT10-EPB (only for SO20
ST7SB10-123/EU
ST7SB10-123/US
ST7SB10-123/UK
(to be used along with STICK)
ST7LITE10B
ST7LITE15B
ST7LITE19B
dead time
package)
Reva kit (Raisonance)
Rev 1
July 2005 1/13
www.st.com
13
Migrating applications from ST7FLITE1x to ST7FLITE1xB
Contents
1 Feature Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pinout compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 SO20 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Register address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Register content differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.1 SICSR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.2 PWMxCSR Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.3 BREAKCR Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.4 TRANCR Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 New features in ST7FLITE1xB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 12-bit autoreload timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2.1 Dual counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2.2 Break function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2.3 Dead time generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2.4 Long input capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2.5 One pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2.6 Forced update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 Analog comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3.1 On-chip analog comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3.2 Programmable internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6 Device ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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Migrating applications from ST7FLITE1x to ST7FLITE1xB 1 Pinout compatibility
1 Pinout compatibility
1.1 Package
ST7FLITE1x is available only in SO20 300” package. ST7FLITE1xB is available in SO20 300”,
DIP20, SO16 300” and DIP16 packages.
1.2 SO20 pinout
Both ST7FLITE1x and ST7FLITE1xB are pin to pin compatible. On some pins of ST7FLITE1xB
new alternate functions have been added to add new peripherals/ features.
ST7FLITE1x ST7FLITE1xB
Pin No. 4 SS
/AIN0/PB0
Pin No. 8 CLKIN/AIN4/PB4
Pin No. 11 PA 7
Pin No. 19 OSC2
Pin No. 20 OSC1/CLKIN
COMPIN+
COMPIN-
(1)
/SS/AIN0/PB0
(2)
/CLKIN/AIN4/PB4
PA 7/ COMPOUT
OSC2/PC1
(4)
OSC1/CLKIN/PC0
(3)
(5)
(1)
COMPIN+: Analog Comparator Input
(2)
COMPIN-: Analog Comparator External Reference Input
(3)
COMPOUT: Analog Comparator Output
(4)
PC1: Port C1
(5)
PC2: Port C2
3/13
2 Register map Migrating applications from ST7FLITE1x to ST7FLITE1xB
2 Register map
In ST7FLITE1xB, some register addresses have been added, some modified to add new
features and peripherals.
Note: For easy software migration, two general rules to be followed:
All “reserved” byte memory areas must never be “read” or “write”.
All “reserved” and “unused” bits must be left unchanged when accessing the byte.
2.1 Register address
These changes are classified in two groups:
1. New features added: Port C, dual counters in ART Timer, one pulse mode, External Break,
Dead Time generation, Force Update in ART Timer, Analog Comparator and PLL divider.
2. TRANCR (Transfer Control Register) has been replaced by ATCSR2 (Timer Control
Register2). Seven bits relative to the new features in ART Timer have been added in
ATCSR2 register. TRAN <bit0> of TRANCR register has been replaced by TRAN1 <bit0>.
Please, refer to the datasheet for the detailed description of the new features.
4/13
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