ST AN2168 APPLICATION NOTE

AN2168

Application note

ST10F27x hardware development

Getting started

Introduction

The ST10F27x MCUs are derivatives of the STMicroelectronics ST10 family of 16-bit CMOS microcontrollers. They combine high CPU performance (CPU frequency up to 64 MHz) with high peripheral functionalities and enhanced I/O-capabilities. They offer on-chip high speed single voltage Flash memory, on-chip high speed RAM and support clock generation via PLL or an external clock. The ST10F27x MCUs also provide an enhanced 16-bit DSP co-processor to improve their performance in signal processing algorithms.

This application note complements the ST10F27x datasheet and user manual by describing the minimum hardware environment required to build an application around the ST10F27x. A number of features of the ST10F27x devices are described in the first five chapters. In the sixth, a basic schematic is given illustrating the minimum hardware required to get the ST10F27x running. For a deeper description of these features, refer to the ST10F27x datasheet or user manual.

In order to build an application around ST10F27x, the application board should, at least, provide the following features:

■ Power supply

■ Clock management

■ Reset control

■ Boot mode settings

February 2007 Rev 2 1/15

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AN2168

Contents

1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Pin Vstby / EA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Main clock control unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1.1 Direct Drive operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1.2 Prescaler operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1.3 PLL operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.2 32 kHz low power oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Reset management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 External reset circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 How to reset external devices with ST10F27x reset signals . . . . . . . . . . . . . . 7

3.2.1 RSTOUT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2.2 Bidirectional reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Start up configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Boot management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.1 Bootstrap loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.2 Single chip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.3 Boot from external memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6 ST10F27x basic schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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AN2168 1 Power supply

1 Power supply

1.1 Overview

The ST10F27x devices are processed in 0.18 µm technology. ST10F27x core logic and I/O peripherals need different power supplies. In fact, ST10F27x core logic operates with an 1.8V power supply while the I/O peripherals operate with a power supply in the 4.5V to 5.5V range.

The ST10F27x devices are single supply. This means that just one external supply of 5V is necessary to feed both core and peripherals. The power management block includes a regulator to provide the core logic 1.8V supply from the 5V input supply.

The internally generated 1.8V supply is available on pin V18 (pin 56) of the ST10F27x. No external supply can be connected to V18. A decoupling ceramic capacitor of a typical value 10nF(max 100nF) has to be connected between the V18 pin and the nearest Vss pin. The main purposes of this capacitor are to:

● compensate voltage drops due to pulsive current sinked by the device.

● close the feedback loop of the internal voltage regulator making the system stable.

A capacitor of a value 100nF has to be connected for each couple VDD and the nearest pin Vss.

1.2 Pin V

On the ST10F27x, the pin 99 provides two functionalities:

● V

main power is OFF. It must be applied before switching OFF the main power supply.

● EA functionality which configures the ST10F27x to start from external memory if its level is

low during reset.

Ta bl e 1 contains the different configurations and the needed hardware for each case (if stand

by mode is used or not).

Table 1.

Stand by mode used

VSTBY = 5V when VDD is turned off

Stand by mode not used VSTBY = 0V

/ EA

stby

voltage(4.5 - 5.5V) applied on pin 99 maintains the RAM powered when ST10F27x

STBY

/EA

STBY

EA = 1 EA = 0

STBY

Vss

VDD

4 .. 5.5 V

Vss

STBY

Vstby Ex

Vss

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2 Clock management AN2168

2 Clock management

Internal operation of CPU and peripherals are controlled by the same main clock named Fcpu. It is provided by the on-chip clock generator. The RTC module can be controlled either by the ST10F27x main clock or by the auxiliary 32 kHz oscillator.

2.1 Main clock control unit

The ST10F27x core and peripherals can operate with a frequency up to 64 MHz.

The ST10F27x main clock can be:

● generated using the ST10F27x internal oscillator amplifier. In this case, the input signal for

the internal oscillator is generated by an external crystal or resonator with a frequency between 4MHz and 12 MHz, and is connected between XTAL1 and XTAL2: XTAL1 is the input and XTAL2 is the output. This configuration is available when using on chip PLL or the prescaler operation.

● forced by an external clock when the direct drive option is selected. In this case, the

internal oscillator is disabled and neither the external crystal nor resonator is needed. The external clock is input on the XTAL1 pin of the ST10F27x and the XTAL2 pin must be left unconnected.

The clock generation mode is selected during reset according to port 0 lines: P0H.5, P0H.6, P0H.7. Each mode is described below.

2.1.1 Direct Drive operation

When pins P0H.7 = 0, P0H.6 = 1, P0H.5 = 1 during reset, the CPU clock is directly driven from the external generator connected to XTAL1 pin. In this case, neither the crystal nor the resonator is used.

Figure 1. ST10F27x Direct Drive

8 KOhms

VSS

External Clock 1 .. 64 MHz

Unconnected

2.1.2 Prescaler operation

P0H.5 = 1 VDD

P0H.6 = 1

P0H.7 = 0

XTAL1

XTAL2

VDD

ST10F27x

When pins P0H.7 = 0, P0H.6 = 0, P0H.5 = 1 during reset, the CPU clock is derived from the internal oscillator amplifier. The input clock signal is generated by a crystal or a resonator with a frequency between 4MHz and 8 Mhz. The CPU frequency is equal to the input signal on pin XTAL1 divided by 2

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AN2168 2 Clock management

Figure 2. Prescaler operation

For more details, please refer to the ST10F27x datasheet.

2.1.3 PLL operation

For the remaining combinations of pins P0H.7, P0H.6 and P0H.5, the PLL operation is enabled and provides the ST10F27x with a main clock. The PLL multiplies the input frequency entered on pin XTAL1 by a factor selected by the pins P0H.7, P0H.6 and P0H.5 levels.

For more details regarding the maximum crystal frequency and the resulted CPU frequency, refer to ST10F27x datasheet.

Example:

VSS

P0H.5 = 1

P0H.6 = 0

P0H.7 = 0

crystal

XTAL1

XTAL2

VDD

ST10F27x

If a 5 Mhz external crystal is used and P0H[7..5] = 101 configuration is selected, ST10F27x will run with a 40 Mhz frequency. This example is illustrated in the following figure.

Figure 3. PLL operation example

VSS

crystal

5 Mhz

2.2 32 kHz low power oscillator

When power down mode is entered, the main oscillator generating the ST10F27x main clock is switched OFF. If the RTC module needs to continue running during power down mode, a reference clock is needed. Therefore, a 32 kHz crystal is connected to the low power oscillator pins XTAL3 and XTAL4, in order to give a reference clock to the RTC module if the main oscillator is stopped.

1MHoms

P0H.5 = 1

P0H.6 = 0

P0H.7 = 1

XTAL1

VDD

ST10F27x

XTAL2

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