AN2132
Application note
STLC3075 very low single supply SLIC for WLL application in flyback configuration
Introduction
The STLC3075 is a SLIC device specially designed for WLL (Wireless Local Loop) and ISDN terminal adapters.
This document contains a description of the device functions in flyback configuration, and provides some application hints. The device data sheet is an essential complement to this application note, providing important reference information that will simplify understanding of the content.
Product(s) -Obsolete
Product(s) Obsolete
19-Feb-2007 |
Rev 3 |
1/26 |
www.st.com
Content |
AN2132 |
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Content
1 |
Wireless local loop system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2 |
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.1 TQFP 10 mm x 10 mm x 1.4 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
6 |
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
Obsolete3.15
3.16
3.17
3.18
3.19
3.20
3.21
3.22
VBAT voltage generation |
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Operation in off-hook condition . . . . . . . . . . . . |
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. 7 |
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VPOS characteristics . . . |
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Start-up and DC-DC converter . . . . . . . . . . . . . . |
Product(s). . . . . . . . . . . . . . . . . . . . |
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Suggested transformers |
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Input current limitation . . |
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VPOS current capability . |
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3.7.1 |
With USA REN . . . |
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3.7.2 |
With European REN . . . . . . . . . . . . . . . . . |
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RSENSE setting |
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Trapezoidal ringing signal . |
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Ringer load . . . . . . . . . . . . |
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3.10.1 |
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With European REN . . . . . . . . . . . . . . . . . |
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Product(s) |
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3.10.2 |
With USA REN . . . . |
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Efficiency and power dissipation in flyback configuration . . . . . . . . . . . . . |
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Micro interface . . . . . . . . . |
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Protection . . . . . . . . . . . . . |
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Ring trip |
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PCB precautions . . . . . . . |
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Ground configuration . . . . |
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Capacitor . . . . . . . . . . . . . |
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On-hook transmission . . . |
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Phone detection . . . . . . . . |
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ESD immunity . . . . . . . . . . |
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Setting resistor . . . . . . . . . |
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Longitudinal balance . . . . |
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2/26
AN2132 |
Content |
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3.23 TTX filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.24 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.25 Complex impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4 |
Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Appendix A |
STLC3075 in application with VPOS > 12 V. . . . . . . . . . . . . . . . . . . |
24 |
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Appendix B |
STLC3075 for USB suspended current specification. . . . . . . . . . . |
25 |
Product(s) -Obsolete
Product(s) Obsolete
3/26
Wireless local loop system |
AN2132 |
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Figure 1. Wireless central office to premises diagram
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WLL |
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SLIC |
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WLL |
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Central |
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SLIC |
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Base station |
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office |
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transceiver |
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SLIC |
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WLL |
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SLIC |
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Final connection |
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by radio link |
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Local loop |
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wireless |
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local loop |
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PC00335 |
The main characteristics of this device consist in the possibility to:
● operate with a single supply voltage in Fly-Back or Buck-Boost configuration (see AN2118 for information on Buck-Boost configuration)
● operate in Fly-Back configuration with a single supply voltage VPOS in a range from
+4.5 V to +12 V |
Obsolete |
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generate negative battery voltage |
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generate a ring signal (trapezoidal wave form) |
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Product(s) |
Obsolete |
4/26
AN2132 |
Packaging |
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STLC3075 is housed in standard TQFP package plastic with copper lead frame. No copper slugs protrude from the plastic body. STLC3075 uses the “standard” package option.
The thermal resistances, shown in Table 1 and Figure 2, are considered between the junction and the ambient still air, and are calculated or measured in ° C/W.
Table 1. |
Thermal resistance versus package size |
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Rth j-amb |
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Thermal resistance junction ambient |
70 |
° C/W |
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(Full plastic TQFP on single layer board) |
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Rth j-amb |
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Thermal resistance junction ambient |
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° C/W |
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(Full plastic TQFP on four layer board) |
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Theta (j-a) on boards, in still air
Figure 2. Thermal resistance versus board structure
Product(s)
Obsolete
Product(s)
5/26
Application information |
AN2132 |
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Figure 3. |
Typical application schematic |
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VPOS |
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RX |
TX |
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CVCC |
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CVPOS |
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RRX |
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TX AGND |
BGND |
CVCC |
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VPOS |
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T1 |
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RS |
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RS |
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Q1 |
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GATE |
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ZAC |
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RSF |
N-ch |
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CCOMP |
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ZAC1 |
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RSENSE |
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ZAC |
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CSF |
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RSENSE |
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ZA |
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D1 |
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ZB |
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VBAT |
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CH |
ZB |
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CVB |
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RF1 |
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VDD |
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VF |
CZ |
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CV |
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RF2 |
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RDD |
GAIN SET |
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CZ |
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CLK |
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CLK |
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TIP |
RP |
TIP |
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DET |
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DET |
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STLC3075 |
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CONTROL |
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RP |
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D0 |
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D0 |
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RING |
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Product(s) |
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INTERFACE |
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D1 |
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D1 |
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CSVR |
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D2 |
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D2 |
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CREV |
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PD |
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PD |
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CREV |
CSVR |
TTX CLOCK |
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CKTTX |
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RLV |
CTTX1 |
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RTH |
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RLIM |
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CS |
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IREF |
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RLV |
CTTX2 |
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FTTX |
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RREF |
RLIM |
RTH |
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RTTX |
CAC |
ILTF |
RD |
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SUGGESTED GROUND LAY-OUT |
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CFL |
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RTTX |
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RD |
CRD |
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AGND |
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D04TL625A |
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BGND |
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CTTX |
CAC |
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SYSTEM GND |
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PGND |
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3.1 |
Product(s) |
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VBAT voltage generation |
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When operated with a positive supply voltage VPOS and a correctly set clock signal |
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(typically 125 kHz), the SLIC generates a VBAT voltage for the active and ring operations. |
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Obsolete |
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The VBAT voltage level, with a 10% spread, is defined by the voltage divider RF1 / RF2 and |
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can be set by choosing an RF1 value from a recommended set of values (see Table 2): |
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Table 2. |
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VBAT voltage values (VPOS = 4.5V) |
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RF1 (KΩ) |
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VBAT (Active mode) |
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VBAT (Ring mode) |
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270 |
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-46.1V |
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-64.4V |
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285 |
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-48.4V |
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-67,8V |
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300 |
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-51.9V |
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-71.7V |
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315 |
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-54.3V |
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-75.2V |
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330 |
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-56.3V |
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-78.2V |
6/26
AN2132 |
Application information |
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These values are referred to the device in active mode, on-hook condition (IL = 0mA) and in ring mode without load.
The VBAT value must be chosen taking into account the absolute maximum ratings of the device (VBTOT = 90 V). VBTOT = (VBAT + VPOS) = 90 V must not be exceeded.
When ring mode is selected through the control interface, the VBAT voltage is increased by an internal circuit from it’s active level to a predetermined value for ring mode. These two voltage levels (VBAT active and VBAT ring) are hence correlated. When one is set, (ring or active), the other is also set at the same time.
3.2Operation in off-hook condition
A major feature of this device is that when changing from on-hook to off-hook conditions (IL >0 mA), the VBAT voltage is automatically adjusted depending on the loop resistance and on the programmed current limitation value (ILIM).
It should be noted that the device is optimized to operate on short loop applications
(RLOOP ≤500 Ω) in order to obtain the correct ring-trip detection.
A fixed voltage drop, 4 V on TIP/GND and approximately 6 V on RING/VBAT, assures the DC functionality and the proper swing for the AC signal.
In these conditions, with line current reaching the programmedProduct(s)constant current feed value (ILIM), the STLC3075 works like a current generator with a fixed DC current.
When the line is set off-hook, the STLC3075 automatically adjusts the generated battery
voltage (VBAT) to feed the line with a fixed DC current (programmable via RLIM), and so
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optimizes power dissipation. |
Obsolete |
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Considering maximum and minimum values for RLOOP ranging from 500 to100 Ω, and with |
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fixed parameters ILIM = 25 mA and 2Rp = 100 Ω, the battery voltage (VBAT) will be equal to: |
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1. VBAT = 25 mA x (500+100) + 10 V = - 25 V |
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2. VBAT = 25 mA x (100+100) + 10 V = - 15 V |
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Product(s) |
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A correctly set current threshold (typically 9 mA), programmable by external resistor RTH, |
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allows the correct on/off hook transition function. |
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During the off-hook dynamic transition, the CAC capacitor is charged. The line current |
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regulator system senses the current flowing into RD and reduces the ILOOP current to the |
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programmed ILIM value, set by RLIM. |
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The settling time of the ILIM current is about 150 ms, and it is a function of the CAC splitter |
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Obsolete |
µF). |
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capacitor (min. value allowed is 22 |
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3.3 |
VPOS characteristics |
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The input voltage VPOS can change slowly within the data sheet range (4.5 V - 12 V) |
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without any effect on the VBAT voltage. |
The STLC3075 can continue to operate correctly even if the VPOS voltage occasionally goes below 4.5 V (instantaneous value, not steady-state). The only limitation is the minimum voltage required on the external PMOS to keep it in a linear area.
Fast transients, ripples and spikes on the supply voltage VPOS will appear on TIP/RING with a reduced amplitude, depending upon the voltage supply rejection of the device.
7/26
Application information |
AN2132 |
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Bench measurements on SVRR give -35 dB @ f = 50 Hz and -47 dB @ f = 4 kHz, using the test circuit configuration with the device in active mode, loaded with an RLOOP = 500 Ω, and ILIM = 25 mA.
3.4Start-up and DC-DC converter
In order to prevent problems during start-up, an internal circuit turns-on the gate of the MOSFET only when VPOS reaches 4 V and turns it off for VPOS lower than 3 V.
For VPOS voltage higher than 4 V the DC/DC converter power-on is controlled by a soft start circuit embedded on the devices.
DC-DC converter circuit
The DC/DC converter works in flyback condition using a two step process.
● During the ON-time of the MOSFET, energy is taken from the input and stored in the
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VPOS |
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Low/high |
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duty cycle |
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comparator |
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Logic |
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Current |
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VBAT |
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limiter |
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Maximum |
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duty cycle |
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CV |
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comparator |
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RSF |
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(see figure VPOS current |
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capability circuit) |
Ramp |
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Switch |
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gen. |
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driver |
CSF |
RSENSE |
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PWM |
Obsolete |
Product(s) |
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comparator |
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125 kHz |
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clock |
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RF1 |
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RF2 |
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VREF |
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capacitor.Product(s) |
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PC00337 |
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primary winding of the flyback transformer. On the secondary side, the diode is reverse |
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biased, thus the load is being supplied by the energy stored in the output bulk |
Obsolete |
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As soon as the power-mos turns off, the primary circuit is open and the energy stored in |
the primary is transferred to the secondary by magnetic coupling. The diode is forward biased, and the stored energy is delivered to the output capacitor and then on the load.
The dots on the transformer must be in accordance with the voltage, so that during the ONtime of the MOSFET they indicate the positive side with respect to the other one of the transformer. During MOSFET OFF-time they indicate the negative.
The MOSFET must be chosen with the correct Vds voltage rating, considering also the voltage reflected back (Vr) to the primary through the turns ratio n.
The reflected voltage (Vr) must be added to the input voltage VPOS giving out a much higher voltage on the drain of the Mosfet (VBAT / n ) + VPOS.
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