ST AN2131 Application note

AN2131

APPLICATION NOTE

HIGH POWER 3-PHASE AUXILIARY POWER SUPPLY DESIGN

BASED ON L5991 AND ESBT STC08DE150

1. INTRODUCTION

This application note deals with the design of a 3­Phase auxiliary power supply for 150W dual
output SMPS, using the L5991 PWM driver and
the STC08DE150 ESBT as main switch. The
combination of these ST's parts aims at obtaining
a high efficiency solution for high DC input voltage,
typical requirement of any three phase application.
The L5991 driver is an upgraded version of the
UC384X current mode PWM driver. It boasts
some very interesting additional features.

The necessity to handle both high output power
and wide input voltage leads to design a flyback
stage working in mixed operation mode:
discontinuous and continuous. The continuous
current mode introduces a right half plan zero in
the loop-transfer function which makes the
feedback stabilization difficult; the study on the
frequency response, reported in the present
document, has been carried out using MATLAB.

Furthermore, the slope compensation is
implemented and deeply explained. It is
necessary to remove sub-harmonic oscillations
when the duty cycle is higher than 50%.

Finally the experimental results are analyzed to
better understand the benefits given by the use of
the ESBT in this application.

2. DESIGN SPECIFICATIONS AND
PRELIMINARY REMARKS.

The table 1 lists the converter specification data
and the main parameters fixed for the demo board.

If we look at the specs, particularly at the power
and at the input voltage range, and a fter a brief
description of the differences between continuous
and discontinuous mode, it will s oon be clear that
it is very difficult and not conv enient to design a
flyback converter working in discontinuous mode.

Figure 1 shows a simplified schematic diagram of
a flyback converter.

The discontinuous mode, shown in figure 2, has
no front-end step in its primary current, i
turn-off, the secondary current i

, is a decaying

D

, and at

T

triangle which drops to zero before the next turn­on.

In the continuous mode, shown in figure 3, the
primary current i
characteristic appearance of a rising ramp on a
step. During the transistor off time (figure 3), the
secondary current has the shape of a decaying
triangle sitting on a step with the current still
remaining in the secondary at the instant of the
next turn-on. There is, therefore, still some energy
left in the secondary at the instant of next turn-on.

The two modes show significantly different
operating properties and usages. The
discontinuous mode responds more rapidly and
with a lower transient output voltage spike to
sudden changes in load current and input voltage.
On the other hand, discontinuous m ode provides
a secondary peak current in the range of two or
three times the continuous mode. This can be
easily understood by comparing figure 2 and figure

3.
The secondary current average v alue is equal to

the DC load current, as reported in both the above
mentioned figures. Assuming also closely equal
off time, it is obvious that the triangle in the
discontinuous mode must show a much larger
peak than the trapezoid of the continuous mode to
get the same average value. Therefore, in the
discontinuous mode, the larger secondary peak
current, at the beginning o f turn-off, will cause a
greater RFI problem.

Secondary rms current in the discontinuous mode
can be up to t wice that in the continu ous mode.
This requires larger secondary wire size and
output filter capacitors with larger ripple current
ratings for the discontinuous mode. Rectifier
diodes will a lso ha ve a high er tempe rat ure r ise in
the discontinuous mode because of the larger
secondary rms current.

Primary peak currents for the discontinuous mode
are about twice those in the continuous mode. As
a result, the discontinuous mode requires a higher
current rating and possibly a more expensive
power transistor. Also, the higher primary current
in the discontinuous mode results in a greater RFI
problem.

Despite all these relative disadvantages, the
discontinuous mode is much more used for low

has a front-end step and the

T

Rev. 1

1/27March 2005

AN2131 - APPLICATION N OTE

power applications. This is due to two reasons.
Firstly, as mentioned above, the discontinuous
mode, with an inherently lower transformer
magnetizing inductance, responds more quickly
and with a lower transient output voltage spike to
rapid changes in output load current or input
voltage. Secondly, because the transfer function
of the continuous mode has a right half plane zero,
the error amplifier bandwidth must be drastically

consequence, the transient response is much
slower.

Finally, referring to the power spec of our demo, it
is clear that the discontinuous mode cannot be
used because it would determine a very high
primary and secondary peak current with a higher
cost of all the main components involved: power
transistor, secondary diode and output capacitor.

reduced to stabilize the feedback loop. As a

Table 1. Converter Specification data and Fixed Parameters

Symbol Description Values

V

inmin

V

inmax

V

out1

V

out2

V

aux

P

out

η Converter Efficiency >75%
F Switching frequency 90 kHz

Fsb Stand-by switching frequency 35 kHz

V

spike

Rectified minimum Input voltage 250
Rectified maximum Input voltage 850
Output voltage 1 24V/6.25A
Output voltage 2 5V/0.075A
Auxiliary Output voltage 15V/0.01A
Maximum Output Power 150W

Max over voltage limited by clamping circuit 200V

Figure 1. Simplified Schematic Diagram of a Flyback Converter

2/27

Figure 2. Discontinuous Mode Flyback Waveforms

t t

I

AN2131 - APPLICAT ION NOTE

Figure 3. Continuous Mode Flyback Waveforms

IT

t

D

VT

on

T

Ts

T

off

Vin+Vfly

3. FLYBACK CONTINUOS MODE WITH L5991

The minimization of the power drawn from the
mains under light load conditions (Stand-by,
Suspend or some o ther idle modes) i s an issue
that has recently become of great interest, mainly

because new and more severe standards are
coming into force.

The key point of this strategy is a low sw itching
frequency. It is well-known that many of the power
loss sources in a lightly loaded flyback waste
energy proportionally to the switching frequenc y,
hence this should be reduced as much as
possible. On the other hand, it is equally well-

3/27

AN2131 - APPLICATION N OTE

D

V

D

N

V

known that a low switching frequency leads to
bigger and heavier magnetics and mak es filtering
more troublesome. It is then advisable to make the
system operate at high frequency und er nominal
load condition and to reduce the frequ ency when
the system works in a low-consumption mode.
This requires a special functionality of the
controller. It should be able to automatically
recognize the condition of light or heavy load and
then adequate its operating frequency
accordingly.

The L5991 PWM controller, with its "Stand-by
function", meets exactly this requirement. This
application note will deal with the design of a
flyback using L5991 PWM driver, while deeper
details about the driver itself can be foun d in the
dedicated application note AN1049.

The specifications table reports the two values of
the switching frequency, 90kHz for normal mode
and 35kHz for stand-by mode.

4. FLYBACK STAGE DESIGN

The continuous mode operation, as any switching
topology, is identified by observing the steady
state behavior of the energy storage compon ent.
In the flyback topology, the storage element is
represented by the magnetization transformer
inductance, which is charged by the primary
winding during the on time, and discharged by the
secondary winding during the off time. The flyback
topology will hence be working in continuous
mode if the secondary wind ing current does not
reach zero at the end of the off time.

As previously said, the mixed mode implies a
discontinuous mode operation for low load and/or
higher input voltage. The boundary depends on
the output power for a given input voltage. The
higher is the input voltage th e hig her is t he ou tput
power when the continuous mode starts.
Theoretically, there isn't any restriction to fix the
boundary between continuous and discontinuous
mode. It will be given by imposing design equation
for others relevant circuit parameters.

The maximum duty cycle , that in a discontinuous
mode flyback is imposed to prevent the continuous
mode operation, in this case must be fixed
establishing a good trade-off between primary and
secondary side performance. There are two
opposite effects: by inc reasing the duty cy cle the
rms current at primary side can be reduced , while
the rms current at secondary side will be
increased. This means that a higher duty cycle
imposes a less stressful cond ition to any part s in
the primary path, and a more stressful condition to
the secondary path. In the same way, to decrease
the duty cycle causes an optimization of

secondary side and a deterioration of primary side
performances.

The higher duty cycle is a further help to easily
design the flyback stage for a wi de range voltage
input. On the other hand, the higher duty cycle
implies a higher reflected voltage to promptly
demagnetize the flyback transformer.

For such a high power flyback stage, an important
parameter to monitor is the current ripple at
secondary side; it is needed either t o lower rms
current or to reduce RFI. Further consideration
concerns the reflected flyback voltage which is
imposed in order not t o overcome the maximum
breakdown of the power switch.

The above consideration plus some cost issues
generate a clear figure of how to impose design
equations. Moreover, since design specifications
imply a high power output only, the following
calculation will consider the influe nce of both low
power and auxiliary outputs negligible.

In continuous operation mode the relationship
between input and output voltage is only
dependent on the duty cycle and not on the
frequency. The relationship is given by the
following formula:

N

Out

V

in

D

S

11

−⋅=1

N

P

Eq. 1

Eq. 1 is ideal and does not take into consideration
real effects such as the voltage drops on the
power switch and on the output diode. I ncluding
these two voltage drops it is possible to get the first
design equation and calculate the turn ratio
between input and the higher power output
(Vout1).



N

P



=



N

S

1



Where, V

CSon

−
+

and V



VcsVin

on

VdVout

D



⋅



111

−

fw



are respectively the

d1fw

Eq. 2

voltage drop on the power switch and on the
secondary side diode. Eq. 2 is valid for any input
voltage. The second des ig n eq uat ion co mes from
the maximum power switch breakdown, defining
first V

, the flyback reflected voltage, and then

fly

calculating the maximum switch breakdown
voltage.

P

fly

()

N

S

VdVout

111+⋅=

fw

Eq. 3

4/27

AN2131 - APPLICAT ION NOTE

in

V

0

s

V

V

3

8.

mVVVBV

arg

+++=

inspikefly

max

Eq. 4

Eq. 4 also includes the safe design margin and the
allowed voltage spike f ixed by clamping network
design. By combination of Eq. 3 and Eq. 4, the
maximum primary/secondary turn ratio is finally
obtained.

inmVVBV

arg

⇒

inmVVBV

Eq. 5

−−−≤

inspikefly

max

N

P

≤

N

S

1

inspike

+

arg

−−−

max

VV

fwdOu t

11

For 150W power output, the proposed power
switch is STC08DE150, with BV=1500V.
Assuming V

=1V. From Eq. 5 results:

V

d1fw

N

P

1

N

1≤S

From Eq. 2, imposing V

=200V, margin=200V and

spike

in=Vinmin

=220V, Np/Ns =

Eq. 6

10, and considering the normal mode switching
frequency, the maximum duty cycle and the maxi­mum on time are:



N

P

=

N

Vfly








15=



+

VdVaux

fwaux



Eq. 10

The next transformer design step is to fix the
primary and/or secondary magnetization
inductances. There are several criteria: the first
one is to select the primary in duc tance in o rder to
ensure continuous mode operation from full load
to minimum load. This method, since a bigger
primary magnetization inductance is requested,
assures a very low output current ripple,
increasing transformer primary turns.
Furthermore, it makes the RHP zero lower, so that
the loop stabilization will be more complicated.
The second alternative criterion is to calculate
primary and secondary inductances by defining
maximum secondary ripple current. This last
method fixes a limit fo r the rms current and do es
not require such a high primary magnetization
inductance, but it may lead to a transition m ode
operation.

max

TonD

=

⇒

µ

87.5max%8.52

=

Eq. 7

It is worth noticing that the v al ue of t he duty cycle
calculated by Eq. 7 is a good trad e-off to optimi ze
both primary and secondary side performances.
By the way, it must be pointed out that being

>50%, slope compensation may be

D

max

necessary. This subject will be deeply analyzed in
paragraph 7.

Once fixed t he turn ratio between input a nd the
higher power output, the flyback reflected voltage
is fixed by Eq. 3 as well.

N

P

fly

()

N

1

S

VdVout

25011

=+⋅=

fw

Eq. 8

It is now possible to calculate the two turn ratios
referred to the slave Vout2 and to the auxiliary
outputs.



N

P

=

N

2

Vfly




2






3

=



+

VdVout

fwS



Eq. 9

5/27

AN2131 - APPLICATION N OTE

t t

I

1

()

A

5

A

A

Figure 4. Waveforms and Nomencla ture of the Continuous Mo de Flyb ack Desi gn

Ipcs

∆

Ips

Ip

on

T

∆

Is1

s1

VT

Figure 4 reports the most significant waveforms
and relevant nomenclature to further proceed in
the flyback design. From figure 4, we define IPCS
the primary average current value and ∆
primary current variation during the on time, I
the secondary average current value and ∆
secondary current variation during the off time and

the secondary average current.

I

Out1

By adopting the second design method, we now fix
the maximum secondary ripple current ∆
following equations:

I

max1

Out

⋅∆⋅=⋅∆⋅=∆

IIII

SCSSSS

122D

−

max

where ∆

Ι

s1max

variation and ∆

1max1

is the maximum secondary current

Ι

is the ripple current. Therefore

s

we have:

TTVdV

−⋅−

L

()

=

1

S

where L

S1

inductance. Imposing ∆

I

∆

max!

S

is the secondary magnetization

max1

ONSfwOut

Ι

%= ±30% from Eq. 11

s

and Eq. 12 results:

IPS

IS1

Ι

% in the

s

Eq. 1

Eq. 12

the

S1CS

the

Ts

T

off

Once fixed turn ratios an d t he primary inductance
value, some extra calculation is needed to choose
either the transformer or the external components
for flyback stage. Since design specifications re­quest one high power output only, while the slave
and the auxiliary outputs need a very small power,
for designing the transformer we can only consider
a single output. Based on this supposition the rel­evant design parameters are here below reported.

Fixed N

Primary Winding:

Ip

Ipcs

Is1cs

Iout1

Vin+Vfly

= 10 and Lp = 1.6 mH.

p/Ns

−

=∆ Eq. 1

on

max*)min(

TonVcsVin

8.0

=

Lp

Po

=

min

IpIp

+= Eq. 17

cspk

max

DVcsVin

η

max)(

⋅⋅−

on

Ip

∆

88.12=

48.1

=

t

Eq. 16

HL

µ

S

while the primary magnetization inductance is:

L

P

6/27

17.161= Eq. 13

2





N

P





=



N



S



S

1



Ip

=

rms




max



HL

µ

1617

=⋅

1

Eq. 14

=



A

08.1

∆



IpIpD

−=



cspk





I

1



P



2





IpIp

−−+






cspk



2





I

∆



P



=





23









Eq. 18

AN2131 - APPLICAT ION NOTE

A

A

0

A

Is

1

5

1

Master Secondary Winding:

I

Out

Is

1

=

CS

=∆ Eq. 2

Is

1

1

=

Is

rms

()

29.9

=

max1

D

max1

−

IsIs

11 =

+=

CSpk




max





A

24.13

=

−⋅+

TTVdVout

)()1(

ONFW

max

Ls

1

∆

9.18

=

2

∆

I



1



IsIsD

111






s

−−=



cspk

3

2





IsIs









Eq. 19

7.9

Eq. 21

2



∆

I





11

s

−−+

11

cspk







2









Eq. 22

Above calculation have been made c onsidering a
continuous mode operation. This condition is
assured by imposing ∆I

%< 100%. According to

s

the reported design parame ters, the transformer
has been designed by Cramer and all remaining
power parts have been chosen as reported in ST's
application note AN1889.

Figure 5. The Pro portional Driv in g Schematic

and its Equivalent Cir cuit

=

5. BASE DRIVING CIRCUIT DESIGN

In practical applications, such as SMPS, where the
load is variable, the collector current is variable as
well.
As a consequence, it is very important to provide
a base current to the device which i s r elated to the
collector one. In this way, it is possible to avoid the
device over saturation at low load and to optimize
the performance in terms of power dissipation.
The best and simplest way to do this is the
proportional driving method provided by the
current transformer, in figure 5.
At the same time, as already stated, it is very
useful to provide a short pulse to the base to make
the turn-on as fast as pos sible and to reduc e the
dynamic saturation phenomenon.
The pulse is achieved by using the capacitor and
the zener in figure 5.

The driving network guarantees a zone with f ixed

ratio that results imposed once the current

I

C/IB

transformer turn ratio h as been chosen. F rom the
ESBT STC08DE150 dat asheet, and in particular
looking at the st orage time characterization, it is
clear that a turn ratio equal to 5 is a good value to
ensure the right saturation of ESBT at I

= 2A, so

c

that in the current transformer we can fix at first:

N

P

=

N

S

Eq. 23

The core magnetic permeability of the current
transformer has to be as high as possible in order
to minimize the magnetization current I

(that is

m

not transferred to the secondary side but only
drives the core into saturation). On the contrary,
too high a permeability core may lead the core into
saturation even with a very small magnetization
current. To avoid that i t is necessary to increase
the number of primary turns and the size of the
core as well. On the other hand, if a core with a
very small magnetic permeability is chos en, it is
possible to reduce the number of primary turns
and the core size, but if the permeability is too
small we may not have current on t he secondary
side because almost all the collector current

7/27

AN2131 - APPLICATION N OTE

TV

V

V

V

V

I

5

b

()

V

()

becomes magnetization current. As a compromise
a ferrite material with a relative permeability in the
range of 4500 ÷ 7000 is the best choice.

When a ferrite ring with some diameter has been
selected, the minimum primary turns is determined
to avoid the core saturation from the preliminarily
fixed turn ratio N with 0.2. By applying the
Faraday’s law and imposing the maximum flux

equals to B

B

max

N

1

d

ϕ

dt

sat

/2:

AN

B

∆

⋅⋅≅=

t

∆

⇒

N

TPeTPTP

⋅

on

2

=

max1

BA

sate

⋅

Eq. 24

Where, B

is the saturation flux of the core and it

sat

depends on the magnetic permeability.
During the conduction time, the junction base-

emitter of ESBT can be seen as a f orward b iased
diode. To complete the secondary side l oad loop
the voltage drop on both diode D and resistor R
must be added in series with the base of the
ESBT. The equivalent secondary side voltage
source is given by:

VVV

RBDBEonS

5.2≅++=

Eq. 25

Since the magnetization inductance cannot be
neglected, only I

, a fraction of the total collector

P

current, will be transferred to the secondary. As a
result, the magnetization current has to be first as
low as possible. Meanwhile, the value of the
magnetization inductance must be taken into
account for a proper calculation of transformer
primary turns and turns ratio. The magnetization
voltage drop, that is, the voltage at the primary of
the current transformer, can be now easily
calculated:

adjusted to get the desired I

ratio according to

C/IB

the equation below:

N

eff

where I

I

P

==

I

B

is the maximum magnetization

Mmax

II

−

maxmaxCMC

I

current.
The insulation between primary and secondary

should be considered since the voltage on the
primary side during the off time can overstep
1500V.

Next step is to select the zener diode, the
capacitor C

and the resistor Rb. The turn-on

b

performance of ESBT is related to the initial base
peak current and its duration t
approximately given by:

CRt3=

bpeak

B

A suitable value for R

is 0.56. It can eliminate the

b

ringing on the base current af ter the peak, and at
the same time, it generates negligible power
dissipation.

The value t

can be determined once the

peak

minimum on time is set based on the operation
frequency. Bear in mind that in practical
applications it should never be lower than 200ns.
The value of Cb can be counted since the values
of t

I

and Rb are known.

peak

must be limited in order to avoid an extra

peak

saturation of the device. This action is made by the
zener diode Dz that clamps the voltage across the
small capacitor Cb. The zener must be chosen
according to the following empirical fo rmulas and

bpeakZ

Zmin

12

+=

and V

Zmax

inside the range of V

max

RI

peak

:

Eq. 28

that is

Eq. 29

N

T

1

V

S

1

N

T

2

1

5.2
5

[]

V

5.0

=⋅==

The magnetization current will be:

Eq. 26

min

=

RIV2

bpeakZ

The base peak current will be higher with higher

Eq. 30

clamp voltage (Dz) o r smaller capacitanc e (Cb),

TV

ON

=

M

max

max1

L

TP

Eq. 27

which in tu rn will le ad to a shor ter dur ation of th e
peak time.

The higher and longer the base p eak current, the
lower the power dissipation during turn-on. But

The number of primary turns should be increased
if I

is relativ ely hig h. But the core mu st hav e

Mmax

window area enough to hold all primary and
secondary windings. Othe rwise it is necessary to
choose a bigger core size. Once both core
material and size are fixed, the turn ratio must be

you need to limit the Ib peak both in terms of
amplitude and time duration otherwise at low load
a very high saturation level may result. If the
device is over-saturated the storage time is too
long with higher power dissipation during turn-off.
Moreover a long storage time can also cause
output oscillation especially at high inpu t voltage.

8/27

AN2131 - APPLICAT ION NOTE

G

1

)

)

G

2

To overcome the above mentioned problems it is
recommended to fix the peak duration to 1/3 the
minimum duty cycle.

6. CONTINUOS CURRENT MODE LOOP
STABILIZATION

It is well known from literature that the transfer
function of the continuous current mode (CCM)
flyback converter is given by:

sv

)(

1

out

s

)(

1

()

sCR

C

⋅

where N = N
electrolytic capacitor series resistance.

It is worth noticing that the transfer function has
one pole and two zeros, whose on e on the right
half plane. The RHP zero is very difficult if not

==

sv

)(




11

−+

2




sCR

1

+

D

+

, R is the load, RC is the

p/Ns

−⋅⋅

DRN

1(

⋅

+⋅⋅

DR

1(3

Scomp

DsL



p



2

()

1



−

DRN



Eq. 31

impossible to compensate and therefore must be
kept well beyond the closed-loop bandwi dth. As a
result, the transient response o f such system wi ll
be not extremely fast.

Considering now, the transfer function in the
following form:






)(

sv

out

comp

1

)(

sv

)(

s

1




⋅==

k

1



s





−

11





z





s

1

−

p

Substituting the values of this design in case of low
input voltage (worst case), we obtain the
frequency response reported in the following
figure 6. Poles and zeros are reported in the below
equations:

P11= -202/rad=-32.1Hz

= -23Krad/s=-3.79KHz

Z

11

Z

= 88Krad/s=14.1KHz

12



s



−



z

1211



Eq. 3

11

Eq. 33

9/27