In the same way that LED manufacturers succeed |
need for higher efficiency and reduced space |
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to realize blue LEDs, they now propose white |
thanks to a lower power dissipation. |
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LEDs inside a monolithic chip, or so called “single- |
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chip white” LEDs. |
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1.1. General features |
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A current source is the more appropriate way to |
The block diagram is given on Figure 1. An |
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drive LEDs. For a maximum of flexibility, a large |
adjustable oscillator is driving a current controlled |
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voltage range must be supported at the output due |
PWM at a fixed switching frequency. The peak |
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to the large threshold of these white LEDs, and the |
drain current is set for each cycle by the voltage |
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possible serial arrangement of them. |
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present on the COMP pin. The useful range of the |
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Furthermore, if these LEDs have to be dimmable, |
COMP pin extends from 0.5V to 4.5V, with a |
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they must be driven with a PWM (current |
corresponding drain current range from 0A to 2A. |
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generator). |
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This COMP pin can be either sed as an input |
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As a consequence, key features for this off-line |
when |
working |
in |
secondary |
feedback |
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power supply is a current generator, which can |
configuration, or as an |
utput when the internal |
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work as a Pulses Width Modulated mode, with a |
error |
amplifier connected on the VDD pin is |
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wide output voltage range, and must also suite any |
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Product(s) |
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input voltage standard, and a galvanic isolation. |
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operating in primary feedback to regulate the VDD |
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voltage to 15V. |
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The VDD und r voltage comparator drives a high |
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1. VIPer53 DESCRIPTION |
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voltage startup current source, which is switched |
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VIPer53, the first multichip device of the VIPer |
off during the normal operation of the device. This |
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family has been chosen to fulfill the requirements. |
feature together with the burst mode capability |
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It features very low Rdson of 1Ω |
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Obsolete |
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allowing to deliver |
allows to reach very low level of input power in |
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- |
standby mode, when the converter is lightly |
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a typical power of 35W in wide range in a tandard |
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DIP-8 package without a heatsink, answering the |
loaded. |
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Table 1. White LEDs P |
wer Supply Specification |
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Product(s) |
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Parameter |
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Name |
Conditions |
Min |
Typ |
Max |
Unit |
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Output curr nt |
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IOUT |
VOUT = 20V |
200 |
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1000 |
mA |
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Output v ltage |
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VOUT |
IOUT = 1A |
5 |
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40 |
V |
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Output Power |
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POUT |
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40 |
W |
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Obsolete |
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Input Voltage |
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VIN |
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82 |
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265 |
VAC |
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Rev. 1 |
November 2004 |
1/15 |
AN2067 - APPLICATION NOTE
Figure 1. VIPer 53 block diagram
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OSC |
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DRAIN |
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ON/OFF |
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OSCILLATOR |
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PWM |
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LATCH |
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OVERTEMP. |
R1 |
S |
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BLANKING TIME |
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DETECTOR |
FF |
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SELECTION |
1V |
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Q |
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R2 |
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R4 |
R5 |
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R3 |
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UVLO |
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0.5V |
HCOMP |
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COMPARATOR |
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150/400ns |
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VDD |
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BLANKING |
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CURRENT |
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8.4/ |
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STANDBY |
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PWM |
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AMPLIFIER |
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11.5V |
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COMPARATOR |
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COMPARATOR |
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0.5V |
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4V |
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8V |
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125k |
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15V |
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ERROR |
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AMPLIFIER |
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4.35V |
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OVERLOAD |
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OVERVOLTAGE |
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COMPARATOR |
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Product(s) |
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COMPARATOR |
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4.5V |
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18V |
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TOVL |
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COMP |
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SOURCE |
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Obsolete |
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- |
converter, the output power is first limited by the |
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1.2. Overload protection |
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current limitation of the device. If this overload is |
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A threshold of 4.35V typical has been |
lasting for more than a time constant defined by a |
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implemented on the COMP pin. This overload |
capacitor connected on the TOVL pin, the device |
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threshold is 150mV below the clamping voltage of |
is reset, and a new restarting sequence is initiated |
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4.5V which corresponds to the current limitation of |
by turning on the startup current source. The |
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the device. In case of a COMP voltage exceeding |
capacitors on the VDD pin and on the TOVL pin |
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Product(s) |
will be defined together in order to insure a correct |
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the overload threshold, the pull up resistor on the |
startup and a low restart duty cycle in overload or |
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TOVL pin is released and the external capacitor |
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connected on this pin begins to charge. When |
short circuit operation. Here are the typical |
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reaching a value of 4V typical, the device stops |
corresponding formulas: |
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switching and remains in this state until the VDD |
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COVL > 12.5 10 |
–6 |
tss |
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voltage reaches VDDoff, or resumes normal |
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Obsolete |
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4 |
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1 |
C |
OVL |
I |
D Dch2 |
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operation if the COMP voltage returns to a value |
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CVDD > |
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8 |
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below the overload threshold. |
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10 |
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--------------- – 1 |
------------------------------------------ |
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DRST |
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VDD hyst |
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The drain current that the device is able to deliver |
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tss |
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without triggering the overload threshold is called |
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CVDD > |
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IDD1 |
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“current capability”, specified as I |
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in the data |
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------------------------- |
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Dmax |
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VDDhyst |
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sheet. This value must be used to size correctly |
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the converter versus its maximum output power. |
Where tss and DRST are respectively the time |
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When an overload occurs on secondary side of the |
needed for the output voltages to pass from 0V to |
2/15
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|
AN2067 - APPLICATION NOTE |
||||||||||||
|
their nominal values at startup, and the restart duty |
results obtained in the corresponding section of |
|||||||||||||||||||||||||||||
|
cycle in overload or short circuit condition. A |
this document. |
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typical value of 10 % is generally set for this last |
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parameter, as it insures that the output diodes and |
2. WHITE LEDS POWER SUPPLY |
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the transformer don’t overheat. The other |
2.1. Schematic |
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|
parameters can be found in the data sheet of the |
The power topology is an off-line fly-back, working |
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device. |
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at a fixed frequency of 66KHz. |
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As |
the |
VDD |
capacitor |
has |
to |
respect |
two |
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The overall schematic is presented on Figure 2. |
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conditions, the maximum value will be retained to |
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define its value. |
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2.1.1. Primary section |
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1.3. Stand-by operation |
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On the left hand side of the schematic, there is the |
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fuse F1, inrush current limiter CTN1, input filter T1, |
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On the opposite load configuration, the converter |
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followed |
by |
the |
rectifier |
BR1 |
and |
its |
bulk |
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is |
lightly |
loaded |
and |
the |
COMP |
voltage |
is |
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capacitance C3. |
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decreasing until reaching the shutdown threshold |
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R4, C4 |
and |
D4 |
built |
the RCD |
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clamper, |
for |
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at typically |
0.5V. At this |
point, |
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the |
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switching is |
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discharging |
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the |
leakage |
inductance |
of |
the |
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disabled |
and |
no |
more |
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energy |
is |
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passed |
on |
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transformer. |
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secondary |
side. |
So, |
the |
output |
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voltage |
is |
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D2, R2 and C5 is the rectifier and filtering of the |
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decreasing and the regulation loop is rising again |
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primary auxiliary winding, used in forward mode |
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above the shutdown threshold, thus resuming the |
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(refer |
to |
Section |
3). This |
generates |
a |
voltage |
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normal switching |
operation. A |
burst |
mode |
with |
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supply from 21 V up to 80 V, proportional to turns |
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pulse skipping |
is |
taking |
place, |
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as |
long as |
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the |
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ratio between main primary winding and auxiliary |
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output power is below the one corresponding to |
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primary winding, and versus input voltage range |
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the minimum turn on of the device. As the COMP |
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Product(s) |
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voltage is working around 0.5V, the peak drain |
(110 VAC up to 250 VAC). |
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A serial voltage regulator is required to supply the |
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current is very low (it is actually defined by the |
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VIPer 53 with the correct voltage (around 12 V). It |
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minimum turn on time of the device, and by the |
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is built with R14, DZ14, Q1 and C12. Notice that |
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primary winding of the transformer) and no audible |
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the VCE0 of this transistor must be higher than |
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noise is generated. |
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80 V. This transistor may |
also dissipate |
0.7 W |
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Obsolete |
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In addition, the minimum turn on time depends on |
when input voltage is 250 VAC. |
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the |
COMP |
voltage. Below |
1V |
(VCOMPbl), |
- |
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the |
The COMP pin filter is done using C8, R9 and C9. |
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blanking time increases to 400ns, whereas it is |
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150ns for higher voltages. The minimum turn on |
2.1.2. Transformer |
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time resulting from these values are respectively |
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By definition, a current generator may have a large |
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600ns and 350ns, when taking into account the |
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output voltage variation, according to the output |
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internal propagation time. This feature brings the |
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load. |
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following benefit: |
Product(s) |
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Then, if auxiliary winding is used in fly-back mode, |
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• This brutal |
change |
induces |
an |
hysteresis |
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there |
could |
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be |
a large |
voltage |
|
variation |
on |
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between normal operation and burst mode which |
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auxiliary |
winding |
as |
it |
is |
proportional |
to |
the |
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is |
reached |
sooner when the |
output power is |
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reflected |
voltage. So, |
it |
will be used |
in |
forward |
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decreased. |
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mode |
in |
order |
to |
limit the |
voltage |
variation |
for |
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• A short value in normal operation insures a good |
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supplying the VIPer53. |
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drain current control in case of short circuit on |
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Obsolete |
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In order to guaranty the functionality even with low |
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secondary side. |
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output |
voltage |
load, |
an |
auxiliary |
winding |
at |
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• A long value in standby operation reinforces the |
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secondary side has been added, instead using the |
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burst mode by |
skipping |
|
more switching cycles, |
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main secondary output to supply the regulation |
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thus decreasing switching losses. |
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loop |
and |
the |
voltage |
limitation |
(using |
the |
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|
More details regarding the standby operation can |
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|
TSM 101). |
For |
similar |
reasons, |
this |
auxiliary |
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be found in the data sheet. See also the practical |
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winding will be also used in forward mode.
4/15 |
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Obsolete |
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.2 Figure |
AN2067 |
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Schematic Generator Current |
NOTE APPLICATION - |
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D101 |
L101 |
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STTH302 |
10µH |
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T2 |
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C112 |
C110 |
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C111 |
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C4 |
R4 |
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220uF/63V |
10uF/63V |
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100nF |
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R100 |
|
1A OUTPUT |
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1nF/250V |
47K/4W |
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0.25 |
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BR1 |
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D4 |
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1A/600V |
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EBR44-600 |
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F1 |
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D122 |
R122 |
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0.5A |
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BAS21 |
3.3 |
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T1 |
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R2 |
D2 |
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R14 |
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10 |
BAS21 |
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R106 |
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R102 |
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|||||
AC INPUT |
C1 |
C2 |
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3.3K/0.5W |
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10K |
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680 |
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R131 |
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100nF/400V |
100nF/400V |
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U2A |
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2.2K |
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Q1 |
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PC817 |
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R101 |
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CTN1 |
COMMON |
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Product(s)2N5550 |
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12K |
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MODE |
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- |
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FILTER |
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C131 |
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CT<0 |
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10nF |
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C3 |
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R108 |
C114 |
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C113 |
R107 |
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100uF/400V |
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R5 |
VDD |
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DRAIN |
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100K |
100nF |
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22nF |
6.8K |
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VIPER53 |
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5.1K |
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C5 |
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1uF/100V |
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OSC |
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C12 |
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15V |
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U103 |
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6 |
8 |
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22uF/25V |
C11 |
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VCC |
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4.7nF |
TOVL |
COMP |
SOURCE |
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C121 |
TSM101 |
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DZ14 |
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22uF/40V |
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12V/0.5W |
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Vref |
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R109 |
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1K |
VREF INPUT |
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C10 |
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U2B |
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1 |
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R9 |
PC817 |
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100nF |
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6.8K |
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R103 |
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C8 |
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2 |
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2.2K |
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4.7nF |
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J107 |
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C9 |
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470nF |
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3 |
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7 |
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5 |
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P101 |
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1KA |
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GND |
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C YCAP |
R105 |
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4 |
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2.2nF/2KV |
330 |
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R107 |
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AN2067 - APPLICATION NOTE |
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2.1.3. Secondary section |
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2.2. Dimming |
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On the right hand side of the schematic, the |
2.2.1. Dimming purpose |
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secondary winding is used in fly-back mode. |
The main purpose of this application is to supply |
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D101, C112 are respectively the rectifying diode |
“single-chip white LEDs”, and to dim the |
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and its filtering. L101 and C110 build another low |
brightness of these LEDs. |
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pass filter. |
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Because the white color is obtained from two |
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The auxiliary secondary winding used in forward |
peaks in the spectrum (a blue ray and a yellow |
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mode (refer to Section 3) in association with R122, |
ray), there is a dependency between the driving |
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D122 and C121 built the rectifier and filtering for |
current and the white color spectrum. |
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the supply of the regulation loop, using a |
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dedicated component (TSM101). This supply is |
2.2.2. Dimming in the application |
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independent from the load voltage. |
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This application do not propose any PWM and its |
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TSM 101 has been design for voltage and current |
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oscillator circuitry, which can be easily found in |
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controller, which can be used for the control of a |
dedicated literature. The way to proceed is to |
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current generator, in association with a voltage |
apply an external PWM signal on the node |
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limitation. It includes its own reference voltage |
VREF_INPUT. |
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(bandgap), and two operational amplifiers. |
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Provided that output impedance of the generator is |
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not higher than 50 Ω , the input voltage is forced by |
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2.1.4. Current regulation loop |
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the external generator instead of the DC reference |
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The output current is sensed through the shunt |
voltage of the TSM 101. |
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resistor R100. The shunt voltage is amplified using |
The low level voltage of this PWM signal must be |
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R101 and R107 in association with one OPamp of |
0V, and high level voltage must be around 1 V. |
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the TSM 101, building the error amplifier. The |
Then, the peak currentProduct(s)of the PWM generator can |
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current target is set through |
the trimmer P101. |
be set using the trimmer P101, as in DC mode, |
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R103 and P101 provide a fraction of the reference |
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from 0 up to 1 A. |
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voltage provided by the TSM 101 (U103). |
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The maximum frequency allowed is limited by |
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There is also another way to set the current target, |
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dynamic behavior of the PWM current generator |
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using the connector J107 |
for dimming (see |
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(refer to Section 2.2.4). The best way to use this |
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Section 2.2). |
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Obsolete |
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- |
power supply, is to set the lowest frequency |
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convenient for human eye versus flicker. The |
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C113 with R107 is the integrator network of this |
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amplifier, in order to cancel the static error of the |
highest the period, the highest the dimming range. |
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regulation loop. |
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Then, the regulation loop continue with the opto- |
2.2.3. Audible noise |
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coupler U2 (diode and transistor). This set the |
When using the power supply with a PWM signal, |
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level of the COMP pin filter, which set the peak |
some audible noise may be heard, especially if the |
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drain current VIPer53’sProduct(s)power cell (current control |
frequency of the external signal is inside the |
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mode). Thus, the energy stored inside the |
audible range. |
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transformer during each cycles is transferred on |
This noise is emitted by the core of the |
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the secondary side, which supply the output |
transformer, and is a normal way to work. This |
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current. |
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noise is proportional to the output power |
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R131 and C131 is a phase lead network in order |
transferred through it. |
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This noise can be reduced by optimization of the |
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to compensate the phase delay due to L101/C110 |
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filter, for whole loop stability purpose. |
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transformer. |