ST AN2061 APPLICATION NOTE

AN2061

APPLICATION NOTE

EEPROM Emulation with ST10F2xx

Description

External EEPROMs are often used in automotive applications to store adaptative/evolutive da­ta. On the other hand, the Microcontroller used in those systems, are more and more based
on embedded-Flash.

The trend to continuously reduce the number of components is forcing designers to look to use
Flash memory to emulate EEPROM.

This application note will explain the differences between external EEPROMs and embedded­Flash and will give advises on how to substitute external EEPROM to emulated-EEPROM us­ing the on-chip Flash of ST10F2xx devices.

Although the concept is easy to explain and implement “as is”, there are some embedded as­pects that have to be taken into account.

In this application note, the handling of embedded aspects to secure the content of an external
EEPROM are assumed to be known by the reader. So, this document is focusing on the dif­ferences between EEPROMs and embedded-Flash.

November 2004

Rev. 1

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Table Of Contents

1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Embedded-Flash and EEPROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Difference in write access time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Difference in writing method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Difference in erase time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.4 Additional information on Flash. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 EEPROM emulation concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.1 Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2 Program/erase cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.3 Read-While-Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.4 Flash organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.5 Data-set status bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.6 Active Flash bank selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Embedded application aspects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1 Reading the Flash while erasing or programming . . . . . . . . . . . . . . . . 9

4.1.1 Suspend and resume commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.1.2 Minimum software to be copied into the on-chip RAM. . . . . . . . . . . . . . . . . . . . 9

4.2 Data programing / erasing with ST10F2xx . . . . . . . . . . . . . . . . . . . . . 10

4.2.1 Flash field reprogramming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2.1.1 Completion of the programming process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2.1.2 Completion of the erasing process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2.1.3 Safety aspects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.3 Field Reprogramming with ST10F2xx. . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3.1 Field events and Flash reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3.2 List of Events and Suggested Handling Methods . . . . . . . . . . . . . . . . . . . . . . 11

4.3.2.1 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3.2.2 Supply variations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3.2.3 Temperature out of specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3.2.4 ST10 PLL Unlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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1 INTRODUCTION

Substituting external EEPROM with emulated EEP ROM from the embedded-Flash of the Mi­crocontroller is a complex development. This application note assumes that readers are al­ready familiar with the techniques used to secure the content of evolutive information in
external EEPROM of embedded applications.

This application note is organized in 3 parts:

– description of the differences between external EEPROMs and embedded-Flash,
– general description of EEPROM emulation concept,
– introduction to embedded application aspects.

Although this application note is focused and applicable to ST10F269, ST10F280, ST10F276
(and its derivatives: ST10F275, ST10F273, ST10F272, ST10F271), ST10F252 and
ST10F296, most of its content is not dependent on the microcontroller.

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2 EMBEDDED-FLASH AND EEPROM

Before describing the proposed concept for EEPROM emulation, it is important to remember
the main differences between the embedded-Flash memory of a microcontroller and serial ex­ternal EEPROMs. Those differences are generic to any microcontroller (i.e.: not specific to
ST10F2xx variants). They are summarized in the table below.

Table 1. Differences between Embedded Flash and EEPROM

Feature EEPROM

Write time some ms

random byte : 5 to 10ms
page: equivalent to hundred us / word (5
to 10ms per page)

Erase time N/A seconds

Write method once started, is not CPU dependent;

needs only proper supply.

Write access serial : hundred us

random word : 92us
page : 22.5us /byte

Emulated EEPROM from embedded-

Flash

some us
(ex : 16us per word)

(ex : 1.5s)
once started, is C PU dependent: a CPU

reset will stop the write process even if
supply stays inside specification.

parallel : hundred ns
very few CPU cycles per wo rd.

2.1 Difference in write access time

As Flash has shorter write access time, critical parameters can be stored faster in the emulat­ed EEPROM than in a serial external EEPROM, thereby improving the robustness of the sys­tem if the same safety concept is kept.

2.2 Difference in writing method

One of the important differences between external EEPROM and emulated EEPROM for em­bedded applications is the writing method.

– Stand-alone external EEPROM: once started by the CPU, the writing of a word cannot

be interrupted by a CPU reset. Only supply failure will interrupt the writing process; so
properly sizing the decoupling capacitors can secure the complete writing process in­side a stand-alone EEPROM.

– Emulated EEPROM from an embedded-Flash: once started by the CPU, the writing

can be interrupted by a power failure and by a CPU reset.

This difference should be analysed by system designers to understand the possible impact(s)
in their applications and to define the proper handling method.

2.3 Difference in erase time

The difference in erase time is the other important difference between stand-alone EEPROMs
and emulated EEPROM with embedded-Flash. Unlike Flash, EEPROM does not require a
block erase operation to free-up space before write. This means that some form of software
management is required to store data in Flash. Moreover, as the erase process of a block in
the Flash takes few seconds, power shut-down and other spurious events that may interrupt

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the erase process (ex: reset) should be considered when designing the Flash management
software. This means that to design a robust Flash management software it is necessary to
have a deep understanding of the Flash erase process.

The Flash erase process is split in 3 phases:
– phase1: write all bits to 0, starting from the initial content. Interrupt during this phase will re-

sult in more memory cells with a “0” logic level; the content after interrupt in phase1 depends
on the Flash initial content.

– phase2: write all bits to 1, starting from the all “0” configuration. The longer the time before

this phase is interrupted, the higher number of cells will return a “1” logic level. The content
after interrupt in this phase does not depend on the Flash initial content; the content after
phase2 interrupt, shall be regarded as a totally random content.

– phase3: equalization. This phase is necessary to recover over-erased cells. The Flash man-

agement software for EEPROM emulation should guarantee that this phase was success­fully completed before programming in this bank.

The consequence of interrupt during phase2 is that a single bit approach should be a voided
to flag the completion of the erasing process (see more details in Section 3.5 ‘Data-set status
bits’ on page 7).

The consequence of interrupt during phase1 and/or phase2 is that it is recommended to have
fixed data inside the emulated EEPROM so that checksum can be run to tell which Flash bank
keeps the valid data.

The most important point is to ensure that the Flash has been completely erased (phase3 was
not interrupted) before programming data inside a bank.

Note: the design of Flash software management is easier if programming in a new bank is al­ways made just after erasing of this bank (when erasing of one bank is necessary).

2.4 Additional information on Flash Incremental programming: the Flash controller will accept to program a word that is already

programmed if the new word is adding more “0” bits.
Progra mming co mple tion: programming completion is important to guarantee data retention

time; the programming is complete when the Flash controller status indicates the end of pro­gramming without showing any error flag. If programming is interrupted (ex: supply fail, CP U
reset), the cells of the word being programmed will be partially programmed. This can result in
unstable “0”s when reading this word.

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