ST AN2017 Application note
AN2017
APPLICATION NOTE
DIFFERENT WAYS TO RESET ST7 MICROCONTROLLER
INTRODUCTION
The ST7 Microcontroller can be reset in several ways. This application note explains the different ways in which you can reset the ST7 MCU to make best use of them while designing
your application.
The various reset sources are:
– External Reset
– Internal Low Voltage Detect (LVD) Reset
– Internal Watchdog Reset
These sources act on the RESET
service routine vector is fixed at address FFFEh-FFFFh in the ST7 memory map.
pin and it is always kept low during delay phase. The Reset
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DIFFERENT WAYS TO RESET ST7 MICROCONTROLLER
1 INTERNAL LOW VOLTAGE DETECTOR (LVD) RESET
The LVD function continuously monitors the supply voltage and generates a reset when the
is below:
V
DD
– V
IT+(LVD)
– V
IT-(LVD)
This means it secures power-up as well as power-down keeping ST7 in reset. The LVD function is illustrated in Figure 1.
, Reset Release voltage when VDD is rising
, Reset Generation voltage when VDD is falling
The difference between V
IT+(LVD)
and V
IT-(LVD)
ence value for a voltage drop is lower than the V
is called LVD hysteresis. The V
IT+(LVD)
reference value for power-on in order
IT-(LVD)
refer-
to avoid parasitic reset when the MCU starts running and sinks current on supply.
Figure 1. LVD Vs Reset
V
DD
V
IT+(LVD
V
IT-(LVD)
V
Hysteresis
RESET
The voltage threshold can be configured by option byte to be low, medium or high. The LVD
is an optional function which can be selected through option byte and it allows the device to be
used without any External Reset circuitry. During a LVD reset, the RESET
pin is held low, thus
permitting the MCU to reset other devices.
After the device is powered on the supply voltage starts increasing. when the supply voltage
reaches around 1.1V, the internal pull-up on the RESET
ized. After the V
reaches 1.8V, the option bytes are enabled, LVD is enabled by the option
DD
pin is enabled and the core is initial-
bytes (if selected) and the device is in Run mode. The reset will be released at the reset release threshold: high, medium or low depending upon the selection through option bytes.
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DIFFERENT WAYS TO RESET ST7 MICROCONTROLLER
2 INTERNAL WATCHDOG RESET
The Watchdog timer is used to detect the occurrence of a software fault, usually generated by
external interference or by unforeseen logical conditions, which cause the application program
to abandon its normal sequence. The watchdog circuit generates an MCU reset on expiry of a
programmed time period, unless the counter contents are refreshed.
The hardware WDG selectable through option byte is on immediately after reset. The software
WDG will have to be switched on through software. Both, once set on, can no longer be disabled.
2.1 WATCHDOG TIMER
This is present in all ST7 devices except ST7FLite0. It is a programmable free-running down
counter. The length of the timeout period can be programmed by the user in 64 increments by
varying the counter stored in CR register.
If the watchdog is activated (the WDGA bit is set) and when the 7-bit timer rolls over from 40h
to 3Fh, it initiates a reset cycle pulling low reset pin for typically 30µs.
The application program must regularly refresh the watchdog before its timeout period expires
in order to prevent MCU reset. The WDGCR register must be written at regular intervals and
the value stored in the register must be between FFh and C0h.
2.2 WATCHDOG (LITE TIMER)
This Watchdog is present in ST7FLite0 for instance. The watchdog runs with the Lite Timer.
The normal watchdog timeout period is 2msec (@8MHz F
) after which it generates a
CPU
reset. A watchdog reset can be forced at any time provided that the watchdog is already active.
To prevent a watchdog reset, software must set the WDGD bit before the timeout period has
elapsed.
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