ST AN2013 APPLICATION NOTE

AN2013
Application note
TS4994 low voltage differential audio power amplifier
Evaluation board user guidelines
Features
TS4994 low voltage differential audio power amplifier with programmable standby mode
Operating range from V
1W output power @ V
Ultra low power consumption in standby mode (10nA)
100dB PSRR @ 217Hz in grounded mode (Av=1V/V)
Near zero pop & click
Ultra low distortion (0.1%)
Module gain set at 1V/V
Thermal and short-circuit protection
Description
= 2.5V to 5.5V
= 5V, THD=1%, F= 1kHz, with 8Ω load
The DEMO TS4994 is an evaluation board designed for the TS4994 low power differential audio amplifier. The micropackage DFN10 (dual flat non leaded 10 pins) allows space saving and good thermal dissipation.
The differential gain is set at 1V/V and can be adapt ed if necessary with a modification of R1 to R4 values. Av=R2/R1=R4/R3 with R1=R3 and R2=R4.
On the board, you can set the Cn3 and Cn4 jumpers to modify the input configuration from capacitor coupled to common mode feedback. In capacitor coupled configuration, the -3dB cut-off frequency in Hz is:
1/(6.28xR1xC1) = 1/(6.28xR3xC2) with R in Ohm, C in Farad and C1=C2. For more detailed information about component calculation, refer to the TS4994 datasheet.
April 2007 Rev 3 1/6
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Evaluation board connector configuration AN2013

1 Evaluation board connector configuration

Connectors Description
Cn1 and Cn2 Input signal connector (GND and active input signal).
Cn3 and Cn4
Cn5 Output signal connector (V
Cn6
Cn7 Standby control connector (GND, standby, V Cn8 Po wer connector (V
Caution: When you apply power supply through Cn8, DO NOT invert the polarity because it would
destroy the amplifier U1.
Connectors to modify input configuration (from capacitor coupled = no jumper to common mode feedback = short-circui t).
and Vo-)
o+
Mode standby control connector (GND , standb y, V
). Allows you to select
CC
standby mode active high or low.
).
CC
and GND). Power supply voltage from 2.5V to 5.5V.
CC

2 Schematic diagram

Figure 1. Schematic diagram of the TS4994 DFN10

Cn8
R2
22k/1%
R4
22k/1%
Vin-
2
Vin+
4
Bypass
5
Mode Stdby
1 2 3
GND GND
1
Cn7
VccVcc
1 2 3
Pos. Input
Neg. Input
Cn1
Cn2
GND
GND
Cn3
J1
C1
100nF/10V 100nF/10V
C2
J2
Cn4
R1
22k/1%
R3
22k/1%
+
GND
C3 1uF/10V
Cn6
J3
GND
J4
Vcc
9
VCC
-
+
Standby GND
73
GND
+
C4 1uF/10V
GND GND
Bias
C5
100nF/10V
TS4994IQ
Vo+
Vo-
U1
10
6
Cn5
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AN2013 Schematic diagram

Table 1. Component list for the DEMO TS4994 DFN10

Designation Quantity Description
C1 1 100nF/16V, ceramic capacitors, 0603 C2 1 100nF/16V, ceramic capacitors, 0603 C3 1 1μF/50V, electrolytic capacitor C4 1 1μF/50V, electrolytic capacitor
C5 1 100nF/16V, ceramic capacitors, 0603 Cn1 1 2 pins header 2.54mm pitch Cn2 1 2 pins header 2.54mm pitch Cn3 1 2 pins header 2.54mm pitch Cn4 1 2 pins header 2.54mm pitch Cn5 1 2 pins header 2.54mm pitch Cn6 1 3 pins header 2.54mm pitch Cn7 1 3 pins header 2.54mm pitch Cn8 1 2 pins header 2.54mm pitch
J1 to J4 4 Jumper, 2.54mm pitch
R1 1 22kΩ, 1/16W 1% resistor, 0603
R2 1 22kΩ, 1/16W 1% resistor, 0603
R3 1 22kΩ, 1/16W 1% resistor, 0603
R4 1 22kΩ, 1/16W 1% resistor, 0603
U1 1 TS4994IQ (DFN10 package)
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Evaluation board layout AN2013

3 Evaluation board layout

The following figu res show the layers and the top view of the TS4994 demoboard.
Figure 2. PCB top layer Figure 3. PCB bottom layer

Figure 4. Top view of demoboard

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AN2013 Revision history

Revision history

Date Revision Changes
3-Aug-2004 1 Initial release.
8-Dec-2006 2 Format update.
16- Apr-2007 3 Figure 4 updated (PCB is now Rev 1.1).
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AN2013
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