This document des cribes a re ference desi gn for Lightin g Ballast dedicate d to drive 58 W T8 tubes. The
board accepts DC in put vo l tage (u p to 430V ) reali zing the c athod es pr ehea ti ng, t he E oL prot ecti on a nd
the maximum current limitation. It is based on the new VK06 device that integrates the controller and the
Power stage on the same chip. It is housed in SO-16 and SIP-9 packages.
INTRODUCTION
The European Comm unity has agreed on a new direct ive for banning electro magnetic control gea r for
fluorescent lamps. The aim is to improve the system efficiency (EEI-Energy Efficiency Index) reducing
the environmen tal impact. This new di recti ve div ide s the b all ast in different classe s fr om A1 to D . A1 is
the most efficient system, D the least efficient.
■ A1 → Dimmable electronic
■ A2 → Low-loss electronic
■ A3 → Standard electronic
■ B1 → Extra low-loss magnetic
■ B2 → Low-loss magnetic
■ C → Normal-loss magnetic
■ D → High-loss magnetic
Since 1998, the energy classi fication has be come compulsory and it has be en inserted in a Cenelec
standard. It means:
- since April 2002, all ballasts with an EEI of D are banned;
- starting from October 2005, all ballasts with an EEI of C will be banned.
Thus the market is aski ng for cost effectivene ss, good per formance, l ow noise and com pact ballasts to
feed this kind of applications. The VK06 is a very suitable device, satisfying all the requirements with few
external components.
The proposed reference design can supply 58W T8 FL tube with preheating function and EoL
protection. Being the design reference focused on the converter realization (we don ’t co ver the PFC
stage) it has been set to give out the right output power when 400V dc voltage is applied.
1. VK06 DESCRIPTION
The VK06 is a monolithic device made by using the VIPower® M3-3 STMicroelectronics proprietary
technology that integrates in the same chip a vertical flow Power stage and a BCD based control circuit.
The Power stage is made by a high v oltage Bipolar transistor together with a low voltage n-channel
MOS transistor in emitter switching configuration Its performances are a good trade-off betwee n the
Bipolar transisto r low drop/hig h breakdow n voltages and the MOS transi stor hi gh switching s peed. The
block diagram is shown in figure 1.
In the control part the following sections can be analyzed:
1) Supply
2) Oscillator/Trigg er
3) Diac
4) Protections
Figur e 1: VK06 Internal Block diagram
VCC
SEC
DIAC
CapPREH
Vdd
CLAMP
Vref1
DIAC
Reset
Preheating
Vcc
diac on/off
COLL
sec on/off
protection
Vref3
Vcc
Vcc
Reset
CAP1
Vdd
Vref2
Vdd
Supply
Vref4
CAP2CAP1GND
Delay on
protection
Gate Driver
latch
Vcc
Vcc charge
VddVcc
Vref6
CapEOL
Bipolar Driver
Over Curr ent
Detector
Over Temperature
Detector
Vcc
Vcc
Vref5
COLL
sense
R
1.1 SUPPLY (Figure 2)
The device is supplied from the VCC pin connected to an R-C network. From VCC both the control and the
power stage are supplied. A t start up the supply capacitor is charged through a resistor and only few
hundreds µ A are ne eded. Duri ng the opera ti on the devic e is s elf-supplied recovering o n VCC the charge
taken from the Power Bipolar base at turn-off. The voltage on VCC is internally clamped at ~6.8V.
It fixes the conver ter working frequenci es (preheating, ign ition, and steady-state ). The tON (conducti on
time) is set using S EC, CAP1, CAP2 and C apPREH pins. T he device is tri ggered ON when the voltage
on SEC reache s ~2.2V. When this condition is detected the Pow er stage is switched ON and internal
current gene rators start to give co nstant currents to C AP1 and CapPREH. T he device will be switched
OFF when one of the two following conditions is present: the voltage across CAP1 is equal to the internal
voltage referenc e (~2.3V), the voltage on S EC is lower than 0.9V. Using a capacitor on CapPREH and
the two frequency capacitors on CAP1 and CAP2 it is possible to have both preheating and steady state
frequencies. Until the voltage on CapPR EH is lower than 4.2V only the Cfpreh (capaci tor connected to
CAP1) will be cha rged setting the prehea ting frequency. When 4.2V on CapPRE H pin is overcome, an
internal switch puts in parallel Cfpreh with the Cfst capacitors (connected between CAP1 and CA P2)
lowering th e fre quency to the steady-state one. The value of CapPREH fixes t he pr ehea ting dur ati on. In
all the operative conditions the frequency capacitors will be discharged when the voltage on SEC
becomes lower than 0.9V.
During the la mp igni tion the frequency cont rol is realized throug h the secondary wi ndin gs wou nd o n the
primary choke and connected to the SEC pins. In this phase the voltage on SEC reaches 0.9V before the
tON is set by the f requency capacitors. The system oscillate at its resonance freq uency (higher than
steady state one ) allowing the tube igniti on. After the tube ignition the tON will be set by the frequenc y
capacitors.
An internal delay at Power turn-on avoids the hard switching condition.
Figur e 3: Internal oscillator/trigger block
Vcc
Vcc
Reset
CAP1
CAP2CAP1
Cfst
Vdd
2.3V
Delay o n
Cfpreh
Gate Driver
SEC
2.2V
Vdd
CapPREH
4.2V
Cappreh
1.3 DIAC (Figure 4)
Through the DIAC pin two functions are achieved: start of oscillations and reset of the preheating
capacitor CapPREH.
1) St art of oscillation: in OFF condition (voltage on the SEC pin lower than 2.2V) the device can be turned
ON when t he voltage across DIAC ov erco mes ~ 28V. An HV diode keeps the DIAC low when the Po wer
stage is ON.
2) Reset of preheating capacitor: in order to guarantee the right preheating timing the preheating
capacitor must be discharg ed before starti ng oscilla tions. To realize this function a switch on CapPREH
pin is activated when the voltage across DIAC pin overcomes ~12V. On the other side the diac can
activate the circuit only when the voltage on CapPREH becomes lower than ~0.6V.
Figur e 4: Internal diac block
DC BUS
DIAC
CapPREH
Cappreh
SEC
DIAC
Reset
Preheating
Vref1
diac on/off
COLL
Vcc
sec on/of f
Vcc
0.6V
1.4 PROTECTIONS (see figure 5)
The device is protected against over-current and over-temperature. Both protections are activated
connecting on the CapEOL p in a capacitor that fixes the timing. T he over-curren t protection works as
follows: an internal Rsense checks the cur rent through the Power stage and if it exceeds ~1.5A, an
internal generator gives current to CapEOL pin. When the voltage across CapEOL pin reaches ~4.3V the
Power stage is kep t OFF, the diac is deactivated and the current consum ption from VCC is lowered. At
the same time another current generator is activated latching the device in OFF state.
The thermal prote ction is activated when the junction temperatu re exceeds ~150°C. This block, wh en
activated, acts on the same EoL circuit latching the device.
The VK06 is ass embled in two different packages in order to cover both the s urface mounting and the
through-hole PCB. The packages are the SO-16 narrow and the SIP-9 (see figure 6).
In figure 7 the SO-16 thermal characterization is reported. In this package eight pins are connected to the
tab to reduce the junction-pin thermal resistance whereas the case-ambient thermal resistance is related
to the copper a rea on the P CB (device h eat-s ink). The devi ce has bee n charac terized at th ree differe nt
copper ar eas: 0.5, 1 and 2 cm2; at three different po wer dissipatio ns: 0.25, 0.5 and 1W an d measur ing
the devices case temperatures.
In Figure 8 the SIP-9 thermal characterization (no heat-sink) is reported.
Figur e 8: SIP-9 R
th case-ambient
[°C/W]
(no heat-sink)
46
45
44
43
42
41
40
39
00.250.50.7511.251.51.752
Rth case-ambient
[W]
3. CONVERTER DESCRIPTION
In figure 9 th e elec t ric al sc hem e, re ali zing a v oltage-fe ed c on verte r based on VK06 is repo rted. The two
windings Ls connected to the S EC p ins are wou nd on th e chok e Lp. Four different o perative phases can
As soon as the system is supplied, the VCC capacitors C3 and C1 2 start to be ch arged from the DC bus
respectively by means of the resistors R1 and R14-R10. At the same time, the low side diac capacitor C4
starts to be charged by the resistor R3. The network R15-C11 biases the high side DIAC.
In normal ope rations the l ow side device is the one to go o n the fir st time, wh ile in the h igh side d evice
the DIAC pin, clamped by Dz2, is used only to reset the preheating capacitor C9.
As soon as the voltage on C4 reaches about 28.5V the diac block switch ON the device. At that time both
devices must b e biased with the minim um requested VCC voltage (~ 5V) in order to make the system
oscillate properly.
In figure 10 low side (LS) diac and VCC typical wave forms are shown. In the picture the VCC voltage
reaches 6.8V after 4.2 m sec rema ini ng constant at th is value (it is internally clampe d) until the converter
starts to oscillate. At that time the storage charge recovery will be responsible f or the device supply,
charging the VCC capacitor at the final voltage value (~6.8V).
Figure 10: Typical start-up operation
LS DIAC pin voltage
For the diac and VCC biasing networks the following choices can be done:
R14=R10; R14+R10=R1; C3=C
R15>>R
With this setting the converter midpoint will stay at V
the same for any DC bus voltage.
For a proper start up phase the following condition has to be satisfied:
The networ k R15-C11 must be chosen to have the co mplete discha rge of C9 when th e low side diac
strikes the converter. The zener diode Dz2 (~18V) clamps the DIAC pin below the diac activation
threshold.
During oscillations the diac capacitors C4 and C11 will be discharged b y the in ternal diod es connect ed
between DIAC and Power collector while the VCC capacitor will be charged by the charge recovered from
the Power stage (see figure 11).
Figur e 11: Typical waveforms after the diac strike
Mid point voltage
• C
τ
Vc4=R3
3
= (R
• C
14 + R10
(low side)
4
) • C
12
LS VCC pin voltage
LS DIAC pin voltage
3.2 PRE-HEAT
Still referring to the figure 9, the capacitors C7-C9 (with C7=C9) fix the cathodes preheating time
duration. The preheating frequency is set by the capacitors C10-C6 (with C10=C6).
3.2.1 PRE-HEATING TIME
CapPREH pin supplies a constant current I
capPREH
~
55µA. This current is supplied only during the t
ON
.
The preheating ends when 4.2V is reached on CapPREH.
Assu ming that
For the pre-heating frequency calculation the following considerations can be done:
1
--
f
=
1
-- -Tt
2
ON
++=
t
storage
t
dVdt
T
t
storage
const300n≈=sec
(storage duration of the device Power stage)
tdV/dt is the duration of the snubber capacitor (C14) charge during the half-bridge mid-point commutation
between ground and VDC bus.
It can be calculated using the following relationship:
t
dV/dt
= C
snubber
x
∆V/i
peak
where:
■ ∆V (DC bus voltage);
■ i
(peak current);
peak
■ C
(snubber capacitance).
snubber
tON is the conduction time fixed by the preheating frequency capacitor (C6) and device characteristics.
It can be calculated according to the following formula:
tON=K • C6
Where K=6.7µsec/nF (fixed by the VK06)
3.3 STEADY STATE
The steady stat e fre quen cy is se t by the par all el of the capac itors C 6- C16 for the l ow si de a nd C10- C 15
for the high side, where C16=C15. The same formulae of the preheat can be applied:
1
--
f
=
1
-- -Tt
2
t
storage
ON
++=
const300n≈=
t
storage
t
dVdt
sec
t
ON
KC6C16+()=
T
3.4 IGNITION
The converter of figur e 9 has two different resonan ce frequencies, the firs t one before the tube igni tion
the second o ne after the tube ignition . Th e con verte r operation from preh eat to st e ady state is shown in
figure 12.
Resonance frequency
before the tub e ignition(f1).
2
1
fpreh
fign fsteady
(before the tube ignition)
2
(after the tube ignition)
f
In good b allast design the cathode prehe ating is requeste d in order to increase the tub e lifetime. I t is
obtained making high curren t flow through the cathodes for a fixed time. A simple rule for the prehea ting
efficiency check is reported:
1) measure the cathode resistance at the beginning of the preheating;
2) measure this resistance at the end of the preheating;
3) if its value is increased 3-4 times, the cathodes will work at the right temperature during ignition.
During the preheating the current level has to be able to heat the cathodes without generating the ignition
voltage on the start-up capacitor C1. Still referring to figure 12, the converter will operate as follows: it will
startworking at the pre heat in g frequ ency (do t 1) that mu st be higher than the re sonance freque nc y f1. It
will remain in this condition for the time fixe d by the preheating capacitor. After the preheating the device
frequency control is taken by the two secondar y windings mov ing the working fre quency up to the dot 2
where the tube is supposed to ignite. Once the tube is ignited the converter resonance frequency is
lowered to f2 and the conver ter can work at the steady state frequency (dot 3) fixed by the o scillato r
capacitors.
In figure 13 the complete start-up sequence is shown.
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