ST AN1897 Application note

AN1897
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®
- APPLICATION NOTE
VIPower: LOW COST UNIVERSAL INPUT
DVD SUPPLY WITH VIPer22A
Jun-fen g Zhang
INTRODU CTI ON
ST VIPer series of off-line switch mode power supply regulators c ombines an optimized, high voltage, avalanche rugged Vertical Power MOSFET with current mode c ontrol PWM circuitry. The result is truly innovative AC to DC conversion that is simpler, quicker and - with component count halved - less expensive.
The VIPer family al so represents th e ea sies t s olution to com ply with the "Blue Angel" and "Energy Star" Eco norms, with extremely low total power consumption at stand-by mode, thanks to the burst operation.
This document would present the ap plication on DVD player pow er supply with VI Per22A satisfying the specification See table 1 below.
Table 1: Output Specification
INPUT OUTPUT 1 OUTPUT 2 OUTPUT 3 OUTPUT 4 OUTPUT 5 OUTPUT 6
Universal
mains lin e
Min: 85Vac
Max:
265Vac
Note 1: The accuracy of + /- 5% is reached only for a cer tain range of loads combination. See paragraph 3. 2 for cross regulation results.
5 V +/- 5%
(See note 1)
Imin: 20mA Imax: 1.5 A
+12 V +/- 5%
(See note 1)
Imax: 30 mA Imax: 30 mA Imax: 50mA Imax: 150mA Imax: 100mA
-12 V +/- 5% (See note 1)
-26 V + /- 5% (See note 1)
3.3 V +/- 5% (See note 1)
+/- 5%
5V
stb
(See note 1)
March 2004 1/11
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AN1897 - APPLICATION NOTE
1. APPLICATION DESCRIPTION AND DESIGN
1.1 Schematics
The overall schematic is shown in figure 2.
1.1.1 Start-up Phase
As any member of the VIPer family, VIPer22A has an integrated high voltage current source linked to Drain pin . At the startup converter, it will charge the V
(14.5V), and then the VIPer22A starts switching.
1.1.2 Auxiliary Supply
VIPer22A has a wide operating voltage range from 8V to 42V, respectively minimum and maximum values for under-voltage and over-voltage protections.
This function is very useful for achievin g low stand-by total power consum ption. During norma l working, the feedback loop is connected to 5V output by D12 to regulate 5V output. At the mean time, +5Vstb output is blocked by Q3, so +5Vstb regulation is neglected. When the stand-by signal is present, the Vce of Q3 can not provide enough voltage to maintain D12 conducted, so the 5V output is blocked, and the +5Vstb output is connected to the feedback loop. In this condition the +5 Vstb is regulated. Thanks to the transformer structure, all the other secondary outputs and the auxiliary voltages are pulled down to a very low level, also pulling down the total power consumption.
All these contents can be summarized by the following list:
in normal full load, the V
in short circuit, the V
to the well known hiccup mode in practice;
in no load condition, the V
voltage of the device must be lower than the over-voltage protection;
DD
voltage must be lower than the shutdown vol tage. Actually, this condition leads
DD
voltage must be higher than the shutdown voltage.
DD
capacitor until it reaches VIPer startup level
DD
1.1.3 Burst Mode
The Viper22A integrates a current mode PWM with a Power MOSFET and includes the leading edge blanking function. The burst mode is a feature which allows VIPer22A to skip some switching cycles
when the energy drained by the output load goes be low E =(T input voltage, f
It has the consequence to redu ce the switching losses when working in low load cond ition by reducing the switching frequency.
1.1.4 Feedback Loop
The 5V output voltage is regulated with a TL-431 (U3) via an optocoupler (U2) to the feedback pin. If the output voltage is high, the TL-431 will draw more current through its cat hode to t he anode and the current increases in the optocoupler diode. The current in optocoupler NPN increases accordingly and the current into the VIPer22A FB pin increases. When the FB current increases, the VIPer22A will skip some cycles to decrease turn on time and lower the output voltage to the proper level (see figure 1).
The 5V output voltage is regulated thanks to the reference voltage of TL-431 and the resistive divider R8 and R9.
2/11
=Switching frequency, Lp=Primary Inductance).
sw
)2 * fsw/2Lp (Tb=blanking time, Vin=DC
b*Vin
Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s)
Figure 1: VIPer22A FB pin internal structure
60kHz
OSCILLATOR
AN1897 - APPLICATION NOTE
DRAIN
Id
Secondary feedback
+Vdd
I
FB
FB
C
0.23V
1 k
S
PWM
Q
LATCH
R
Is
R1
230
R2
SOURCE
1.1.5 Primary Driver
In a fly-back power supply, the transformer is used as an energy tank fuelled during the ON time of the MOSFET. When the MOSFET turns off, its drain voltage rises from a low value to the input voltage plus the reflected voltage while the secondary diode conducts, transferring on the secondary side the magnetic energy stored in the transformer. Because primary and secondary windin gs are not perfectly magnetically coupled, there is a serial leakage inductance that behaves like an open inductor charged at
that causes the voltage spikes on the MOSFET drain. These voltage spikes must be clamped to keep
I
pk
the VIPer22A Drain voltage below the BVds s (730Vmin) rating. If the peak voltage is higher than this value, the device will be destroyed. The most used solution is the RCD clamp (see figure 3). This is a very simple and chea p solution, but it impacts on the efficiency and even on the power dissipation in stand-by condition. Also the clamping voltage varies with load current. RCD clamp circuits may allow the drain voltage to exceed the data sheet breakdown rating of VIPer22A during overload operation or during turn on with high line AC input voltage. So, a zener clamp is recommended (see figure 4). However such a solution gives higher power dissipation at full load, even if the clamp voltage is exactly defined.
1.2 Transformer Consideration
On the electrical specification of a multiple output transformer (cross regulation, leakage inductance), the main efforts focused on the proper coupling between the windings. A lower leakage inductance transformer will allow a lower power clamp to reduce the input power. It will lead to lower power dissipation on the primary side.
Auxiliary and secondary windings are swapped in order to decrease the coupling to the primary one. The secondary windings act as a shielding layer to reduce the capacitive coupling. Fewer spikes are generated on the auxiliary windings, the primary and secondary windings have better coupling.
Designing transformers for low leakage inductance involves several considerations:
Minimize number of turns
Keep winding build (ratio of winding height to width) small
Increase width of windings
Minimize insulation between windings
Increase coupling between windings
3/11
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AN1897 - APPLICATION NOTE
Figure 2: Application schematic
J4
J4
J4
CON4
CON4
CON4
--12V / 0.03A
--12V / 0.03A
--12V / 0.03A
470uF/25V
470uF/25V
470uF/25V
C19
C19
C19
D13
D13
D13
BYW 100/ 2 00
BYW 100/ 2 00
BYW 100/ 2 00
CON5
CON5
CON5
F- (3.3Vac) / 0.15A
F- (3.3Vac) / 0.15A
F- (3.3Vac) / 0.15A
J3
J3
J3
12345
12345
12345
C25
C25
C25
100uF/10V
100uF/10V
100uF/10V
D11
D11
D11
1N5818
1N5818
1N5818
F+ (3.3Vac)
F+ (3.3Vac)
F+ (3.3Vac)
+12V / 0.03A
+12V / 0.03A
+12V / 0.03A
C17
C17
C17
D9
D9
D9
BYW 100/ 200
BYW 100/ 200
BYW 100/ 200
470uF/25V
470uF/25V
470uF/25V
123
123
123
4
4
4
--26V / 0.05A
--26V / 0.05A
--26V / 0.05A
C20
220uF/50V
C20
220uF/50V
C20
220uF/50V
D10
D10
D10
BYW 100/ 200
BYW 100/ 200
BYW 100/ 200
+5V / 1.5A
+5V / 1.5A
+5V / 1.5A
D8
D8
D8
STPS5L60
STPS5L60
STPS5L60
3.3V
3.3V
3.3V
GND
GND
GND
Vout
Vout
Vout
3
3
3
Vin
Vin
Vin
1
1
1
C15
C15
C15
100uF/10V
100uF/10V
100uF/10V
2
2
2
U4
LD33V
U4
LD33V
U4
LD33V
C13
C13
C13
470uF16V
470uF16V
470uF16V
C12
C12
C12
1000uF/16V
1000uF/16V
1000uF/16V
D12
D12 1N5818
1N5818
J5
J5
J5
123456789
1234567
123456789
CON9
CON9
CON9
+5Vstb / 0.1A
+5Vstb / 0.1A
+5Vstb / 0.1A
R11
R11
680 ohm
680 ohm
C9
C9
C9
220uF/50V
220uF/50V
220uF/50V
D7
D7
D7
BYW 100/ 200
BYW 100/ 200
BYW 100/ 200
Q3
Q3
Q3
8550
8550
8550
8
9
STB
STB
STB
R9
R8
R9
R8
R9
R8
5.1K
5.1K
5.1K
5.1K
5.1K
5.1K
R6
R6
1K
1K
C10
C10
C10
47pF
47pF
47pF
U1A
U1A
U3
817
817
R5
R5
R5
1K
1K
1K
U3
TL431
TL431
R4
R4
R4
1K
1K
1K
Q1
Q1
Q1
9014
9014
9014
151411131298
151411131298
1
2
1
2
1
2
C5
C5
47pF/1KV
47pF/1KV
D5
D5
FR157
FR157
R3
R3
C4
C4
100k/1W
100k/1W
47uF/400V
47uF/400V
1N4007D21N4007D11N4007
1N4007D21N4007D11N4007
1N4007D21N4007D11N4007
1N4007
1N4007
1N4007
D4
D3
D4
D3
D4
D3
RT1
RT1
RT1
NTC5D-9
NTC5D-9
NTC5D-9
2200pF Y1C12200pF Y1
2200pF Y1C12200pF Y1
C2
C2
34
34
CH1
CH1
2.2mH
2.2mH
1 2
1 2
C3
C3
0.1uF X2
2
2
2
1
1
1
CON2
CON2
CON2
0.1uF X2
1
2
1
2
1
2
CON2
CON2
CON2
J2
J2
J2
F1
250V 1A
F1
250V 1A
J1
J1
J1
10
7
10
7
D6
D6
D6
1N4937
1N4937
1N4937
R3
R3
R3
9.1K
9.1K
9.1K
DRAIN
DRAIN
DRAIN
VDD
VDD
VDD
U1B
U1B
817
817
TX1
TX1
TFO EC28---VER3
TFO EC28---VER3
C7
C7
47uF/50V
47uF/50V
U2
U2
U2
SOURCE
SOURCE
SOURCE
CONTROL
CONTROL
CONTROL
VIPER22A
VIPER22A
VIPER22A
C6
C6
C6
47nF
47nF
47nF
2JP1
2JP1
2JP1
1
1
1
JUMPER
JUMPER
JUMPER
C8
C8
C8
1nF / 1KV
1nF / 1KV
1nF / 1KV
Auxilia ry Volt 10 Vmin
Auxilia ry Volt 10 Vmin
+ 5V 1.5A
+ 5V 1.5A
+ 5V 1.5A
Auxilia ry Volt 10 Vmin
+ 5Vstb 0.1A
- 12V 0.03A
+ 12V 0.03A
- 26V 0.05A
3.3Vac 0.15A
+ 5Vstb 0.1A
- 12V 0.03A
+ 12V 0.03A
- 26V 0.05A
3.3Vac 0.15A
+ 5Vstb 0.1A
- 12V 0.03A
+ 12V 0.03A
- 26V 0.05A
3.3Vac 0.15A
4/11
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AN1897 - APPLICATION NOTE
Figure 3: RCD clamp topology Figure 4: Zener clamp topology
For a transformer m eeting international insul ation a nd s afet y requi reme nts, a practical value for leak age inductance is about 1-3% of the open circuit primary inductance.
A high efficiency transformer should have low inter-winding capacitance to decrease the switching losses. Energy stored in the parasitic capacitance of the transformer is absorbed by VIPer cycle by cycle during the turn-on transition. Excess capacitance will also ring with stray inductance during switch transitions, causing noise prob lems. Capacitance effects are usually the m ost important in the primary winding, where the operating voltage (and consequent energy storage) is high. The primary winding should be the first winding on the transformer. This allows the primary winding to have a low mean length per turn, reducing the internal capacitance. The d riven end of the primary winding (the e nd c onne cted to the Drain pin) should be the beginning of the winding rather than the end.
This takes advantage of the shielding effect of the second half of the primary winding and reduces capacitive coupling to adjacent windings. A layer of insulation between adjacent primary windings can cut the internal capacitance of the primary winding by as much as a factor of four, with consequent reduction of losses. A common technique for winding multiple secondaries with the same polarity sharing a common return, is to stack the secondaries (see figure 5). This arrangement will improve the load regulation, and reduce the total number of secondary turns.
Commonly a clamper based on an RCD network or a diode with a zene r to clamp the rise of the dr ain voltage is used.
Figure 5: Multiple output winding
5/11
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AN1897 - APPLICATION NOTE
+12V/30mA, -12V/30mA, -26V/50mA,
2. LAYOUT RECOMMENDATION
Since EMI issues are strongly related to layout, a basic rule has to be taken into account in high current path routing, i.e. the current loop area has to be minimized. If a heat-sink is used it has to be connected to ground too, in order to reduce common mode emissions, since it is close to the floating drain tab.
One more consideration has to be made regarding the control ground connection: in fact in order to avoid any noise interference on VIPer logic pin the control ground has to be separated from power ground.
3. EXPERIMENTAL RESULT
3.1 Efficiency
Figure 6: Efficiency at 230Vac (Load on 5V) Figure 7: Efficiency at 260Vac (Load on 5V)
80.00%
70.00%
60.00%
50.00%
40.00%
30.00%
Efficiency
20.00%
10.00%
0.00%
+12V/30mA, -12V/30mA, -26V/50mA,
3.3V/0.15A
0.1A 0.5A 1A 1.5A 2A
Efficiency at 230Vac Mains Input
80.00%
70.00%
60.00%
50.00%
40.00%
30.00%
Efficiency
20.00%
10.00%
0.00%
0.1A 0.5A 1A 1.5A 2A
Efficiency at 260Vac Input
3.3V/0.15A
Figure 8: Efficiency at 85Vac (Load on 5V) Figure 9: Load Regulation (load on +5V)
Voltage
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80 0A 0.1A 0.5A 1A 1.5A 2A
Load (A)
+5V Load Regualtion
76.00%
74.00%
72.00%
70.00%
68.00%
66.00%
Efficiency
64.00%
62.00%
60.00%
+12V/30mA, -12V/30mA, -26V/50mA,
3.3V/0.15A
0.1A 0.5A 1.0A 1.5A 2.0A
Efficiency at 85Vac Input
3.2 Re gulati on Table 2: Line regulation
Output 85Vac 230Vac 260Vac
5V/ 0.1A 5.15V 5.15V 5.15V 5Vstb/ 0A 5.15V 5.15V 5.15V 12V/ 0A 12.08V 12.11V 12.12V
-12V/ 0A -11.98V -11.99V -12.00V
-26V/ 0A -25.82V -25.85V -25.86V
3.3V/ 0A 3.87V 3.87V 3.88V
6/11
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Figure 10: Cross regulation
15.00
10.00
5.00
0.00
-5.00
-10.00
Voltage
-15.00
-20.00
-25.00
-30.00
AN1897 - APPLICATION NOTE
+5V/0.5A
0m A 10mA 30mA 50mA 100m A 150mA
Load (mA)
+12V -12V -26V 3.3V
Table 3: Stand by model
Output 85Vac 230Vac 260Vac
5V 5Vstb (100mA) 12V
-12V
-26V
3.3V Pdis
2.05V 2.05V 2.07V
5.08V 5.11V 5.14V
4.00V 3.99V 3.98V
3.99V 3.99V 3.98V
9.12V 9.10V 9.08V
1.70V 1.50V 1.51V
0.8W 1W 1.1W
Table 4: Full Load Regulation
Output 85Vac 230Vac 260Vac
5V/ 1.5A 5Vstb/ 0A 12V/30mA
-12V/30mA
-26V/50mA
3.3V/0.15A VIPer Temp
5.02V 5.09V 5.08V
5.02V 5.09V 5.08V
12.03V 12.06V 12.05V
-12.01V -12.05V -12.05V
-26.06V -26.16V -26.15V
3.77V 3.80V 3.78V
53°C 47°C 45°C
7/11
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AN1897 - APPLICATION NOTE
4. TRANSFORMER SPECIFICATION
Figure 11: Transformer Structure
Primary inductance: Lp = 2.8 mH 1KHz, 0.3V Leakage inductance: Lk < 28uH at Seconda ry
and auxiliary winding short (1KHz, 0.3V)
Core: EER28L Bobbin: ER28 (6 + 9 Pin) Vendor: YuanDongDa electronics Co., Ltd
Table 5: Winding Parameters
Layers description Symbol Start Pin End Pin Number of Layer Turns Wire Size
(mm)
Primary Out1 (5V/1.5A) Out2 (12V/0.03A) Out3 (-12V/0.03A) Out4 (-26V/0.05A) Out5 (5Vstb/0.1A) Out6 (3.3V/0.15A) Auxiliary
B
O
B B
I
N
Wp
2 1
Wp Pin2 Pin1 2 65 0.3 W5 Pin7 Pin12 1 4 2*0.6
W12 Pin11 Pin7 1 5 0.3 W-12 Pin12 Pin10 1 9 0.45 W-26 Pin10 Pin13 1 10 0.3
Wstb Pin9 Pin8 1 12 0.3 W3v3 Pin14 Pin15 1 3 0.3 Waux Pin6 Pin5 1 24 0.3
Barrier (3mm)
12
W5
7
7
W12
11
10
W-12
12
Barrier (3mm)
13
W-26
10
15
W3v3
14
8
Wstb
9
5
Waux
6
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5. PCB LAYOUT
Figure 12: Bottom v iew of the demo board (not in scale)
AN1897 - APPLICATION NOTE
Figure 13: PCB Art Work (not in scale)
9/11
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AN1897 - APPLICATION NOTE
5. BILL OF MATERIALS Ref. Description Note
U1 U2 U3 U4 Q1 Q3
D1, D2, D3, D4
D5
D6, D7, D9, D10, D13
D8
D11, D12
C1, C2
C3 C4
C5, C8
C6 C7
C9 C10 C12 C13 C15 C17 C19 C20 C25 RT1
R2
R3
R4, R5, R6
R8, R9
R11
CH1
TX1
F1
J1, J2
J3 J4 J5
Photocoupler PC81 7 SHA RP VIPer22A DIP STMicroelectronics TL431 ACZ STMicroelectronics L4931 ABV33 STMicroelectronics SS9014 SS8550 1N4007 FR157 STTH102 STMicroelectronics STPS5L60 STMicroelectronics 1N5818 STMicroelectronics Y1 Capacitor 2200pF X2 Capacitor 0.1uF Electrolytic Capacitor 100uF/400V 1nF/1KV Ceramic Capacitor 47nF/ 50V Electrolytic Capacitor 47uF/50V Electrolytic Capacitor 220uF/50V Ceramic Capacitor 47pF/ 50V Electrolytic Capacitor 1000uF/16V Electrolytic Capacitor 470uF/16V Electrolytic Capacitor 100uF/10V Electrolytic Capacitor 470uF/25V Electrolytic Capacitor 470uF/25V Electrolytic Capacitor 220uF/50V Electrolytic Capacitor 220uF/16V Not fit
9.1K ¼ W
100K 1W 1K ¼ W
5.1K ¼ W 680 ¼ W
2.2mH Common choke EER28 transformer Fuse 1A 2pin connector 5pin connector 4pin connector 9pin connector
10/11
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AN1897 - APPLICATION NOTE
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such i nformat ion nor f or any infr ingement of patents or other rig hts of third par ties w hich may res ults from i ts use. No license is granted by i m pl i cation or ot herwise under any pate nt or patent ri ghts of STMicroelectr oni cs. Specifications mentioned i n this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical compone nts in lif e support de vi ces or syste m s without express writt en approval of STMicr oelectronics.
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11/11
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