ST AN1889 APPLICATION NOTE
AN1889
Application note
ESBT
STC03DE170HV in 3-phase auxiliary power supply
Introduction
The need to choose a high value of the fly-back voltage is well known to power supply
designers when efficiency and high duty cycle become important requirements. Threephase auxiliary power supplies, starting from a bulk voltage of 750 V, require theoretically
power transistors with a block voltage capability higher than 1200 V. Practical considerations
linked to better efficiency and safe margin may impose to choose devices with even higher
breakdown voltage (i.e. 1500 V, 1700 V). Looking at the power switches currently available,
while power bipolar transistors are strongly limited in switching frequency operation, Power
MOSFETs show a much lower current capability, which may limit their use to low power
applications. Recently available in the market, the ESBTs (Emitter Switched Bipolar
Transistors) represent a valuable and cost effective alternative for all those applications
where high voltage and high switching frequencies are a must.
This application note describes the realization of a 50 W 3-phase auxiliary power supply by
using the STC03DE170HV as main switch for the fly-back converter. Particular attention has
been given to the transformer design as well as to the ESBT driving circuit requirements.
August 2007 Rev 3 1/33
www.st.com
Contents AN1889
Contents
1 ESBT: theory and evolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Application description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Pre-design requisite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Fly-back transformer design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Output circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Clamping circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 ESBT driving circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 Current transformer core selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7 PWM driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.1 Primary side regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2 Control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.3 Switching frequency and max duty cycle setting . . . . . . . . . . . . . . . . . . . 22
7.4 Current sensing and limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.5 ESBT gate drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8 Start-up network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
10 PCB layout and list of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/33
AN1889 List of figures
List of figures
Figure 1. ESBT symbol and equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. ESBT switching operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. ESBT cross section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 4. SMPS simplified block schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Simplified fly-back schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6. ESBT driving circuit and relevant waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 7. ESBT proportional driving circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 8. ESBT proportional waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 9. ESBT current transformer driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 10. ESBT equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11. ESBT fly-back schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 12. Steady state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 13. Turn-on behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 14. Turn-off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 15. Turn-off losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 16. Steady state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 17. Turn-on behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 18. Turn-off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 19. Turn-off losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 20. Steady state at minimum voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 21. Steady state at maximum voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 22. PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3/33
ESBT: theory and evolution AN1889
CBG
1 ESBT: theory and evolution
The "emitter switching" concept was widely investigated a few decades ago with the aim of
improving the trade-off between switching and conduction losses mainly in high voltage
applications.
Figure 1. ESBT symbol and equivalent circuit
S
The configuration can be easily implemented by using discrete components and basically
consists in a high voltage Power Bipolar Transistor driven by a low voltage Power MOSFET,
the two devices result connected in cascade configuration, as shown in fig.1. It is clear that
the structure requires two supplying sources: one to ensure the necessary current to the
base of the power bipolar transistor and the second to drive the gate of the Power MOSFET.
Practically, the Power Bipolar Transistor is biased with a constant voltage source between its
base and ground while a PWM controller could directly drive the gate of the Power
MOSFET.
The On condition is guaranteed just by switching on the Power MOSFET. Being the On
voltage drop on the Power MOSFETs negligible compared the V
of the power bipolar
CE(sat)
transistor, we can consider as a first approach the emitter of the power bipolar transistor
grounded.
The driving circuit associated to the base supplies the current needed to saturate the power
bipolar transistor, so that the main conduction losses are those related to the V
CE(sat)
plus
the losses on the input of the power bipolar transistor itself. As a figure of merit, for devices
rated at 1200V we can note that the current density (and consequently in reverse
proportionality the output voltage drop) on Power Bipolar Transistor is 10 times bigger than
that of an equivalent high voltage Power MOSFET.
Starting from the ON-state and switching off the Power MOSFET, the drain current falls
instantaneously down to zero, so that the output current changes its path to the ground
through the base of the transistor itself.
4/33
AN1889 ESBT: theory and evolution
V
V
V
V
Figure 2. ESBT switching operation
[V]
GATE
TH
t
[µs]
ESBT equivalent switching-on circuit
[V]
TH
GATE
t [µs]
ESBT equivalent switching-off circuit
Being the negative base current equal to the collector current, the resulting turn-off time is
by far lower than any traditional power bipolar transistor and comparable with that of a high
voltage Power MOSFET. In fact, thanks to the floating emitter configuration, the high value of
the reverse base current results in a fast removal of the charges stored in the base,
achieving both reduced storage time and, most important, the structure results virtually free
of that tail current that characterizes all power bipolar based devices. It is worth to be noted
that the configuration gives an extra safety margin in reverse safe operating area, by
increasing the ruggedness versus the secondary breakdown, in fact since the emitter is
open the phenomenon of crowding current under the emitter finger (with possible creation of
hot spot) is practically absent. Cascade configuration can be implemented in a single four or
five pins package either as hybrid or as a monolithic single chip solution that combines a
vertical NPN Power transistor and a low voltage standard MOSFET. The choice of a suitable
value of thickness and resistivity for the collector drift layer coupled with the most
appropriate edge termination allows in principle to design devices with blocking voltage up
to 3.5 KV. The integration of a low voltage Power MOSFET inside the monolithic structure
had represented the main challenge in designing the ESBT. In particular the power
MOSFET has been integrated inside the emitter region of the Power bipolar stage realizing
a sort of a sandwich structure: thanks to the adopted solution the silicon area depends only
by the BJT size in spite the whole switch is formed by the series connection of the two
devices.
Figure 3. ESBT cross section
5/33
ESBT: theory and evolution AN1889
As shown in Figure 3, a DMOS structure is diffused on a higher resistivity layer overlaying
the highly doped emitter region (NBL in the cross section). In terms of diffused and
deposited layers the DMOS structure is quite similar to that of a standard low voltage power
MOSFET even if, of course, its layout is arranged to match the emitter geometry of the BJT
stage. Finally the base contact are placed on a diffused layer deep enough to reach the
base buried layer (PBL).
As previously mentioned to switch-on the ESBT it is necessary to positively bias the gate
with a voltage higher than its threshold (typically 3.5 V for the device in subject), this will
generate, like in all voltage driven transistors, the inversion of the portion of the body region
under the gate oxide of the vertical n-channel MOSFET, so that the emitter results
connected to the ground. In the mean time the base driver supplies the current needed to
saturate the BJT stage leading the ESBT to a high on-state current density due to the high
injection of electrons from the N+ emitter region, similarly to the case of pure power bipolar
transistors. The On-voltage drop is represented by the Collector-Source saturation voltage,
say the V
, and it is consequently given by the contribution of the V
CS(sat)
of the bipolar
CE(sat)
stage plus the small voltage drop of the low voltage MOSFET. Being the bipolar behavior
predominant, the voltage drop results not very sensitive to the temperature variations.
With zero bias in the gate and with grounded base the device behaves like a reverse biased
diode during the off state. The switching-off behavior had already been deeply analyzed at
the beginning of this chapter. It is important to add that the sandwich structure gives an
uniformity of the current density across the whole area of the device. In fact the MOSFET
placed over the BJT (in series with its emitter) acts as a sort of "ideal ballast emitter resistor"
for all of the elementary cells that form the whole transistor. This gives to the device not only
excellent power dissipation but also the suitability to be paralleled with similar devices.
6/33
AN1889 Application description
r
2 Application description
An auxiliary power supply can be schematized in its main functional parts as illustrated in
the simplified block schematic diagram shown in Figure 4.
Figure 4. SMPS simplified block schematic diagram
INPUT
Bridge
+
filter
Feedback
TRANSFORMER + INPUT/OUTPUT
Input
Powe
switch
Input
Driver
CIRCUIT
Output
Output
Feedback
Basically the input voltage is rectified and filtered first, then transferred to the primary side of
the transformer directly through the input circuit of the transformer. This part of the power
supply fixes the voltage clamping at the desired value, the start-up network is also present in
this block to ensure the functionality of the converter during the first pulses. The blocks
power switch and driver, by converting the waveforms from continuous state into alternated
high frequency, allow the transformer, generally operating in discontinuous fly-back mode, to
transfer the stored energy to its secondary side and then to the load through the output
circuit. This basically consists in an ultrafast p-n diode (or Shottky diode) + bulk output
capacitor fixing the maximum acceptable output ripple. When necessary, for a more precise
and lower ripple level, an additional LRC block, working as output post filter network, can be
added.
Power regulation can be achieved through the blocks input feedback (primary regulation) or
output feedback (secondary regulation). By giving to the driver information on the load
requirement, they adapt the input power varying the duty cycle accordingly.
This application note illustrates all design steps needed for the project of a 50W 3-phase flyback converter in discontinuous mode using an ESBT as primary switch.
In this application note the bridge diode + filtering will not be analyzed while the output
circuit will be just mentioned. Most of the attention has been focused on the transformer
design and on the optimization of the driving circuit of the ESBT to allow better performance
in practical applications.
Theoretical results had been validated through a realization of a demo board, its electrical
parameters and component will be shown step by step in the next paragraphs and summed
up at the end of the present note.
7/33
Application description AN1889
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i
g
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2.1 Pre-design requisite
Figure 5 below reported shows the simplified fly-back schematic plus the voltage qualitative
behavior (not in scale) that the switch has to sustain during turn-off operation (point T in the
figure).
Figure 5. Simplified fly-back schematic diagram
Clamping ci rc ui t
Main switch
V
is the maximum input rectified voltage that in 3-phase auxiliary power supplies can be
IN
V
V
r
n
MMaar
iin
OOvveerrvvoollttaaggee
VVoollttaaggee
n
rriin
OOffff
n
iin
V
V
S
S
kkee
V
V
f
f
V
V
IINN
t
t
as high as 750 V.
V
is the reflected fly-back voltage; this is one of the most important parameter in the
fl
transformer design since the input-to-output turn ratio strongly depends on it. The voltage
ringing across V
is generated by the primary inductance that resonates with the equivalent
IN
capacitance at the point T in the figure. This capacitance is mainly due to parasitic
capacitances of the transformer and main switch.
V
is the voltage generated by the leakage inductance of the transformer at primary side.
spike
It must be noted that the energy generated by the mutual inductance at the primary of the
transformer cannot be transferred to the secondary until the leakage inductance is fully
demagnetized. It is the clamping circuit that fixes the value of the voltage at which the
demagnetization process occurs. The voltage ringing in the figure across V
the leakage inductance that resonates with the equivalent capacitance at point T mentioned
before.
The highest overvoltage peak is due to the delay of the diode in the clamping circuit. A good
safety margin must take care of this overvoltage and some transient spikes at start-up.
Transformer design is the major part in a power supply project. A few degrees of freedom
are available to the designer starting from the target data, and most of them are linked each
other so that the final project is often achieved through a re-iteration process.
The table below lists the converter specification data and the first parameters that a
designer has to fix from scratch when a new project of a fly-back converter is going to be
approached. In the last column the values chosen for the present board are reported.
8/33
is generated by
fl
AN1889 Application description
Table 1. Converter specification data and fixed parameters
Symbol Description Values
V
V
inmin
V
V
out
AUX
P
out
in
Rectified minimum Input voltage 250
Rectified maximum Input voltage 750
Output voltage 24
Auxiliary output voltage 15
Maximum output power 48
η Converter efficiency 80%
F Switching frequency 50 kHz
V
flyback
V
spike
Reflected fly back voltage 500 V
Max over voltage limited by clamping circuit 200 V
The first choice to be made is the transformer turn ratio NP / NS, where NP and NS are
respectively the number of primary and secondary windings. The calculation of turn ratio is
correlated to the maximum voltage rating of the transistor to be used as primary switch. In
fact looking at the below formula for fly-back operation, the voltage at the point T in Figure 5
is given by:
Equation 1
N
P
VTV
dcmax
-------
N
V0V
S
+()V
Fdiode,
Spike
minarg+++=
obviously
Equation 2
N
P
where V
-------
+()V
V
0VFdiode,
N
S
= the over voltage limited by the clamping circuit.
spike
= the fly-back voltage
=
1
Must be chosen from the designer taking care that the total voltage at point T in Figure 5
does not exceed the maximum breakdown voltage of the device chosen as power switch
according to the Equation 1.
Once fixed the V
, the choice of the designer is limited to fix the fly-back voltage taking
spike
into account the voltage capabilities offered by the standard transistors available. It is worth
noticing that the higher the fly-back voltage the higher the max duty cycle acceptable: higher
duty cycle at fixed output power, leads to lower IRMS with a consequent overall better
efficiency at primary side and an easier design of wide input range converter.
In this case the use of ESBT, having devices with breakdown voltage capability as high as
1700 V can help in that. For the realized demo board with STC03DE170HV we can fix:
● Margin=250 V
● V
while V
=200 V
Spike
, diode being lower than 1 V can be neglected, so that Vfl results being 500 V. From
F
Equation 1 we can now easily calculate the transformer turn ratio:
9/33
Application description AN1889
p
Equation 3
BV V
N
-------
N
P
S
– V
---------------------------------------------------------------------------------- -
dcmax
V
0VFdiode,
– minarg–
Spike
+
1700 750– 200– 250–
------------------------------------------------------------ -
24 1+
20===
The second step is to ensure that the converter operates in discontinuous mode, the below
formula will guarantee that the energy on the primary coil will be completely transferred to
the secondary before the next cycle occurs:
Equation 4
N
P
•
V
dcminTonmax
-------
N
V0V
S
+()T
F diode,
resetVflTreset
•==
The next formula, giving a safe margin, guarantees the complete demagnetization of the
primary side.
Equation 5
T
onmaxTreset
=+
0.8T
S
Where T
transformer inductance and T
Combining Equation 4 and Equation 5 T
is the maximum on time, T
onmax
is the time needed to demagnetize the
is the switching time.
S
reset
results being:
onmax
Equation 6
Vfl0.8T
T
onmax
------------------------------ -
V
S
+
dcminVfl
10.66µs≅=
The next step is to calculate the peak current. Fixed the output power to 48 W and the
desiderated efficiency (80% in this case), we have also the freedom to choose the switching
frequency. At this purpose, 50 kHz has been selected. The first step is to calculate the
primary inductance. By using an approximated formula that does not take into account the
losses on the power switch, on the input bridge and on the rectified network, we have:
Equation 7
1
-- -
2
P
1.25P
IN
OUT
-----------------------
2
1
S
pIp
-- -
2
---------------------------------------------------- -===
•
L
T
V
dcmin
2
•
TS•
L
T
onmax
2
hence
Equation 8
2
V
dcmin
L
------------------------------------------------ -= 2.95m H=
P
2.5T
•
SPOUT
T
onmax
2
From here now we can calculate the peak current on primary
Equation 9
V
-------------------------------------------
I
P
It is important also to determine the maximum value of I
of the primary turns as shown in the next section.
10/33
•
dcminTonmax
L
P
0.9A==
primary current to fix the number
rms
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