ST AN1712 Application note
AN1712
APPLICATION NOTE
GENERATING A HIGH RESOLUTION
SINEWAVE USING ST7 PWMART
By Microcontroller Division Applications
INTRODUCTION
The purpose of this application note is to present a software technique for generating a high resolution sinewave using ST7 PWMART, tunable in frequency and average amplitude. This application has been implemented using the ST72321J9 microcontroller. The PWMART (Autoreload timer peripheral embedded in the microcontroller) is used to generate a PWM signal and this PWM signal is then filtered by low pass filter (simple RC circuit) to generate a sinewave.
Rev. 1.0
AN1712/0304 |
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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART
1 GENERATING A SINUSOID
This section highlights the main features of the ST7 PWMART used to generate a PWM signal which is then filtered by low pass filter (a simple RC circuit in this example) to generate a sinusoid. Please refer to the ST7 datasheet for more details.
The ST7 PWMART consists of an 8-bit auto reload counter with compare/capture capabilities and a 7-bit clock prescaler.
1.1 PWM GENERATION
The free running 8-bit counter is fed by the output of the prescaler, and is incremented on every rising edge of the clock signal. It is possible to read or write the contents of the counter on the fly by reading or writing the Counter Access register (ARTCAR). When a counter overflow occurs, the counter is automatically reloaded with the contents of the ARTARR register (the prescaler is not affected).
The counter clock frequency is given by:
fINPUT fCOUNTER= 2CC[2:0]
The timer counter’s input clock (fINPUT) feeds the 7-bit programmable prescaler, which selects one of the 8 available taps of the prescaler, as defined by CC[2:0] bits in the ARTCSR Reg-
ister. Thus the division factor of the prescaler can be set to 2n (where n = 0, 1,..7). This fINPUT frequency source is selected through the EXCL bit of the ARTCSR register and can be either
the fCPU or an external input frequency fEXT. The clock input to the counter is enabled by the TCE (Timer Counter Enable) bit in the ARTCSR register. When TCE is reset, the counter is
stopped and the prescaler and counter contents are frozen. When TCE is set, the counter runs at the rate of the selected clock source.
The timer compare function is based on four different comparisons with the counter (one for each PWMx output). Each comparison is made between the counter value and an output compare register (OCRx) value. This OCRx register can not be accessed directly, it is loaded from the duty cycle register (PWMDCRx) at each overflow of the counter.
This double buffering method avoids glitch generation when changing the duty cycle on the fly.
PWM mode allows up to four Pulse Width Modulated signals to be generated on the PWMx output pins with minimum core processing overhead. This function is stopped during HALT mode. Each PWMx output signal can be selected independently using the corresponding OEx bit in the PWM Control register (PWMCR). When this bit is set, the corresponding I/O pin is
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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART
configured as output push-pull alternate function. The PWM signals all have the same frequency which is controlled by the counter period and the ARTARR register value.
fCOUNTER
256 - ARTARR
When a counter overflow occurs, the PWMx pin level is changed depending on the corresponding OPx (output polarity) bit in the PWMCR register. When the counter reaches the value contained in one of the output compare register (OCRx) the corresponding PWMx pin level is restored.
Note: The reload values will also affect the value and the resolution of the PWM output signal duty cycle. To obtain a signal on a PWMx pin, the contents of the OCRx register must be greater than the contents of the ARTARR register.
The resolution for the PWMx duty cycle is:
Resolution=
1
256 - ARTARR
Figure 1. PWM Auto-reload Timer Function
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255 |
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DUTY CYCLE |
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REGISTER |
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COUNTER |
(PWMDCRx) |
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AUTO-RELOAD |
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REGISTER |
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(ARTARR) |
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00 |
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OUTPUT |
WITH OEx=1 |
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AND OPx=0 |
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PWMx |
WITH OEx=0 |
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AND OPx=1 |
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On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is generated if the overflow interrupt enable bit, OIE, in the ARTCSR register, is set. The OVF flag must be reset by the user software. This interrupt is used as a time base in the application.
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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART
1.2 SINEWAVE GENERATION
At the start of the program:
–the PWMDCR0 register is initialized to obtain a 50% duty cycle
–the number of samples in a sinewave cycle is defined
–the counter reload value (ARTARR) is initialized
In the software provided with this application note, predefined initialization values for each frequency can be selected in the define.h file.
More than 18 samples in a sinewave cycle should be selected to generate a sinewave with Total Harmonic Distortion of less than 5%. So, depending on the number of samples in a sinewave cycle, the duty cycle register (PWMDCR0) is modified, taking care that no 0% and 100% PWM is generated for any of the sinewave samples (because the PWM duty cycle must be between ~99% to ~1% to generate an undistorted sinewave). The PWM duty cycle is changed after a certain number (“COUNTER”) of overflow cycles. So, the sinewave frequency depends on three parameters,
–the PWM frequency (fPWM)
–the number of samples in a sinewave cycle
–the number of overflow cycles after which the PWM duty cycle changes (“COUNTER”)
So, the sinewave frequency can be given by:
1
fSINE =
tPWM * number of samples * COUNTER
See also Figure 2.
This PWM signal must be filtered with an external RC network selected for the filtering level required to generate a sinusoid. The cut off frequency of low pass RC filter is given as:
1
fH =
2 * pi * R * C
So, the value of R and C must be chosen in such a way that the output sinewave frequency should be less than this high cut off frequency (fH).
The instantaneous value of sinewave depends on the duty cycle of PWM. So:
VSINE max,min = Max, Min PWM duty cycle * VDD
VSINE average = Average PWM duty cycle * VDD
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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART
Figure 2. Output at PWM0 pin and general calculation for finding sinewave frequency
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Number Of Samples = 4 |
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Output at PWM0 pin |
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fPWM= fCOUNTER/(256-ARTARR) |
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= 20 KHz (if fCOUNTER = 4MHz) |
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COUNTER=10 |
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maximum |
average |
minimum |
fSINE = 1/(50us*4*10) = 500 Hz |
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duty cycle |
duty cycle |
duty cycle |
duty cycle |
duty cycle |
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= ~50% |
= ~87% |
= ~50% |
= ~13% |
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Vdd |
= ~50% |
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10 PWM cycles each |
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time |
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one sinewave cycle |
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255 |
Output of RC circuit |
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PWMDCR0 = Average Value+75 |
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value |
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register |
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PWMDCR0 = Average Value = |
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10(=COUNTER) * tPWM |
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155 (PWM duty cycle = ~50%) |
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PWMDCR0 |
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PWMDCR0 = Average Value-75 |
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ARTARR=56 |
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00 |
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time |
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