ST AN1712 Application note

AN1712

APPLICATION NOTE

GENERATING A HIGH RESOLUTION

SINEWAVE USING ST7 PWMART

By Microcontroller Division Applications

INTRODUCTION

The purpose of this appl ication note is to present a softwar e technique for g enerating a hi gh resolution sinewave using ST7 PWMART, tunab le in frequency and average am plitude. This application has been implemented using the ST72321J9 microcontroller. The PWMART (Autoreload timer peripheral embedded in the microcontroller) is used to generate a PWM signal and this PWM s ignal is t hen f iltered by low pa ss filter ( simple RC circuit) t o gen erate a sinewave.

Rev. 1.0

AN1712/0304 1/14

GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART

1 GENERATING A SINUSO ID

This section highlights the main features of the ST7 PWMART used to generate a PWM signal which is then filtered by low pass filter (a simple RC circuit in this example) to generate a sinusoid. Please refer to the ST7 datasheet for more details.

The ST7 PWMART consists of an 8-bit auto reload counter with compare/capture capabilities and a 7-bit clock prescaler.

1.1 PWM GENERATION

The free running 8-bit counter is fed by the output of the prescaler, and is incremented on every rising edge of the clock signal. It is possible to read or write the contents of the counter on the fly by reading or writing the Counter Access register (ARTCAR). When a counter overflow occurs, the counter is automatically reloaded with the contents of the ARTARR register (the prescaler is not affected).

The counter clock frequency is given by:

COUNTER

INPUT CC[2:0]

The timer counter’s input clock (f

) feeds the 7-bit programmable prescaler, which selects

INPUT

one of the 8 available taps of the presc aler, as de fined by CC[2:0] bi ts in the A RTC SR Reg ister. Thus the division factor of the prescaler can be set to 2

(where n = 0, 1,..7). This f

INPUT

frequency source is selected through the EXCL bit of the ARTCSR register and can be either the f

or an ex ternal i nput frequency f

CPU

. The clock input to the counter is enabled by the

EXT

TCE (Timer Count er En able) bit in t he A RT CSR r egis ter. W hen TCE i s r eset, t he coun ter is stopped and the prescaler and counter contents are frozen. When TCE is set, the counter runs at the rate of the selected clock source.

The timer compa re function is based on four di fferent comparisons with the cou nter (one for each PWMx output). Each comparison is made between the counter value and an output compare register (OCRx) value. This OCRx register can not be accessed directly, it is loaded from the duty cycle register (PWM DCRx) at each overflow of the counter.

This double buffering method avoids gl itch generation when changing the duty cycle on the fly. PWM mode al lows up to four Pulse Width Modul ated signals t o be gen erated on the PWM x

output pins with minimu m core proces sing over head. T his functi on is stop ped duri ng HALT mode. Each PWMx output signal can be selected independently using the corresponding OEx bit in the PWM Contro l regi ster (PW M CR) . W hen this bi t is set, th e cor respondi ng I/O pin is

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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART

configured as output push-pull alternate function. The PWM signals all have the same frequency which is controlled by the counter period and the ARTARR register value.

PWM

COUNTER

256 - ARTARR

When a counter overflow occurs, the PWMx pin level is changed depending on the corresponding OPx (output polarity) bit in the PWMCR register. When the counter reaches the value contained in o ne o f the out put comp are registe r (OCR x) the corresp onding P WMx pin level is restored.

Note: The reload values will also affect the value and the resolution of the PWM output signal duty cycle. To obtain a signal on a PWMx pin, the contents of the OCRx register must be greater than the contents of the ARTARR register.

The resolution for the PWMx duty cyc le is:

Resolution=

256 - ARTARR

Figure 1. PWM Auto-reload Timer Function

DUTY CYCLE

(PWMDCRx)

AUTO-RELOAD

COUNTERPWMx O UTPUT

(ARTA RR)

WITH OEx=1

AND OPx=0

WITH OEx= 0

AND OPx=1

255

On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is generated if the o verfl ow inter rupt enab le bit, O IE, i n th e ARTC S R regi ster, is s et. The OVF flag must be reset by the user software. This interrupt is used as a time base in the application.

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GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART

1.2 SINEWAVE GENERATION

At the start of the program:

– the PWMDCR0 register is initialized to obtain a 50% duty cycle – the number of samples in a sinewave cycle is defined – the counter reload value (ARTA RR) is initia lized

In the software provided with this application note, predefined initiali zation v alues for eac h fr equency can be selected in the define.h file.

More than 18 samples in a sinewave cycle should be selected to generate a sinewave with Total Harmonic Distortion of less than 5%. So, depending on the number of samples in a sinewave cycle, the duty cycle register (PWMD CR0) is modified, taking care that no 0% and 100% PWM is generated for any of the sinewave samples (because the PWM duty cycle must be between ~99% to ~1% to generate an undistorted sinewave). The PWM duty cyc le is changed after a certain number (“COUNTER”) of overflow cycles. So, the sinewave frequency depends on three parameters,

– the PWM frequency (f

PWM

)

– the number of samples in a sinewave cycle – the number of overflow cycles after which the PWM duty cycle changes (“COUNTER”)

So, the sinewave frequency can be given by:

SINE

* number of samples * COUN TER

PWM

See also Figure 2. This PWM signal must be filter ed with an external RC network selected for the fi ltering level r e-

quired to generate a sinusoid. The cut off frequency of low pass RC filter is given as:

fH =

2 * pi * R * C

So, the value of R and C m ust be chosen in s uch a way tha t the output sinewave frequency should be less than this high cut off frequency (f

The instantaneous value of sinewave depends on the duty cycle of PWM. So:

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SINE max,min

SINE average

= Max, Min PWM duty cycle * V

= Average PWM duty cycle * V

GENERATING A HIGH RESOLUTION SINEWAVE USING ST7 PWMART

Figure 2. Output at PWM0 pin and gen e ral calculation for finding sinewave freque ncy

Number Of Samples = 4

Vdd

Output at PWM0 pin

maximum

duty cycle = ~50%

duty cycle = ~87%

average duty cycle = ~50%

minimum duty cycle = ~13%

= f

PWM

COUNTER

= 20 KHz (if f

COUNTER=10

= 1/(50us*4*10) = 500 Hz

SINE

duty cycle = ~50%

/(256-ARTARR)

COUNTER

= 4MHz)

10 PWM cycles each

Output of RC circuit

255

10(=COUNTER) * t

PWMDCR0 register value

time

one sinewave cycle

PWMDCR0 = Average Value+75

PWMDCR0 = Average Value = 155 (PWM duty cycle = ~50%)

PWM

PWMDCR0 = Average Value-75

ARTARR=56

time

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