ST AN1690 APPLICATION NOTE

AN1690

Application note

Fail-safe biasing for ST485EB

Introduction

ST485EB is an RS-485 based interface designed for multipoint differential transmission on a
single twisted pair cable. It allows half duplex bi-directional transmission, long cable lengths
and high data rates.

Typical applications include LANs, industrial (PLC devices), automotive and computer
interfaces.

System evolution in the data communication field has lead to the development of faster
devices with lower data bit error rates. The ST485EB meets all these requirements. Figure 1
shows a typical multipoint bus configuration.

Figure 1. Typical RS-485 line

October 2007 Rev 2 1/15

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Contents AN1690

Contents

1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Bus states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Data transmission protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Internal fail-safe and bus termination . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 DC terminated fail-safe resistor value calculations . . . . . . . . . . . . . . . . 7

5.1 Example calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

6 AC terminated fail-safe resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7 Fail-safe in multipoint transmission buses . . . . . . . . . . . . . . . . . . . . . . 10

8 Fail-safe circuit comparisons with ST485EB . . . . . . . . . . . . . . . . . . . . 11

9 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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AN1690 List of figures

List of figures

Figure 1. Typical RS-485 line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. Differential plot for driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3. Asynchronous UART sequence format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 4. Terminated line (on both sides) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 5. Open terminated line (end side only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 6. Unterminated or open line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 7. External fail-safe and line DC termination resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 8. AC termination with external fail-safe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 9. Multipoint transmission line with ST485EB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 10. Equivalent test circuit for a fully loaded network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 11. DC fail-safe characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 12. Fail-safe DC termination - eye pattern and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. Fail-safe AC termination - eye pattern and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

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Overview AN1690

1 Overview

In a point-to-point configuration (such as the RS-422 standard) the driver is normally always
enabled.

The bus can remain only in the HIGH or LOW state (the bus is always biased). In a
multipoint application, when more than one driver is physically connected to the bus and
only one driver at a time is enabled during data transmission, all the drivers can be disabled
when there is no data to send. In this case there is no bus biasing (undefined state). Fail­safe biasing solves this problem providing the bus with a proper known state. This
application note describes the topic of fail-safe biasing.

2 Bus states

When a bus is driven by an active driver, it can be in one of two states, either high or low. It
can also be kept in one of these states by external pull-up resistors that provide the
necessary voltage to get a known bus state. The undefined state in RS-485 standard buses
occurs every time the differential voltage is less than +/-200 mV. In Figure 2 the bus is driven
from low to high and is then disabled. The bus, however, remains high due to external fail­safe biasing.

Figure 2. Differential plot for driver outputs

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AN1690 Data transmission protocol

3 Data transmission protocol

One of the most well known formats for low speed data transmission is the UART timing
format. It is an asynchronous protocol, typically composed of 12 bits. The timing sequence
starts with a transition from high to low. Next there are 9 data bits (8 data bits plus a parity
bit). Finally, the line remains high for one or two bits, which represents the end of the
character.

Figure 3. Asynchronous UART sequence format

In a multipoint application, when no more data has to be sent, the line should remain high
until the next start bit. Since the active driver is disabled, and all other drivers are off, this is
not easy to achieve.

One way to solve this problem is the use of an alternate protocol (software solution). The
other way is to use fail-safe biasing (hardware solution).

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