AN1686
APPLICATION NOTE
AN L5991-BASED CONVERTER WITH
TEMPORARY EXTRA POWER CAPABILITY
by C. Adragna
In some applications the SMPS, normally supposed to deliver a certain amount of power, from time to time undergoes load peaks that can be even two or more times as much. Such peaks are often too long to be properly handled by oversizing the output capacitors, but short if compared to the thermal time constants of the power components. Typical examples of such loads are motors and audio systems.
In this case, designing the SMPS for the peak power demand from the load would lead to a poorly used and more expensive system. It is more cost-effective to design for the maximum continuous power and allow the peak power to pass. However, if for any reason the load demands such peak power level for a long time, some of the power components, not sized for withstanding this, will definitely fail unless the system is stopped somehow.
In this application note a design example of such a system, based on the ST's advanced PWM controller L5991, is carried out.
Introduction
Purpose of this note is to provide a few brief design guidelines on the switch-mode power supply whose electrical specification is summarized in the following table.
Table 1. Design Electrical Specification
Symbol |
Parameter |
Value |
Unit |
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Vin |
Input Voltage Range |
88 to 264 |
VACrms |
fL |
Mains Frequency |
50/60 |
Hz |
Poutx |
Maximum Continuous Output Power |
45 |
W |
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Poutpk |
Peak Output Power (t ≤ 0.5 s) (*) |
75 |
W |
Vout |
Regulated Output Voltage (@ Pout =0 ÷ Poutpk, Vin = 88÷264 VAC) |
18V ± 2% |
V |
Vout |
Output Voltage Ripple (@Pout = Poutx, Vin =88÷264 VAC) |
2 |
% |
Fosc |
Normal Operation Switching Frequency |
70 |
kHz |
FSB |
Light Load Switching Frequency |
18 |
kHz |
η |
Target Efficiency (@Pout = Poutx, Vin =88÷264 VAC) |
80 |
% |
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Maximum Input Power (@Pout = 0.5 W, Vin =88÷264 VAC) |
≤ 2 |
W |
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Maximum Input Power (Open load, Vin =88÷264 VAC) |
≤ 1 |
W |
Notes:
(*) If Pout is such that Poutx < Pout ≤ Poutpk the converter shall be shutdown (latch mode) within 1÷2 s; a load exceeding Poutpk shall cause converter’s shutdown (latch mode) within 10÷100 ms.
The special requirement for this converter is the ability to cope with a peak power demand from the load that exceeds the maximum continuous power by over 66% for a limited time (≤ 0.5 s), still maintaining output voltage regulation, and to automatically shut down in case this overload lasts more than a specified time. Furthermore,
March 2003 |
1/7 |
AN1686 APPLICATION NOTE
in case of anomalous power demand from the load (exceeding the peak power, e.g. due to a short circuit), converter's shutdown must occur within 10 ÷100 ms.
A power peak lasting 0.5 s is too long to be handled with just a reinforced output capacitor bank: as a matter of fact, after few ms the converter's control loop has already reacted to maintain the output voltage regulated. Thus a power demand lasting 0.5 s can be considered as a steady-state operating condition from the electrical point of view. On the other hand the thermal time constants of the power components are such that the heat generated during a power peak of even a couple of seconds will not cause an excessive temperature rise: their thermal impedance is to be invoked rather than their thermal resistance.
From these considerations, it turns out that the converter can be thermally designed just considering the maxi-
mum continuous output power Poutx (and the related RMS currents) that it has to deliver and not the peak power demand Poutpk. There are, however some points that one should consider for the electrical design:
1)the overcurrent limiting circuit must allow Poutpk to pass, hence its setpoint needs to be greater than the corresponding peak primary current Ippklim and, possibly, much greater than the peak primary current related to Poutx;
2)the transformer and/or inductor must not saturate with this higher peak current;
3)there is a tradeoff between the input bulk capacitor size (which determines the minimum input DC voltage) and the value of Ippklim: a low capacitance leads to a high input voltage ripple, then to a lower minimum input DC voltage and to a higher Ippklim. Also the maximum duty cycle of the converter must account for the resulting minimum DC input voltage.
4)As envisaged by the spec in table 1, designing the converter for a given power but allowing a much higher level calls for a means to make the system work safely during abnormal operating conditions.
Except for the special requirement discussed so far, the specification is identical to that of the converter considered in [1], which will be then used as the starting point for the present design. In this context, only the modifications needed for fully complying with the spec of table 1 will be discussed. For reader's convenience figure 1 reproduces the electrical schematic of the original converter.
Additional circuitry will be needed for discriminating a peak power demand from a normal load condition and detecting a short circuit as well as realizing the required double time-out.
Figure 1. 45W, wide-range mains AC-DC adapter: electrical schematic (original design)
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NTC1 |
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R22 |
C17 |
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F1 T2A250V |
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J1 |
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D5 |
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BD1 |
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Vout |
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T1 |
BYW29-200 |
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88 to 264 |
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DF04M |
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Vac |
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C10 |
C11 |
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J2 |
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C1 |
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R1 |
R3 |
D1 |
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C9 |
C15 |
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100 µF |
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330 µF |
330 µF |
330 µF |
100 nF |
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56 kΩ |
2.2 MΩ |
BZW06-154 |
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400 V |
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25 V |
25 V |
25 V |
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N1 |
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N2 |
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R2 |
R4 |
D2 |
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STTA106 |
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56 kΩ |
2.2 MΩ |
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C3 100 nF |
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C12 |
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GND |
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D3 |
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4.7 nF |
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R6 |
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1N4148 |
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1kV |
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R5 47 kΩ |
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330 kΩ |
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R7 4.7 Ω |
D4 1N4148 |
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R8 5.6 kΩ |
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C2 |
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47 µF |
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N3 |
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R10 |
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25 V |
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R9 6.8 kΩ |
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22Ω |
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VREF |
DCC |
DIS |
VCC |
VC |
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R11 |
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OUT |
10 Ω |
Q1 |
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ST-BY |
4 |
3 |
14 |
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8 |
9 |
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STP7NB60 |
R17 |
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16 |
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4.3 kΩ |
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R18 |
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R14 |
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IC1 |
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ISEN |
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2.2 kΩ |
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R12 |
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1 kΩ |
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L5991 |
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24 kΩ |
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13 |
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R13 |
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RCT |
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IC2 |
1 |
R19 |
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8.2 kΩ |
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R15 |
PC917 |
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C8 |
0.47 Ω |
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1.2 kΩ |
C14 |
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15 |
12 |
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100 pF |
1/2 W |
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2 |
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470 nF |
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C4 |
DC-LIM |
SGND |
VFB |
SS |
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COMP |
PGND |
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100 nF |
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R16 100 Ω |
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C6 |
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C13 |
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R20 |
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C5 |
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56 nF |
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5.6 kΩ |
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3.3 nF |
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C7 |
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220 pF |
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3 |
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R21 |
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348Ω |
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2/7 |
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AN1686 APPLICATION NOTE
Adaptations and modifications of the original design
With reference to the schematic of figure 1, here follows a step-by-step discussion on the modifications needed for fulfilling the spec of table 1.
Input Capacitor. Looking at the evaluation results presented in [1], it is reasonable to assume that with 75 W load the input power will be around 90 W. Estimating about 5 W power loss before the transformer, the power managed by the transformer will be 85 W. With the worst-case spread (-20 %) of C1, that is with C1=80 µF, the valley voltage across C1 is expected to be around 54 V. Under these conditions the maximum peak primary current will be around 3.24A, exceeding the saturation current of the transformer (2.84A).
Moreover, the maximum duty cycle (@ Vin = 54V) will be around 59%: since the system is working in CCM, slope compensation will be needed to avoid unconditional instability of the current loop and the resulting subharmonic oscillations.
To avoid remaking the transformer and adding the slope compensation circuit, an attempt can be done using a larger C1. Assuming there is no change in power levels, with 150 µF capacitance (120 µF, worst case), the valley voltage across C1 will be 78 V, the maximum peak primary current 2.88 A and the maximum duty cycle 50%. Although necessary, this step is not enough to guarantee that the transformer will not saturate and then the system is still very close to the instability limit. The transformer needs then to be modified anyway (see the following points).
Sense resistor. The sense resistor R15 needs reducing, to allow a peak primary current of 2.88 A. The maximum value should be 0.92 V / 2.88 A = 0.319Ω. This will be achieved by paralleling a 1Ω resistor (1%, metallic film) to the existing 0.47Ω. The worst-case peak current, will be 1.08 V / 0.319Ω = 3.39 A.
Transformer. The changes to the transformer aim at meeting two specific requirements: 1) not to saturate with 3.39A primary current; 2) to reduce the maximum duty cycle below 50%, to avoid the use of a slope compensation circuit. Design constraint is the core size, which must be unchanged. The increase of total losses should be as low as possible.
Starting from point 2), to maintain the same maximum duty cycle as in the original design, the turn ratio should be reduced proportionally to the reduction of the valley voltage across C1. Formerly, with 45 W load, the worstcase valley voltage was 83 V and now is 78 V, then the new turn ratio is (50/12)·(78/83) = 3.916.
Table 2. Modified transformer specification
Core |
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Philips EFD30x15x9, 3C85 Material or equivalent |
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Bobbin |
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Horizontal mounting, 12 pins |
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Air gap |
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≈1.4 mm for an inductance 2-6 of 360 µH |
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Leakage inductance |
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< 10 µH |
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Windings |
Winding |
Wire |
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S-F |
Turns |
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Notes |
Spec & Build |
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Pri1 |
AWG27 |
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2-4 |
30 |
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Sec (a) |
AWG25 |
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11-7 |
16 |
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Bifilar with Sec (b) |
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Sec (b) |
AWG25 |
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12-8 |
16 |
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Bifilar with Sec (a) |
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Pri2 |
AWG27 |
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4-6 |
30 |
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Aux |
AWG32 |
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3-1 |
14 |
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Evenly spaced |
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Note: sec (a) and sec (b) are paralleled on the PCB |
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To make sure that the core will not saturate with 3.39A, keeping the same inductance value, the number of turns of the primary winding should be raised from 50 to 66 and the air gap from 0.7 to 1.5 mm. To reduce the copper, it is acceptable to reduce the primary inductance by 10%: in this way the primary winding turn number will be 60 and the air gap 1.4 mm.
The secondary turn number will be 60/3.916=15.321, rounded off to 16. Keeping the same wire diameters, the primary resistance will be increased by a factor 60/50, that is 20%, and the secondary resistance by 33% and so will be the respective conduction losses (the RMS currents change very little). However, the flux swing is
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