ST AN1657 Application note

AN1657

APPLICATION NOTE

SMPS FOR CRT MONITORS WITH THE L6565

by Claudio Adragna

This note shows and discusses a coupl e of designs of a 90W wide-range-mai ns SMPS for CRT monitor based on the QR controller L6565. The first design r efers to a l ow-cost SMPS that meets cu rrent Ener-

gyStar first one so as to be compliant with IEA's "1W initiative". Both have been realized and tested on the bench. The result of their evaluation is presented along with some significant waveforms.

Design Specification

The typical electrical specification of an SMPS of a 17" CRT monitor for PC is summarized in table 1. Two goals concerning the off-mode consum ption of the SMPS have be en set: the first one is to meet the present EnergyStar more ambitious goal is to comply with IEA's "1W initiative" as well as to be eligible for GEEA label. Both voluntary standards require to achieve a power consumption below 1W.

Table 1. 90W SMPS for CRT monitor: electrical specification

Input Voltage Range (Vin) 88 to 264 Vac Mains Frequency (f Maximum Output Power (Pout) 92 W

Outputs

Minimum Switching Frequency in Normal Mode (f Target Efficiency (Vin =88 to 264 Vac, full load) (η)> 85% Suspend-Mode Input Power (Vin = 88 to 264 Vac) <15 W

OFF-Mode Input Power (@Pout = 125 mW on 5V output, Vin = 88 to 264 Vac)

requirements on OFF-mode consumption (Pin<2W). The sec ond design is an ev olution o f the

requirements, which env isage less th an 2W absorbed from the mains; the second

) 50/60 Hz

Vout = 200V ± 3%

Horizontal Deflection

Video Amplifier

Vertical Deflection

Heater

Micro

, @ Vin = 100 VDC, full load) 25 kHz

MIN

Iout = 0.33A Full load ripple = 1% Vout = 80V ± 5% Iout = 0.13A Full load ripple = 1% Vout = ± 15V ± 10% Iout = 0.33 A Full load ripple = 1% Vout = 6.5V ± 10% Iout = 0.6A Full load ripple = 2% Vout = 5.0V ± 2% Iout = 0.05A Full load ripple < 1%

< 2W (EnergyStar < 1W (IEA, GEEA)



)

QR approach and the L6565

The SMPS will be realized with a Quasi-resonant (QR) flyback convert er based on t he L6565, a c ontrol IC specifically designed to handle such kind of converters. Referring to [1] and [2] for a detailed description of the device and the topology, it is here worthwhile reminding that QR operation implies that the trans-

February 2003

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AN1657 APPLICATION NOTE

former always works close to the boundary between continuous and discontinuous conduction mode and thereby at a switching frequency that depends on the input voltage and the output current. The ripple across the input bulk capacitor modulates the switching frequency in itself. This characteristic, besides being advantageous in terms of E MI em issions (it spreads the spectrum), makes it more di fficult t o see the noise on the screen. Furthermore, with QR o peration MOSFET's turn-on occurs with zero or minimum drain voltage, which minimizes the switching noise generated. Finally, since the converter always operates in discontinuous conduction mode the reverse recovery characteristics of the secondary rectifiers are not invoked, which goes in favor of a "quiet" operation too.

The above-mentioned characteristics, coupled with the high degree of safety under short circuit conditions inherent in its operation, make QR approach ideal for noise-sensitive applications as monitors are.

The L6565 is an excellent low-cost solution to implement reliable and energy-efficient QR flyback converters both under maximum and minimum loa d conditions. The internal functions of the IC (frequenc y foldback and burst-mode operation at light load) as well as its inherent low consumption (less than 70 µA startup current and less than 3.5 mA quiescent current) make designer's life easier when they face the challenging tasks of meeting energy-saving requirements.

Additionally, the L6565 offers a safety feature (device disable upon sec ondary rectifier short circuit) that can be fruitfully put to use in the present context to achieve an ultra-low consumption at light load. To protect the converter in the event o f such failure, an i nternal comparator se nses the vol tage on the current sense pin of the IC and disables the gate driver if this voltage exceeds 2V. To re-enable the driver, the supply voltage of the IC must fall below the UVLO threshold and then exceed again the start-up threshold.

EnergyStar

compliant design

The first proposed schematic is shown in figure 1. Only its more significant features will be commented, please refer to [2] for the standard characteristics of an L6565-based QR flyback.

Figure 1. L6565-based, EnergyStar

88 to 264

VAC

EMI

filter

10 nF

F1 250VAC 5A

1N4148

R1A

Ω

68 k

R6A

Ω

1.5 M

R6B

1.5 M

Ω

15 k

6.2 k

68 k

R1B

BD01

STBR606

Ω

47 k

1N4148

IC1

L6565

4.7 µF

Ω

compliant, 90W SMPS for CRT monitor: electrical schematic

C8A,B 4.7 nF Y2

R13A,B 4.7 M

Ω

18 17

15 14

13 12

D8 UF4002

D9 UF4002

D10 UF4002

R17

Ω

2.7 k

22 nF

D6 UF4006

D7 STTH1L06

C14

470 µF

25V C15

470 µF

25V

C17

220 µF

100V

R18

10 k

R21

4.7 k

1000 µF

Ω

100 k

Ω

TR1

C12 16V

33 k

R15

Ω

C16

47 µF

25V

200V

R14

L1 1µH

C10

100 µF

250V

IC4

R20

330 k

L78L05CZ

R16

Ω

C18 15 nF 250V

R19

1.8 k

Ω

100 k

C11 22 µF 100V

123

Ω

0.33A

Ω

80V

0.13A

GND

6.3V

0.6A

+15V

0.33A

0.05A

C13

2.2

µF

10V

-15V

0.33A

Ω

STP6NK60ZFP

Ω

IC2

PC817A

C2 47 nF 250V

1 k

4 7

Ω

312

IC3

TL431

C1 220 400V

Ω

µF

47 µF

25V

DZ1 18V

0.5W

R10

1 k

100 pF

4.7 k

1N4148

R12

47 k

Ω

STTH1L06

D3 1N4148

C4 330 pF

100V

Ω

R11A,B

0.56

Ω

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AN1657 APPLICATION NOTE

The converter is started up by R1A, R1B and the diode D1 that draw some current from the AC side of the bridge rectifier. This inexpensive circuit wakes up the system in less then 3s @ 88 VAC and contributes to light load losses with 240 mW @ 264 VAC. Despite this dummy consumption it is anyway possible to meet the target of less than 2W input consumption thanks to the favorable features of the L6565. Supplying the IC from the AC side of the bridge helps reduce the power consumption on the start-up resistors and eliminates any chance of spurious restarts at converter's power down.

R6A and B along with R7 correct the overcurren t setpoint so as to minimize the power capab ility change of the converter over the entire input voltage range. C7 filters out any noise that might be coupled to the pin.

R8 and C6 provide soft-start. At start-up C6 is charged by the output of the L6565 E/A (pin 2) with a current defined by 2.5 / R8 and the E/A works temporarily closed-loop. As the E/A saturates high there is no more current through C6, the loop opens, the v oltage on pin 1 (E/A input) goe s to zero and pi n 2 s tay s high at about 6V. When the L6565 turns off (because its supply voltage Vcc goes below the UVLO threshold) the capacitor is discharged internally in few milliseconds - because the impedance of the pins becomes low in this way ensuring a correct soft-start even when the L6565 is continuously restarted (e.g. in case of overload or short circuit).

Output voltage regulation is done with a TL431+optocoupler arrangement on the secondary side and the information is fed back to the c urrent se nse pin (# 4) of the L6565. Regulation is thus performed by modulating the voltage offset generated by the phototransistor current on R10. C5 adds a small filtering effect to increase noise immunity. This feedback arrangement helps reduce the load of the self-supply system (winding 7-8, D3, R3, C3). In fact with the usual arrangement, where the phototransistor sinks current from pin 2 (with pin 1 grounded), the reg ulation current, t ypically 3 m A at light load, adds up t o the o perating current of the IC. With this circuit, to create about 1V offset, which is required at light load, the phototransistor needs to draw only 1 mA. This load reduction will counteract the natural decay of the self-supply voltage when the converter is lightly loaded. Please note that with this technique the ZCD masking time of the L6565 (refer to [2] for details) is fixed at 3.5 µs.

The circ uit made up of R4, C4, D 4 and DZ1 provides o vervolta ge protec tion in ca se of fail ure of the feedback loop. R4 and C4 smooth the waveform generated by the self-supply winding to suppress the leading edge spike that could m isle ad the c irc uit. D urin g MOSF ET's off-tim e the w indin g gen era tes a vol tage proport ion al to the output voltage . Thus, if the feedback loop opens (e.g. th e optocouple r f ai l s) , which causes the output voltage to rise above the regulated value, the voltage provided by R4, C4 will increase as well. DZ1 will be turned on and injec t an addit ion al offs et on the cu rrent sense pin afte r MOS FET's turn of f. As the v oltage on the pin reaches 2V an internal comparator will be triggered, the L6565 will shut down and the converter will be stopped until L6565's Vcc voltage, after falling below the UVLO threshold, goes again above the start-up threshold. This may take some hundreds milliseconds, then the system will work in a continuous restart mode, the energy throughput will be very low and the output voltage will not reach dangerous values.

Table 2. L6565-based 90W SMPS for CRT monitor: transformer specification

Core Philips ETD44, 3C85 Material Bobbin Horizontal mounting, 18 pins Air gap

Leakage inductance < 10 µH

Winding Wire S-F Turns Notes

Pri1 4xAWG29 2-4 19 Pin 4 is cut for safety

Sec1 (200V) AWG25 17-18 48

Windings

Spec & Build

Sec2 (80V) AWG25 15-16 32

Sec3 (6.5V) AWG25 13-14 3 Evenly spaced

Sec4 (+15V) AWG25 11-12 6 Bifilar with Sec5

Sec5 (-15V) AWG26 10-11 6 Bifilar with Sec4

Pri2 4xAWG29 1-2 19

Aux (+15V) AWG29 8-7 7 Evenly spaced

1 mm for an inductance 1-4 of 380 µH

≈

The linear regulator that supplies the 5V line for the µP takes its input from the +15V line. Using the 6.5V line would improve efficiency (espec ially in OFF-mode) even furthe r. To do so, however, an LDO (low

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