ST AN1602 Application note
AN1602
APPLICATION NOTE
16-BIT TI MIN G OP ER ATIONS US ING ST 72 62 O R S T 7263 B
MCUs
Microcontroller Division Applications
INTRODUCTION
This Application Note describes how to us e the ST7262 or ST 7263B for 1 6-bit timin g operations. The intention of this document is to show how to perform pulse measurement and PWM
generation using the different timers available on each microcontroller type.
1 16-BIT TIMING MEASUREMEN TS
1.1 USING ST7262
The aim of this section is to describe how to use the ST7262 8-bit timer to perform pulse and
frequency measurements with 16-bit accuracy.
1.1.1 16-Bit Capture
1.1.1.1 Principle
The ST7262 architecture allows you to cascade the 8-bit Auto Reload Timer (ART) with the 8bit Time Base Unit (TBU) to obtain a 16-bit counter (The carry bit of the ART acts as the clock
for the TBU). Using t his configuration, the ARTCAR register represents the Least S ignificant
Byte and the TBUCV register represents the Most Significant Byte (see Figure 1).
Figure 1. TBU+ART 16-Bit Counter Value
TBU (MSB)
16 Bit Counter Value
On each valid input capture, the 16-bit counter value is obtained by:
– The ARTCAR register which is automatically latched.
– The TBUCV register which is saved by software in the Input Capture Interrupt routine.
This method ensures a “real-time” capture of the low bits, while the software delay needed to
save the TBUCV can be compensated.
ART (LSB)
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16-BIT TIMING OPERAT IONS USING ST7262 OR ST7263B MCUs
1.1.1.2 Delay Compensation method
The software delay introduced by the interrupt routine should be taken into account otherwise
the measurement value can be corrupted. This happens if the ART counter rolls over from FFh
to 00h while soft ware is s toring the TB UCV v alue afte r a v alid input cap ture interrup t. In this
case, the TB UCV is in cremen ted and a wr ong value oc curs in the 8th bit of th e 16-b it input
capture value.
The delay compensation method is described in the following flowchart (Figure 2).
The first step consists of transferring both TBU and ART values into temporary variables
(TmpTBU1, TmpAR T, Tmp TBU 2) to be used later on. Then in t he s econd s tep we com pare
TmpART and ICxR. There are two cases to be considered:
– TmpART >= ICRx: This means that the ART counter value was incremented by a few cycles
but has not yet reached the maximum value (FFh). In this case we use TmpT BU1.
– TmpART < ICRx:This means that the ART counter was incremented beyond the maximum
value and has been reset. This means we should decrement TmpTBU2 once to get the right
value of TBUCV.
Figure 2. TBU Delay Compensation flowchar t
Interrupt From ICAP1 or ICAP2
Read & Store the TBUCV in TmpTBU1
Read & Store the ARTCAR inTmpART
Read & Store the TBUCV in TmpTBU2
Yes
TmpART >= ICxR
TBUok= TmpTBU1 TBUok= TmpT BU2 - 1
No
1.1.1.3 Example of an interrupt capture routine
The input capture inte rrupt rou tine given below ca n be us ed to get t he prec ise va lue of t he
input capture interrupt instant on ICAP1 pin. It can be used to detect a ri sing or falling edge depending on the configured edge in ARTICSR.
.Inp_Cap_Routine
;----------------------------------------;
Ld A , TBUCV ;Load the TBU counter value
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Ld TmpTBU1 , A ;into TmpTBU1
Ld A , ARTCAR ; Load the ART counter Value
Ld TmpART1 , A ;into TmpART1
Ld A , TBUCV ; Load the TBU counter value into
Ld TmpTBU2 , A ;TmpTBU2
;----------------------------------------;
Ld A , TmpART1 ; Compare ART & ICR
Cp A , ARTICR2 ; If ART > ICR then Case 2
jrpl Case2 ;
Ld A , TmpTBU2 ; Case 1 : TBU = TBU2 - 1
Dec A ;
jra Next2 ;
.Case2 Ld A , TmpTBU1 ; Case TBU = TBU1
.Next2 Ld PulseEndHR , A ;load TBUCV into PulseEndHR
Ld A , ARTICR2 ;Load The ART Inp Capt 2 register
Ld PulseEndLR , A ;Value into PulseEndLR
Ld A , ARTICCSR ;Clear The input capture interrupt
Iret ;Exit From Interrupt
1.1.2 Pulse Length measurement
1.1.2.1 Measurement Principles
As first example in this application note, we will try to measure the pulse length of an external
signal applied to the input capture pins.
Figure 3. Pulse Length Measurement
Pulse Length
To perform this operation, two input captures are used together and they are configured as fol lows:
– Input capture1 pin (ARTIC1) configured to detect rising edges
– The input capture2 pin (ARTIC2) configured to detect falling edges
The ARTIC1 & ARTIC2 are connected together (Figure 4).
Two 16-b its vari ables ar e used t o hold th e 16-bi ts time r values on ea ch vali d input capture
edge (PulseStart for the rising edge and PulseEnd for the edge).The pulse length value can be
deduced later using a 16-bits substruction between PulseStart and PulseEnd
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Figure 4. Input Capture Configuration
ST7262
ARTIC1
External Signal
ARTIC2
Figure 5 shows the steps that have to be followed to successfully measure the length of a
pulse in 16-bit accuracy.
Figure 5. Input Capture Sequence
- Configure Time clock frequency
- Select edge sensitivity on ICAP pins
- Cascade PWMART & TBU
No
Input capture interrupt
ICAP1
- Store the TBU counter Value
(Compensated value) in PulseStartHR
- Store the ICRx Value in PulseStartLR
ICAP1 Or ICAP2
- Store the TBU counter Value
(Compensated value) in PulseEndHR
- Store the ICRx Value in PulseEndLR
YES
ICAP2
1.1.2.2 Example of input capture interrupt rout ine
.Inp_Cap_Routine ;
Btjt ARTICCSR,#0,Flag1 ; Test If is ICAP(1 Or 2)
.Flag2 Ld A , ARTICR2 ; Latch the Input Cap Reg into
Ld IcapReg2 , A; IcapReg2
Ld A , ARTICCSR ; Clear Interrupt
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Ld A , TBUCV ; Load the TBU counter value
Ld TmpTBU1 , A; into TmpTBU1
Ld A , ARTCAR ; Load the ART counter Value
Ld TmpART1 , A ; into TmpART1
Ld A , TBUCV ; Load the TBU counter value into
Ld TmpTBU2 , A; TmpTBU2
Ld A , TmpART1 ; Compare ART & ICR
Cp A , IcapReg2 ; If ART > ICR then Case 2
jrpl Case2 ;
Ld A ,TmpTBU2; Case 1 : TBU = TBU2 - 1
Dec A ;
jra Next2 ;
.Case2 Ld A , TmpTBU1 ; Case TBU = TBU1
.Next2 Ld PulseEndHR , A; load TBUCV into PulseEndHR
Ld A , IcapReg2 ; Load The ART Inp Capt 2 register
Ld PulseEndLR , A; Value into PulseEndLR
Iret ; Exit from Interrupt
.Flag1 Ld A , ARTICR1 ; Latch the Input Cap Reg into
Ld IcapReg1 , A; IcapReg1
Ld A , ARTICCSR ; Clear Interrupt
Ld A , TBUCV ; Load the TBU counter value
Ld TmpTBU1 , A; into TmpTBU1
Ld A , ARTCAR ; Load the ART counter Value
Ld TmpART1 , A ; into TmpART1
Ld A , TBUCV ; Load the TBU counter value into
Ld TmpTBU2 , A; TmpTBU2
Ld A , TmpART1 ; Compare ART & ICR
Cp A , IcapReg1 ;
jrpl Case1 ;
Ld A , TmpTBU2; Case : TBU = TBU2 - 1
Dec A ;
jra Next1 ;
.Case1 Ld A , TmpTBU1 ; Case TBU = TBU1
.Next1 Ld PulseStartHR , A; load TBUCV into PulseEndHR
Ld A , IcapReg1 ; Load The ART Inp Capt 2 register
Ld PulseStartLR , A; Value into PulseEndLR
Iret ; Exit from Interrupt
1.1.3 Frequency Measurement
1.1.3.1 Measurement Principles
Frequency measurement is a little bit different from pulse length measurement. To get the frequency, we measure the full signal period which can be defined by the time interval between
two consecutive rising edges (Figure 6)
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Figure 6. Frequency Measurement
Frequency= 1 / Period
In this example w e will al so use two 16 -bit variables to h old the 1 6-bit timer v alue eac h tim e
an input c aptur e oc c urs ( Sta r tPer iod: for the f irst ri sing e dge and E nd Peri od f or the s e cond
falling edge). In addition to thes e two variables, we will nee d an extra variable (FirstEdge)
which is used to indicate the first rising edge or the second edge.
– FisrtEdge =0: First Rising edge (PeriodStart)
– FisrtEdge =1: Second Rising edge (PeriodEnd)
In this case we will need only one input capture pin (ARTIC1) c onfigured to detect only rising
edge.
The capture steps are shown in Figure 7. After selecting the timer frequency and the input
capture edge we wait for an input capture interrupt. Depending on the FirstEdge value the
input capture parameters (ICxR and the TBU) are transferred into PeriodStart or PeriodEnd.
Figure 7. Input Capture Sequence
- Configure Time clock frequency
- Select sensitive edge on ICAP pins
- Cascade PWMART & TBU, FirstEdge = 0
No
0
- Store the TBU (compensated value)
in PeriodStartHR
- Store the ICxR in PeriodStartLR
input capture
First Edge =?
- Store the TBU (compensated value)
in PeriodEndHR
- Store the ICxR Value in PeriodEndLR
YES
1
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1.1.3.2 Example of input capture interrupt rout ine
.Inp_Cap_Routine ;
Ld A , ARTICR1 ;
Ld CurrentICAP , A ;
;------------------------------------------;
Ld A, ARTICCSR ;
;------------------------------------------;
Ld A , TBUCV ;Load the TBU counter value
Ld TmpTBU1 , A ;into TmpTBU1
Ld A , ARTCAR ;Load the ART counter Value
Ld TmpART1 , A ;into TmpART1
Ld A , TBUCV ;Load the TBU counter value into
Ld TmpTBU2 , A ;
;------------------------------------------;
Btjf FirstEdge,#0,FirstRisingEdge ;TmpTBU2
;------------------------------------------;
;.SecondRisingEdge ;
Ld A , TmpART1 ;Compare ART & ICR
Cp A , CurrentICAP ;If ART > ICR then Case 2
jrpl Case2 ;
Ld A , TmpTBU2 ;Case 1 : TBU = TBU2 - 1
Dec A ;
jra Next2 ;
.Case2 Ld A , TmpTBU1 ;Case TBU = TBU1
.Next2 Ld PeriodEndHR , A ;load TBUCV into PeriodEndHR
Ld A , CurrentICAP ;Load The ART Inp Capt 1 register
Ld PeriodEndLR , A ;Value into PeriodEndLR
Clr FirstEdge ;
Iret ;
.FirstRisingEdge ;
Ld A , TmpART1 ;Compare ART & ICR
Cp A , CurrentICAP ;
jrpl Case1 ;
Ld A , TmpTBU2 ;Case : TBU = TBU2 - 1
Dec A ;
jra Next1 ;
.Case1 Ld A , TmpTBU1 ; Case TBU = TBU1
.Next1 Ld PeriodStartHR , A ;load TBUCV into PulseEndHR
Ld A , CurrentICAP ;Load The ART Inp Capt 1 register
Ld PeriodStartLR , A ;Value into PulseEndLR
Inc FirstEdge ;
Iret ;
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