ST AN1544 Application note

AN1544
APPLICATION NOTE
Designing an Application with ST10F269
This note brings advices in designing applications based on ST10F269. It includes six mains items which are:
- Information and recommenda tions in the use of external resonator with the on-chip os cillat or,
- Details on start-up configu ration and necessary precautions,
- Recommendations to reduce ADC conversion errors,
- Memory interface,
- Interfacing with the L4969 CAN interface.
June 2002
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TABLE OF CONTENTS PAGE
1 - OSCILLATOR............................................................................................................. 3
1.1 - OSCILLATOR CHARACTERISTICS .......................................................................... 3
1.2 - RECOMMANDED CRYSTALS / CERAMIC RESONATORS ..................................... 4
1.2.1 - Murata Resonators...................................................................................................... 4
1.2.2 - AVX Ceramic Resonators............................................................................................ 4
1.2.3 - NDK Crystals............................................................................................................... 4
1.3 - START-UP TIME ........................................................................................................ 5
1.3.1 - Start-up Time Results.................................................................................................. 5
1.4 - PCB LAYOUT FOR ST10F269 OS CILLA TO R . .......................................................... 5
1.5 - OSCILLATOR AND EMC ........................................................................................... 5
2 - PORT0 START-UP CONFIGURATION...................................................................... 6
2.1 - PORT0 ........................................................................................................................ 6
2.2 - PORT0 START-UP CONFIGURATION ................................................................... 7
3 - FILTERING / DECOUPLING....................................................................................... 8
3.1 - DECOUPLING ON DC1 AND DC2 PINS ................................................................... 8
3.2 - DECOUPLING ON +5V SUPPLY ............................................................................... 8
3.3 - FILTERING / EMC ...................................................................................................... 9
3.4 - UNUSED PINS ........................................................................................................... 9
4 - SPECIAL PINS............................................................................................................ 10
4.1 - EA EXTERNAL ACCESS ENABLE PIN .......................... ..................... ...................... 10
4.2 - RPD PIN ..................................................................................................................... 10
5 - RESET......... ...................... ..................... ............................ ...................... ................... 10
6 - ADC............................................ ............................ ...................... ..................... .......... 11
6.1 - VOLTAGE DROP IN THE SOURCE RESISTANCE .................................................. 11
6.2 - POOR CHARGING OF THE ADC INTERNAL RESISTANCE ................................... 11
6.3 - ERRORS DUE TO HIGH FREQUENCIES FROM INPUT SIGNAL ........................... 12
6.4 - REDUCING ADC ERRORS ....................................................................................... 12
6.5 - VAREF POWER-UP / DOWN SEQUENCE ............................................................... 12
7 - EXTERNAL MEMORY INTERFACE .......................................................................... 12
8 - CONNECTING TO L4969 ........................................................................................... 13
9 - REVISION HISTORY .................................................................................................. 13
9.1 - CREATION OF TH E AN1544 ON TH E 24TH OF MAY 2002 ..................................... 13
9.2 - REVISION OF THE AN 1544 ON THE 24T H OF JUN E 2002 .................................... 13
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AN1544 - APPLICAT ION NOTE
1 - OSCILLATOR
The ST10F269 can run with an external clock connected to XTAL1 input pin of the oscillator inverter or with a clock signal generated by a resonator connected to XTAL1 / XTAL2 pins. Refer to the ST10F269 datashe et for the pos sible comb ination s. This chap ter provi des wit h detaille d informa tion on the use of the on-chip oscillator in conjunction with an external resonator.
1.1 - Oscillator Characteristics
Using an external resonator (crystal or ceramic resonator) although simple to implement needs few basic precautions. Referring to the schematic of the on-chip oscillator (Figure 1), the key items are described in the following section.
Figure 1
ST10 Oscillator Equivalent Schematic
On-chip Oscillator circuit
gm
XTAL1 XTAL2
C1 C2
Resonator
Equivalent circuit
CL
Ls
Cs
Resonator
RL
Rs
The resonator component can be a crystal or a ceramic resonator. It is represented as a series resonant branch Rs, Ls, Cs. The amplification a bility of the o scillator inverter is repl aced by a negative resistance RL and the capacicatance CL contains the C1, C2 load capacitances and the stray capacitance of the resonator .
The load capacitors C1 and C2 transform the gain of the a mplifier (gm) into a negat ive series resist ance RL to compensate for the losses of the crystal.
The best frequency stability is obtained when C1 = C2. The oscillation occurs when the sum of RL and Rs (the series resistance of the crystal) is negative.
By choosing C1 = C2 = C, the minimal gain of the amplifier (gm) is exressed as following:
gm
min
Rs C
×ω
× Rs C
2
×==
2
2
π× f×()
2
The minimal gain of the amplifier also implicitly sets the on-chip oscillator start -up time.
The minimum transconductance (gm) of the ST10F269 oscillator inverter is
5 mA/V
so the minimun
series resistance value can be easily choosen in the crystal provider catalog. The oscillation s tability mainly depends on exter nal parameters so o nly the transconduct ance (gm) can
be guaranteed and the start-u p time value will be defined by measurement at the application level.
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1.2 - Recommanded Crystals / Ceramic Resonators
The Figure 2 shows the components to add to ST10F269 oscillator. The value of those components (C1, C2, RF) are given in the tables of recommanded crystals and ceramic resonators.
Figure 2
Additional Components to Use with External Resonator
V
DD
ST10F269
XTAL1 XTAL2
RF
GND
C1 C2
1.2 .1 - M u r ata Res o n ato rs
These are the recommanded ceramic resonato rs from Murata :
Frequency [Hz] Type Part Number C1 [pF] C2 [pF] RF [Ω]
4.0 M SMD CSTCR4M00G15A( )-R0 (39) (39) Open
4.0 M SMD CSTCC4M00G16A( )-R0 (47) (47) Open
8.0 M SMD CSTCE8M00G15A( )-R0 (33) (33) Open
8.0 M SMD CSTCC8M00G16A( )-R0 (47) (47) Open 10 M SMD CSTCE10M0G15A( )-R0 (33) (33) Open 10 M SMD CSTCC10M0G16A( )-R0 (47) (47) Open 12 M SMD CSTCE12M0G15A( )-R0 (33) (33) Open 16 M SMD CSTCV16M0X11Q( )-R0 (5) (5) Open 22 M SMD CSTCV22M0X11Q( )-R0 (5) (5) Open 24 M SMD CSTCV24M0X11Q( )-R0 (5) (5) Open 40 M SMD CSTCV40M0X11Q( )-R0 (5) (5) Open
For each of the ceramic resonators, Murata analysed : – Oscillating frequency versus temperature, – Oscillator start-up time , oscillating frequency, oscillating vo ltage, versu s ST10F 269 external s upply volt age, – Correlation between Murata standard test conditions (using 74HCU04) and ST10F2 69. The repor ts are available on request to Murata.
1.2.2 - AVX Ceramic Resonators
The analysis is pending with AVX. This document will be updated as soon results are available.
1.2.3 - NDK Crystals
The analysis is pending with NDK. Thi s document will be updat ed as soon resul ts are available.
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AN1544 - APPLICAT ION NOTE
1.3 - Start-up Time
Ceramic resonators have a much shorter star t-up time than c rys tals (about 100 times faster) but have a lower accuracy on the frequency (initial tolerance, temperature variations, drift).
Depending on applications requirements and possiblities, users can choose between short oscillator start-up time and frequency accuracy.
From S T10 perspective, the worst cas e for the os cillat or s ta rt-up time is high temperature and low voltage.
1.3.1 - Start-up Time Results
The measurements done by Murata on ST10F269 and ceramic resonators show start-up times in the
0.05ms range.
1.4 - PCB Layout for ST10F269 Oscillator
The following figure shows the proposed layout for ST10F269 oscillator.
Figure 3
Example of Layout fot External Crystal
ST10F269
Vias to V
Vias to GND
Crystal package
soldered to GND
DD
XTAL2
Decoupling capacitor
V
DD
C2
Crystal
Ground plate
CD
V
XTAL1
SS
C1
Vias to GND
1.5 - Oscillator and EMC
ST10F269/ST10F280 oscillator has an integrated gain control to minimize EMC and power consumption. This does not prevent users to check the following rules :
– Avoid other high freq uenc y signals near the oscillator circuitry. These can influence the oscillator. – Layout the ground supply on the basis of low impedanc e. – Shield the crystal with an additional ground plane underneat h the crystal. – Do not layout sensitive signals near the oscillator. Analyze cross-talk betwee n different layers. – V
pin close to XTAL pins must be connected to the ground plane and decoupled to the closest V
SS
DD
pin.
– Capacitors shall be placed at both ends of the crystal, directly connected to the ground plane while keep-
ing the overall loop as small as possible.
– Crystal package, when metalic, shall be directly connected to the ground.
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