AN1537
APPLICATION NOTE
A SIMPLE TRICK ENHANCES
L5991’s STANDBY FUNCTION
by C. Adragna and G. Gattavari
This application notes describes a simple technique that allows improving the Standby function of the advanced PWM controller L5991. The price to pay for that is the addition of just two resistors and two diodes, but the benefit brought in terms of no-load consumption in mains-operated converters is worth this small fee. The effectiveness of the improved Standby function will be proved and assessed on a couple of existing designs.
Introduction
L5991's Standby function is a valuable help in reducing light-load input consumption of offline converters and making them compliant with energy saving standards such as EnergyStar, Energy2000 and others. This function, optimized for flyback topology, is the ability of automatically - and abruptly - reducing the oscillator frequency (i.e. converter's switching frequency) as the converter's load falls below a defined threshold and restoring the normal oscillator frequency as the load increases and exceeds a second threshold.
The frequency shift allows minimizing power losses related to switching frequency, which represent most of losses at light or no load, without giving up the advantages of a higher switching frequency at full load.
Being the L5991 a current-mode controller [1], the output voltage (VCOMP) of its error amplifier (pin 6, COMP), except for an offset, is proportional to the peak primary current and then to the energy handled by the transformer cycle by cycle. It is then possible to deduce converter's load conditions by monitoring VCOMP.
Figure 1. L5991's Standby function operation: fsw vs. VCOMP locus (left) and VCOMP vs. Pin locus (right).
fsw |
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Pin |
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fosc |
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Normal operation |
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Normal operation |
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fosc |
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Undershoot |
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during transition |
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PNO |
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fSB |
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Standby |
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PSB |
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Standby |
fSB |
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Overshoot |
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during transition |
1 |
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VT1 |
3 |
VT2 4 |
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2 |
VT1 |
3 |
VT2 4 |
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VCOMP |
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VCOMP |
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If the peak primary current decreases as a result of a decrease of the power demanded by the load and VCOMP falls below a fixed threshold (VT1), the oscillator frequency will be set at a lower value (fSB). If now the peak
primary current increases and VCOMP exceeds a second threshold (VT2 > VT1) the oscillator frequency will be reset at the normal value (fosc). Since the frequency shift causes VCOMP to shift too but in the opposite direction for energy balance reasons, an appropriate hysteresis (VT2-VT1) is provided to prevent the oscillator frequency from switching back and forth between fSB and fosc. This operation is shown in fig. 1.
The L5991 allows programming both the normal and the standby frequency. VT1 and VT2 are internally fixed but
May 2003 |
1/18 |
AN1537 APPLICATION NOTE
it is possible to adjust the thresholds in terms of input power level (PNO, PSB) by adding a DC offset on its current sense input (pin 13, ISEN). Reference [2] provides plenty of details on this function and its usage.
There is a maximum abrupt frequency shift allowed, which is related to the amount of hysteresis: the theoretical
maximum ratio of fosc to fSB is 5.59, however this value does not account for the dynamic changes of VCOMP during the transients resulting from the frequency shift. As a matter of fact, depending on the closed-loop char-
acteristics of the voltage control loop and on the amplitude of the load change that causes the frequency shift, VCOMP may overshoot or undershoot before reaching its new steady-state value (see figure 1). If during a tran-
sient the other threshold is crossed, VCOMP may bounce from one threshold to the other and the switching frequency be unstable, going back and forth from one value to the other. As a result, the practical limit is less than
the theoretical value, probably less than 4 and, at any rate, the control loop dynamics needs to be kept relatively slow to limit the aptitude of VCOMP to underor overshooting.
In [2] it is explained also that the addition of a DC offset on the current sense pin increases the maximum fosc to fSB ratio allowed. However, this technique is suitable for allowing a higher fosc with a given fSB. The lower limit on fSB is determined by other considerations: if it is in the audible range (< 16kHz), the transformer will very likely generate audible noise, especially at power levels where the frequency is about to shift back to fosc, because of the high peak current involved.
Often, instead, for a given fosc an fSB as low as possible would be required to meet the latest design targets aimed at complying even with the most severe energy saving standards. In this case it would be desirable to have a very low frequency under no-load conditions, where the peak current is too small to be able to generate audible noise, and a frequency above the audible range at power levels where audible noise issues may arise. This is exactly the purpose of the modification to the oscillator proposed in the following section.
Standby function improvement
To realize the aforementioned function, the oscillator frequency needs to be dependent on converter's load conditions - the lower the load, the lower the frequency and vice versa - and only when this is useful, that is at light load. This can be done by adding few parts to the oscillator of the L5991, as shown in figure 2.
Assuming a perfect matching of the two diodes (with a common-cathode dual diode like the BAV70 this is closer to reality), when VCOMP falls below 3V (oscillator's peak voltage) some of the current that charges CT is diverted to ground through RC, D1 an R'. In this way the rate of rise of the voltage across CT is slowed down and the oscillator frequency decreased, the lower VCOMP the lower the frequency. Instead, when VCOMP is greater than 3V D1 isolates RC and the oscillator frequency will be either fosc or fSB, like in the standard L5991 oscillator circuit. RA, RB and CT can be then calculated as usual with the formulae given in [1]; as to the determination of RC and R' please refer to the appendix.
Figure 2. Oscillator modification to improve Standby function
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additional parts |
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6 |
COMP |
D2 |
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D1, D2 |
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S_BY |
D1 |
2 x 1N4148 |
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L5991 |
4 |
Vref |
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1 x BAV70 |
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RA |
RB RC |
R' |
2 RCT
CT
D2 compensates for the temperature shift of the forward voltage drop VF of D1. Considering that the current flowing through the diodes is in the hundred µA or less, D1 and D2 dissipate negligible power and only ambient temperature affects their VF. Assuming D1 and D2 match perfectly, neither oscillator frequency nor the point where RC comes into play will depend on ambient temperature. In real-world operation, considering also that D1 and D2 do not usually carry the same current, a minimum temperature effect can be observed.
2/18
AN1537 APPLICATION NOTE
The "frequency foldback" provided by the additional circuit starts in the neighborhood of VCOMP = 3V, that is a
little before that the high-to-low frequency shift takes place. After the shift, VCOMP will be higher and then the switching frequency will be close or exactly equal to fSB, depending on the fosc to fSB ratio.
In applications where the switching frequency needs not be tightly fixed for some specific reason there is no major drawback to this technique. The only point to take care of is that the oscillator frequency be in the audible range only when the peak current is so low that no sound may come from the transformer, even when it is made with normal construction techniques. This can be obtained simply by choosing fSB well above the audible range (e.g. fSB > 30kHz seems to be a good rule of thumb).
The benefits, on the contrary, are considerable:
1)Very low switching frequencies are possible which, as already stated, will allow treating the power throughput as much efficiently as possible: MOSFET's capacitive losses, gate drive consumption and other parasitic losses will be minimized. See [2] for more details on them.
2)Since the additional components will be concerned with taking the oscillator frequency to very low
values, the standby frequency fSB can be kept relatively high, thus reducing the abrupt frequency shift and eliminating the need for a slow feedback to prevent frequency instability. As already said, keeping fSB high has the positive side-effect of eliminating audible noise issues.
3)As a result of the faster dynamic response, start-up under no-load conditions is possible even with a minimum pre-load on the output. The dummy load represented by the feedback network, as well as bleeders, if used, can be minimized. The limit to the dummy load reduction is given by the collapse that the voltage delivered by the self-supply winding experiences with no load, which must not pull the supply voltage of the L5991 below the UVLO threshold.
To evaluate how much this function modification improves converter's performance at light or no load, the 45W wide-range mains AC-DC adapter illustrated in [3] and the 80W power-factor-corrected AC-DC adapter described in [4] will be optimized following the guidelines revealed by the above considerations. The "European Code of Conduct on Efficiency of External Power Supplies", ECC in short, whose limits are summarized in table 1, will be assumed as the reference.
Table 1. Limits envisaged by European Code of Conduct on Efficiency of External Power Supplies
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Max. no-load Power Consumption |
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Rated Input Power |
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Phase 1 |
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Phase 2 |
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Phase 3 |
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01.01.2001 |
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01.01.2003 |
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01.01.2005 |
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³ 0.3W and < 15W |
1.0W |
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0.75W |
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0.30W |
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³ 15W and < 50W |
1.0W |
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0.75W |
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0.50W |
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³ 50W and < 75W |
1.0W |
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0.75W |
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0.75W |
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Optimization of a 45W, wide-range mains AC-DC adapter
For reader's convenience, table 2 summarizes the electrical spec of the adapter under consideration. Please refer to [3] for a detailed description and full evaluation data.
Table 2. 45W, wide-range mains AC-DC adapter: electrical specification of the original design
Input Voltage Range (Vin) |
88 to 264 Vac |
Mains Frequency (fL) |
50/60Hz |
Maximum Output Power (Pout) |
45W |
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Vout = 18V ± 3% |
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Output |
Iout = 2.5A max. |
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Full load ripple £ 2% pk-pk |
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Normal Operation Switching Frequency (fosc) |
70kHz typ. |
Light Load Switching Frequency (fSB) |
18kHz typ. |
Full-load Efficiency (@ Pout =45W, Vin = 88¸264Vac) |
> 80% |
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Maximum no-load Input Power (Vin = 88¸264Vac) |
< 1W |
3/18
AN1537 APPLICATION NOTE
Since the full-load input power is greater than 50W, this adapter belongs to the third bracket envisaged by the ECC. Its no load consumption is 0.9W @264Vac and 0.7W @220Vac then it meets Phase 1 limit (1W) and is close to that of Phase 2 and 3 (0.75W) with almost no margin.
Although the ECC specifies that the compliance test be done at the nominal voltage 230 Vac, in the pre-com- pliance test it is quite usual to refer to the consumption at 264 Vac, to account for production spread. With this criterion the adapter cannot be considered compliant with Phase 2 or 3 limits.
The target of the optimization is then to make the adapter ECC-compliant in the above mentioned sense. Figure 3 shows the electrical schematic of the converter with the added and modified components highlighted. Only these changes will be discussed.
Figure 3. 45W AC-DC adapter: electrical schematic of the modified circuit
F1 T2A250V |
NTC1 N.A. |
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R22 |
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C17 |
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N.A. |
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BD1 |
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D5 |
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18V/2.5A |
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T1 |
BYW29-200 |
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88 to 264 |
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DF04M |
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Vac |
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C10 |
C11 |
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C1 |
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R1 |
R3 |
D1 |
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C9 |
C15 |
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100 µF |
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56 kΩ |
2.2 MΩ |
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330 µF |
330 µF |
330 µF |
220 nF |
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400 V |
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BZW06-154 |
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25 V |
25 V |
25 V |
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N1 |
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N2 |
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R2 |
R4 |
D2 |
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STTA106 |
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56 kΩ |
2.2 MΩ |
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C3 100 nF |
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C12 |
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GND |
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D3 |
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R6 |
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4.7 nF |
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1N4148 |
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2kV |
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R5 47 kΩ |
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330 kΩ |
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R7 1 Ω |
D4 1N4148 |
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R8 22 kΩ |
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C2 |
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47 µF |
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N3 |
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R10 |
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25 V |
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R9 27 kΩ |
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22Ω |
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R23 |
N.A. |
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VREF |
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DCC |
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DIS |
VCC |
VC |
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R11 |
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OUT |
10 Ω |
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Q1 |
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ST-BY |
4 |
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3 |
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14 |
8 |
9 |
10 |
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STP7NB60 |
R17 |
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16 |
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4.3 kΩ |
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R18 |
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R14 |
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R12 |
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20 kΩ |
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ISEN |
1 kΩ |
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IC1 |
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12 kΩ |
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L5991 |
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13 |
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R13 |
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IC2 |
1 |
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12 kΩ |
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R15 |
R19 |
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PC905 |
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2 |
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C8 |
0.47 Ω |
N.A. |
C14 |
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RCT |
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12 |
5 |
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6 |
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100 pF |
1/2 W |
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8.2 nF |
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DC-LIM |
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SGND |
VFB |
SS |
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COMP |
PGND |
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C4 |
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100 nF |
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D7 1N4148 |
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R16 100 Ω |
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C13 |
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D6 1N4148 |
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R20 |
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N.A. |
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Rc |
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180 kΩ |
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R' |
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4 |
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C5 |
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5.9 kΩ |
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C6 |
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C7 |
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3.3 nF |
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8.2 kΩ |
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56 nF |
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3.3 nF |
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6 |
3 |
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R21 |
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3.16 kΩ |
1)The oscillator has been modified to maintain the same frequency under normal operation (70kHz) at full load and have a standby frequency equal to half the normal frequency (35kHz). The oscillator frequency with no-load will be 5kHz. Further details on the calculations can be found in the appendix.
2)The dummy load represented by the feedback components on the secondary side (170mW in the original design) has been reduced at 40mW: R21 has been increased from 348 Ω to 3.16kΩ and, consequently, R18 from 2.2 to 20kΩ to maintain the same regulated output voltage. This reduces the current consumption of the divider from 7.2 to 0.8mA. Additionally, R19 which was to provide 1mA extra bias current to the reference of the PC905, has been taken out since it was not strictly necessary.
3)The frequency compensation of the voltage control loop (C7, C14, R20) has been modified so as to get a larger bandwidth - it has been almost doubled - and then a faster response. The main purpose of that is to allow a correct start-up of the converter even with no load, whereas a slow feedback (basically, a large C14) causes the system to try continuously to restart under these conditions.
4)R7 has been decreased from 4.7 to 1 Ω, to prevent the supply voltage of the L5991 from going below
the UVLO threshold with no load. To help this, the total consumption of the IC has been reduced by 0.3 mA by increasing R8 and R9 (from 5.6 to 22k Ω and from 6.8 to 27kΩ, respectively). Although with this change the voltage generated at full load is higher, it is still below the OVP threshold, set by R5 and R6, with a safe margin.
These modifications are summarized in table 3.
4/18
AN1537 APPLICATION NOTE
Table 3. 45W, wide-range mains AC-DC adapter: list of modifications to the original design
Part |
Original value |
New Value |
Part |
Original value |
New Value |
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R7 |
4.7Ω |
1Ω |
R20 |
5.6kΩ |
180kΩ |
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R8 |
5.6kΩ |
22kΩ |
R21 |
348Ω |
3.16kΩ |
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R19 |
6.8kΩ |
27kΩ |
RC |
--- |
5.9kΩ |
R12 |
24kΩ |
12kΩ |
R’ |
--- |
8.2kΩ |
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R13 |
8.2kΩ |
12kΩ |
C7 |
220pF |
3.3nF |
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R18 |
2.2kΩ |
20kΩ |
C14 |
470nF |
4.7nF |
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R19 |
1.2kΩ |
--- |
D6, D7 |
--- |
1N4148 |
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45W AC-DC adapter: evaluation results
The following diagrams compare the performance of the original design ("standard standby") with that of the modified one ("improved standby"). For reference, it has also been measured the input consumption after replacing the start-up circuit made up of R1, R2 and D3 with an active start-up circuit (see fig. 12).
To be noted in figure 4, the no-load consumption is < 0.6W @ 264Vac, then the adapter under test meets the ECC limits, Phase 3 (< 0.75W @230Vac) with some margin even without the use of an active start-up circuit.
Figure 4. 45W AC-DC adapter: light load input consumption comparison
Pin [W] |
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Pin [W] |
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1.6 |
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1.4 |
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Pout = 0.5 W |
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standard standby |
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Pout = 0.3 W |
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standard standby |
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1.4 |
fsw = 16 kHz |
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1.2 |
fsw = 13 kHz |
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Tamb= 25 °C |
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Tamb= 25 °C |
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1.2 |
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1 |
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1 |
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improved standby |
0.8 |
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improved standby |
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0.8 |
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improved standby |
0.6 |
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improved standby |
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with active start-up (*) |
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with active start-up (*) |
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0.6 |
100 |
150 |
200 |
250 |
300 |
0.4 |
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100 |
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300 |
50 |
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(*) refer to the circuit shown in |
Vin [Vac] |
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(*) refer to the circuit shown in |
Vin [Vac] |
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the schematic of figure 12 |
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the schematic of figure 12 |
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Pin [W] |
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1 |
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Pout = 0 W |
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standard standby |
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0.8 |
fsw = 5 kHz |
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Tamb= 25 °C |
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0.6 |
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0.4 |
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improved standby |
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0.2 |
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improved standby |
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0 |
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with active start-up (*) |
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100 |
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50 |
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(*) refer to the circuit shown in |
Vin [Vac] |
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the schematic of figure 12 |
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The diagram on the left in figure 5 shows the relationship between output current and switching frequency obtained with the modified oscillator. The oscillator frequency is not much affected by the input voltage, as shown also by the oscilloscope diagrams of figures 6 to 10: the internal propagation delay of the current sense pin is
compensated by R3 and R4, then the changes of VCOMP (and, consequently, fsw) with the input voltage are negligible.
The diagram on the right in figure 5 illustrates the effect of temperature on both the oscillator frequency and the no-load input consumption (@264Vac) in the temperature range 0-70°C: the variation is very limited.
5/18
AN1537 APPLICATION NOTE
Figure 5. 45W AC-DC adapter: fsw vs. Iout (left); Pin (@ Pout = 0) and fsw vs. ambient temperature (right)
fsw [kHz] |
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fsw [kHz] |
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Pin [W] |
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100 |
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7 |
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0.58 |
Tamb = 25 °C |
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fsw |
Pin |
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50 |
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6 |
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0.57 |
Vin = 110 Vac, 230 Vac |
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30 |
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20 |
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5 |
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0.56 |
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10 |
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Pout = 0 W |
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4 |
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0.55 |
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5 |
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Vin = 264 Vac |
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3 |
0.01 |
0.1 |
1 |
3 |
0 |
20 |
40 |
60 |
0.54 |
0.001 |
-20 |
80 |
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Iout [A] |
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Tamb[°C] |
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Figure 6. 45W AC-DC adapter: waveforms @ Pout = 45W |
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RCT (pin 2 of L5991) |
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RCT (pin 2 of L5991) |
Q1 Drain
Q1 Drain
Vin = 110 Vac, Pout = 45W |
Vin = 220 Vac, Pout = 45W |
Figure 7. 45W AC-DC adapter: waveforms @ Pout = 7W, just after the abrupt frequency shift
RCT (pin 2 of L5991) |
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RCT (pin 2 of L5991) |
Q1 Drain
Q1 Drain
Vin = 110 Vac, Pout = 7W |
Vin = 220 Vac, Pout = 7W |
6/18