This application notes describes a simple technique that allows improving the Standby function of the
advanced PWM controller L5991. The price to pay for that is the addition of just two resistors and two
diodes, but the benefit brought in terms of no-load consumption in mains-operated converters is worth
this small fee. The effectiveness of the improved Standby function will be proved and assessed on a
couple of existing designs.
Introduction
L5991's Standby function is a valuable help in reducing light-load input consumption of offline converters and
making them compliant with energy saving standards such as EnergyStar, Energy2000 and others. This function, optimized for flyback topology , is the ability of automatically - and abruptly - reducing the osc illator frequency (i.e. converter's switching frequency) as the converter's load falls below a defined thr eshold and restoring the
normal oscillator frequency as the load increases and exceeds a second threshold.
The frequency shift allows minimizing power losses related to switching frequency, which represent most of
losses at light or no load, without giving up the advantages of a higher switching frequency at full load.
Being the L5991 a current-mode controller [1], the output voltage (V
except for an offset, is proportional to the peak pr imary current and then to the ener gy handled by the transformer cycle by cycle. It is then possible to deduce converter's load conditions by monitoring V
) of its error amplifier (pin 6, COMP),
COMP
.
COMP
Figure 1. L5991's Standby function operation:
fsw
fosc
fSB
Standby
1234
V
T
1
VCOMP
Normal operation
V
T
2
If the peak primary current decreases as a result of a decrease of the pow er demanded by the load and V
fsw vs.
V
locus (left) and
COMP
Pin
PNO
PSB
1234
V
COMP
Undershoot
during transition
V
T
1
VCOMP
vs.
Pin locus (right).
Normal operation
Standby
Overshoot
during transition
V
T
2
fosc
fSB
COMP
falls below a fixed threshold (VT1), the oscillator frequency will be set at a lower value (fSB). If now the peak
primary current increases and V
reset at the normal value ( f
). Since the frequency shift causes V
osc
for energy balance reasons, an appropriate hysteresis (V
from switching back and forth between f
The L5991 allows programming both the normal and the standby frequency. V
exceeds a second threshold (VT2 > VT1) the oscillator frequency will be
COMP
SB
and f
) is provided to prevent the oscillator frequency
T2-VT1
. This operation is shown in fig. 1.
osc
to shift too but in the oppos ite direc tion
COMP
and VT2 are internally fixed but
T1
May 2003
1/18
AN1537 APPLICATION NOTE
it is possibl e to adjust the thresholds in terms of input power level (PNO, PSB) by adding a DC offset on its curr ent
sense input (pin 13, ISEN). Reference [2] provides plenty of details on this function and its usage.
There is a maxi mum abrupt frequency shift a llowed, wh ich i s relate d to the amount of hysteresis: the theoretic al
maximum ratio of f
during the transients resulting from the frequency shift. As a matter of fact, depending on the closed-loop characteristics of the voltage control loop and on the amplitude of the load change that causes the frequency shift,
V
may overshoot or undershoot before reaching its new steady-state value (see figure 1). If during a tran-
COMP
sient the other threshold is crossed, V
quency be unstable, going back an d forth from one v alue to the other. As a result, the pr actic al lim it is less than
the theoretical value, probably less than 4 and, at any rate, the control loop dynamics needs to be kept r elatively
slow to limit the aptitude of V
In [2] it is explained also that the addition of a DC offset on the current sense pin increases the maximum f
to fSB ratio allowed. However, this technique is sui table for allowing a higher f
on f
is determined by other considerations: if it is in the audible range (< 16kHz), the transformer will very likely
SB
generate audible noise, espe cially at pow er levels where the frequency i s about to s hift bac k to f
the high peak current involved.
Often, instead, for a given f
aimed at complying even with the most severe energy saving standards. In this case it would be desirable to
have a very low frequency under no-load conditions, where the peak current is too small to be able to generate
audible noise, and a frequency above the audible range at power levels where audible noise issues may arise.
This is exactly the purpose of the modification to the oscillator proposed in the following section.
Standby function improvement
To realize the aforementioned function, the osc illator frequency needs to be dependent on c onverter's load conditions - the lower the load, the lower the frequency and vice versa - and only when this is useful, that is at light
load. This can be done by adding few parts to the oscillator of the L5991, as shown in figure 2.
Assuming a perfect matching of the two dio des (with a common-cathode dual di ode like the BAV70 this is closer
to reality), when V
to ground through R
oscillator frequency dec reased, the low er V
3V D1 isolates R
cuit. R
, RB and CT can be then cal culated as us ual with the formulae gi ven i n [1]; as to the deter minatio n of R
A
and R' please refer to the appendix.
to fSB is 5.59, however this value does not account for the dynamic changes of V
osc
may bounce from one threshold to the other and the switching fre-
COMP
to under- or overshooting.
COMP
with a given fSB. The lower limit
osc
, because of
osc
an fSB as low as possible would be required to meet the latest design targets
osc
falls below 3V (oscillator's peak voltage) some of the current that charges CT is diverted
COMP
, D1 an R'. In this way the rate of rise of the voltage across CT is slowed down and the
C
and the oscillator frequency will be either f
C
the lower the frequency. Instead, when V
COMP
or fSB, like in the standard L5991 oscillator cir-
osc
is greater than
COMP
COMP
osc
C
Figure 2. Oscillator modification to improve Standby function
additional parts
D2
D1, D2
D1
B
A
R
R
C
C
R
R'
T
2 x 1N4148
or
1 x BAV70
L5991
6COMP
16 S_BY
Vref4
2
RCT
D2 compensates for the temperature shift of the forward voltage drop VF of D1. Considering that the current
flowing through the diodes is in the hundre d µA or less, D1 and D2 dissip ate negligibl e power and only ambient
temperature affects their V
where R
comes into play will depend on ambient temperature. In real-world operation, considering also that
C
. Assuming D1 and D2 match perfectly, neither oscillator frequency nor the point
F
D1 and D2 do not usually carry the same current, a minimum temperature effect can be observed.
2/18
AN1537 APPLICATION NOTE
The "frequency foldback" provided by the additional circuit starts in the neighborhood of V
little before that the high-to-low frequency shift takes place. After the shift, V
switching frequency will be close or exactly equal to f
, depending on the f
SB
will be higher and then the
COMP
to fSB ratio.
osc
= 3V, that is a
COMP
In applications where the switching frequency needs not be tightly fixed for some specific reason there is no
major drawback to thi s technique. The only point to take car e of is that the osc illator f reque ncy be in the audi ble
range only when the peak current is so low that no sound may come from the transformer, even when it is made
with normal const ruction tec hniques. Thi s can be obtained simpl y by choosing f
(e.g. f
> 30kHz seems to be a good rule of thumb).
SB
well above the audible range
SB
The benefits, on the contrary, are considerable:
1)Very low switching frequencies are po ssible which, as already stated, will allow treating the power
throughput as much efficiently as possible: MOSFET's capacitive losses, gate drive consumption and
other parasitic losses will be minimized. See [2] for more details on them.
2) Since the additional com ponents will be c oncerned with taking the os cillator frequency to v ery low
values, the standby frequency
fSB can be kept relatively high, thus reducing the abrupt frequency shift
and eliminating the need for a slow feedback to prevent frequency instability. As already said, keeping f
high has the positive side-effect of eliminating audible noise issues.
SB
3) As a result of the faster dynamic response, start-up under no-load conditions is possible even with a
minimum pre-load on the ou tput. The d ummy load represent ed by t he feedbac k net work, as we ll as
bleeders, if used, can be minimized. The limit to the dummy load reduction is given by the collapse
that the voltage delivered by the self-supply winding experiences with no load, which must not pull
the supply voltage of the L5991 below the UVLO threshold.
To evaluate how much this function modification improves converter's performance at light or no load, the 45W
wide-range mains AC-DC adapter illustrated in [3] and the 80W power-factor-corrected AC-DC adapter described in [4] will be optimized following the guidelines revealed by the above considerations. The "European
Code of Conduct on Efficiency of External Power Supplies", ECC in short, whose limits are summarized in table
1, will be assumed as the reference.
Table 1. Limits envisaged by European Code of Conduct on Efficiency of External Power Supplies
Max. no-load Power Consumption
Rated Input Power
≥ 0.3W and < 15W1.0W0.75W0.30W
≥ 15W and < 50W1.0W0.75W0.50W
≥ 50W and < 75W1.0W0.75W0.75W
Phase 1
01.01.2001
Phase 2
01.01.2003
Phase 3
01.01.2005
Optimization of a 45W, wide-range mains AC-DC adapter
For reader's convenience, table 2 summarizes the electrical spec of the adapter under consideration. Please
refer to [3] for a detailed description and full evaluation data.
Table 2. 45W, wide-range mains AC-DC adapter: electrical specification of the original design
Input Voltage Range (V
Mains Frequency (f
Maximum Output Power (P
Output
Normal Operation Switching Frequency (f
Light Load Switching Frequency (f
Full-load Efficiency (@ Pout =45W, Vin = 88÷264Vac)> 80%
Maximum no-load Input Power (Vin = 88÷264Vac)< 1W
Since the full-load input power is greater than 50W, this adapter belongs to the third bracket envisaged by the
ECC. Its no load consumption is 0.9W @264Vac and 0.7W @220Vac then it meets Phase 1 limit (1W) and is
close to that of Phase 2 and 3 (0.75W) with almost no margin.
Although the ECC specifies that the compliance test be done at the nominal voltage 230 Vac, in the pre-compliance test it is quite usual to refer to the consumption at 264 Vac, to account for production spread. With this
criterion the adapter cannot be considered compliant with Phase 2 or 3 limits.
The target of the optimization is then to make the adapter ECC-compliant in the above menti oned sense. Figure
3 shows the electrical schematic of the converter with the added and modified components highlighted. Only
these changes will be discussed.
Figure 3. 45W AC-DC adapter: electrical schematic of the modified circuit
12 k
R12
100 nF
ΩΩΩΩ
C4
C3 100 nF
R13
12 k
88 to 264
ST-BY
ΩΩΩΩ
F1 T2A250V
Vac
R5 47 k
R8 22 k
R9 27 k
VREF
43
16
2
15
RCT
DC-LIMSGND
D6 1N4148
Rc
C5
5.9 k
3.3 nF
12
ΩΩΩΩ
NTC1 N.A.
Ω
ΩΩΩΩ
ΩΩΩΩ
DCC
R'
8.2 k
ΩΩΩΩ
L5991
5
VFB
D7 1N4148
IC1
C6
56 nF
330 k
BD1
DF04M
C1
100 µF
400 V
R6
Ω
R10
Ω
22
814
9
6
7
SS
COMP
1N4148
VCVCCDIS
C7
3.3 nF
D3
10
13
11
56 k
56 k
R23 N.A.
OUT
ISEN
PGND
R1
R2
47 µF
25 V
R3
Ω
Ω
2.2 M
R4
Ω
Ω
2.2 M
R7 1
C2
R11
Ω
10
R14
1 kΩ
C8
100 pF
R16 100
D1
BZW06-154
D2
STTA106
ΩΩΩΩ
D4 1N4148
STP7NB60
Ω
R15
0.47 Ω
1/2 W
Q1
R22
N.A.
T1
N1N2
N3
R17
4.3 k
IC2
PC905
7
6
D5
BYW29-200
C9
330 µF
25 V
C12
4.7 nF
2kV
Ω
3
C17
N.A.
18V/2.5A
C10
C11
330 µF
25 V
C14
8.2 nF
R21
3.16 k
C15
220 nF
ΩΩΩΩ
20 k
R18
180 k
ΩΩΩΩ
R20
GND
ΩΩΩΩ
330 µF
25 V
1
R19
N.A.
2
C13
N.A.
4
1)The oscillator has been modified to maintain the same frequency under normal operation (70kHz) at
full load and have a standby frequency equal to half the normal frequency (35kHz). The oscillator frequency with no-load will be 5kHz. Further details on the calculations can be found in the appendix.
2)The dummy load represented by the feed back components o n the sec ondary side (170mW in the
original design) has been reduced at 40mW: R21 has been increas ed from 348 Ω to 3.16kΩ and,
consequently, R18 from 2.2 to 20kΩ to maintain the same regulated output voltage. This reduces the
current consumption of the divide r from 7. 2 to 0.8 mA. Additionally, R1 9 wh ich was t o provide 1 mA
extra bias current to the reference of the PC905, has been taken out since it was not strictly necessary.
3)The frequency compens ation of the voltage c ont rol loop (C7 , C14, R20) has been modi fied so as to
get a larger bandwidth - it has been almost doubled - and then a faster response. The main purpose
of that is to allow a correct start-up of t he converter even with no l oad, whereas a slow feedback (basically, a large C14) causes the system to try continuously to restart under these conditions.
4)R7 has been decreased from 4.7 to 1 Ω, to prevent the supply voltage of the L5991 from going below
the UVLO threshold with no load. To help this, the total consum ption of the I C has been reduc ed by
0.3 mA by increasing R8 and R9 (from 5.6 to 22k Ω and from 6.8 to 27kΩ, respectively). Although
with this change the voltage generated at full load is higher, it is still below the OVP threshold, set by
R5 and R6, with a safe margin.
These modifications are summarized in table 3.
4/18
AN1537 APPLICATION NOTE
Table 3. 45W, wide-range mains AC-DC adapter: list of modifications to the original design
PartOriginal valueNew ValuePartOriginal valueNew Value
The following diagrams compare the performance of the original design ("standard standby") with that of the
modified one ("improved standby"). For reference, it has also been measured the input consumption after replacing the start-up circuit made up of R1, R2 and D3 with an active start-up circuit (see fig. 12).
To be noted in figure 4, the no-load consumption is < 0.6W @ 264Vac, then the adapter under test meets the
ECC limits, Phase 3 (< 0.75W @230Vac) with some margin even without the use of an active start-up circuit.
(*) refer to the circuit shown in
the schematic of figure 12
Vin [Vac]
Pin [W]
1
0.8
0.6
0.4
0.2
0
improved standby
with active start-up (*)
Pout = 0 W
fsw = 5 kHz
Tamb= 25 °C
50100150200250300
(*) refer to the circuit shown in
the schematic of figure 12
0.6
0.4
50100150200250300
(*) refer to the circuit shown in
the schematic of figure 12
standard standby
improved standby
improved standby
wit h act ive start-u p (*)
Vin [Vac]
Vin [Vac]
improved standby
with active start-up (*)
The diagram on the left in figure 5 shows the relationship between output current and switching frequency obtained with the modified oscillator. The oscillator frequency is not much affected by the input voltage, as shown
also by the oscilloscope diagrams of figures 6 to 10: the internal propagation delay of the current sense pin is
compensated by R3 and R 4, then the changes of V
(and, consequently, fsw) with the input voltage are neg-
COMP
ligible.
The diagram on the right in figure 5 illustr ates the effect of temperature on both the os cilla tor frequenc y and the
no-load input consumption (@264Vac) in the temperature range 0-70°C: the variation is very limited.
5/18
AN1537 APPLICATION NOTE
Figure 5. 45W AC-DC adapter:
fsw
vs.
I
out
(left);
Pin
fsw [kHz]
100
50
Tamb = 25 °C
Vin = 11 0 Vac, 23 0 Vac
30
20
10
5
3
0.0010.010.11
Iout [A]
Figure 6. 45W AC-DC adapter: waveforms @ P
RCT (pin 2 of L5991)
(@
P
= 0) and
out
fsw vs. ambient temperature (right)
fsw [kHz]Pin [W]
7
fsw Pin
6
5
Pout = 0 W
4
Vin = 264 Vac
3
-20020406080
Tamb[°C]
= 45W
out
RCT (pin 2 of L5991)
0.58
0.57
0.56
0.55
0.54
Q1 Drain
Vin = 110 Vac, Pout = 45W
Figure 7. 45W AC-DC adapter: waveforms
RCT (pin 2 of L5991)
Q1 Drain
@
Q1 Drain
Vin = 220 Vac, Pout = 45W
P
= 7W, just after the abrupt frequency shift
out
RCT (pin 2 of L5991)
Q1 Drain
6/18
Vin = 110 Vac, Pout = 7W
Vin = 220 Vac, Pout = 7W
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