ST AN1506 Application note

AN1506

APPLICATION NOTE

A MOTOR DRIVES SYSTEM FOR

WHEELCHAIR APPLICATIONS

G. Belverde - C. Guastella - M. Melito - A. Raciti

1. ABSTRACT

This paper deals with a new concept applied in designing low-voltage power MOSFETs that are suitable for high-current low-voltage converter applications. The layout of the proposed device family overcomes the traditional cell structure by a new strip-based geometry. They present interesting characteristics due to the advanced design rules typical of VLSI processes and strong reduction of the on-state resistance. Further, the technology process allows a significant simplification of the silicon fabrication steps, thus allowing to enhance the device ruggedness. The high current handling in switching conditions (up to 150A) with a breakdown voltage in the range between 20-50V in a convenient package solution give the correct answers to the low-voltage range switch applications. This paper starts with the description of the main technology issues in comparison with that of standard devices, particularly focusing on the innovations and the improved performances. Moreover, a detailed characterization of the MOSFET behavior in a traditional test circuit as well as in an actual AC motor drive for wheel chair applications are presented and discussed.

2. INTRODUCTION.

Higher efficiencies are expected nowadays in the field of power converters for battery-powered systems. As industrial and commercial applications of these systems are increasing more and more (laptops, portable equipment, home appliances, electric assisted bikes, electric scooters, wheel chairs, mobiles, etc.), higher efficiencies become of major interest in order to meet the user requirements of long-lasting behavior with the same battery charge. To do that, researchers have made dramatic efforts in designing new converter structures, in increasing the converter switching frequency and in conceiving innovative power devices.

Generally speaking, battery powered systems require low-voltage switching devices (<100V). Power MOSFET devices dominate in this voltage range due to their attractive characteristics of high switching speed and easy driving capability. On-state losses of MOSFETs are of major concern on their total power loss balance, especially in case of converters with low or medium switching frequency. Since on-state losses depend on the drain-source resistance (Ron), which is strictly related to the structure design, many modern MOSFETs are realized with a cell-based layout, which determines low on-state resistance. The increase of the cell density allows to further reduce the on-state resistance, thus increasing the current capability per device area-unit. However, for today’ s state-of-the-art MOSFETs, ulterior reduction of the on-state resistance by this conventional layout is impeded since this approach is reaching its own physical limit [1]. The need of innovative approaches arises in order to overcome the limit of this technology.

January 2002

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The strip-based layout is a new approach [2], which allows using a simplified process for implanting the body and isolating the poly silicon gate from the source. The new technology is very effective in eliminating the limit of the cell-based layout, which relies on the capability to open smaller and smaller windows on the poly silicon area in order to obtain greater cell-density figures. With the strip-based layout, MOSFET devices show improved performances and a simpler manufacturing process. Moreover, they benefit of the well-established and advanced design rules typical of VLSI processes. On-state resistance values as low as 1.2mΩ can be reached, but the overall MOSFET design must account for the best trade-off of a merit figure, which is the product of the on-state resistance and the gate charge values (Ron QG).

In this paper the main issues of the new technology are briefly recalled, and the device structure is described and discussed. The static and dynamic characteristics of devices belonging to this new family of MOSFETs are presented and compared with those of more traditional ones. Conventional experimental tests have been carried out and are discussed aiming to determine the impact of turn on and turn off energy loss [3]. A low-voltage battery-powered converter for wheel chairs is used as a workbench for an application-oriented characterization. Some relevant tests are reported and discussed. A detailed analysis is done on the conduction and switching losses and the thermal behavior in the actual application.

3. MAIN TECHNOLOGY ISSUES OF STRIP-BASED MOSFET.

The structure of a strip-based MOSFET device overcomes the limit of a cell structure. In figure 1 the geometry of the two differently conceived devices are shown. The main differences between a standard square-cell layout and the strip implementation may be better understood by inspecting figure 2. In the conventional cell structure shown, all subsequent contacts and isolation openings must be confined and aligned inside the largest square windows opened on the poly silicon layer whose side is L in figure 2. That dimension depends on the alignment, the resolution, and the process tolerances and can be expressed as:

L = c + 2b + 2t

(1)

where:

c is the contact dimension for the body region imposed by the resolution of the photolithography equipment;

b is the contact dimension for the source region which depends on the alignment capability and on the metallization process;

t is the separation (isolation) between the poly and source metal and is controlled by the alignment feature.

Consequently, the standard cell layout depends on three feature sizes.

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ST AN1506 Application note

AN1506 - APPLICATION NOTE

Figure 1. Cell-based and strip-based structures of two Power MOSFETs

L

L

S

S

source

source

 

 

 

 

 

 

 

 

body

 

body

In the strip-based layout process an intermediate dielectric layer is obtained after growing the gate oxide and depositing the poly silicon. In such a sandwich structure parallel strips are opened through an appropriate photo masking process. After implanting the body, the source regions are created by using a sort of small rectangle (patches) masking. The longer sides of the patches are perpendicular to the strips in such a way that they do not need to be aligned within the strip but only along their spacing, which normally is larger than the opening, thus avoiding any alignment problem. The next step is to isolate the poly silicon along the stripe’ s periphery thanks to the spacer process. Etching the dielectric material originally deposited and creating “hills”on the sides of the strips achieve this. Finally, Aluminum deposition is done in order to contact the strips, and the fabrication flow chart is completed.

Figure 2. Cell-based and strip-based structures of two Power MOSFETs showing the key parameters of the elemental component of the geometry

a)

 

 

b)

 

 

c

b

source

n+

 

t

 

 

 

 

body

p

 

 

 

source

n+

 

L

 

 

p-vapox

 

 

 

poly

 

c

b

t

 

SiO2

p

n

 

p

n+

 

 

 

 

 

 

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AN1506 - APPLICATION NOTE

The source mask does not need to be aligned within the strip itself; the only critical parameter is the width of the strip (see figure 1), which depends on the equipment resolution. As can be argued from the above description, the process benefits in a reduced number of feature sizes since it is now only dependent on a single feature size, and higher packing densities can be obtained in comparison to the conventional cell-geometry process. The new process is also named Extremely High Density (EHD) referring to the possibility of getting devices with very high equivalent cell densities. Figure 3 compares the obtainable channel perimeter density and thus the current density of the two structures.

Figure 3. Channel perimeter density comparison of cell-based and strip-based structures

[cm/mm2]

30

 

 

 

 

 

 

 

25

 

 

 

 

Strip-based layout

density

20

 

 

 

 

 

 

 

perimeter

Cell-based layout

 

 

 

 

 

 

 

 

 

 

 

15

 

 

 

 

 

 

 

Channel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

7

6

5

4

3

2

1

 

8

Minimum feature size [µm]

4. STATIC AND DYNAMIC BEHAVIOR OF THE NEW DEVICE.

The resulting MOSFET device of the strip-based process shows very interesting characteristics: extremely high packing density and low on-state resistance, rugged avalanche characteristics, and less critical alignment steps. First of all we have selected the device STB80NF55, which was the candidate for the actual application in an AC drive. The drive is described with more details in the next section. The main electrical quantities of the component are summarized in Table 1.

Table 1. STB80NF55 Main Electrical Characteristics

Ron

BVDSS

QG

Qsw

Qgd

trr

Qrr

Irr

Package

[mΩ]

[V]

[nC]

[nC]

[nC]

[nS]

[nC]

[A]

 

 

 

 

 

 

 

 

 

 

6.5

55

180

90

66

80

245

6.4

D2PAK

A preliminary characterization in a dc chopper working on inductive load has been done. Looking for the specific application supplied at a dc bus of 24V, several commutation tests (turn on and turn off) have been done at this voltage while the current assumed a variable value. The energy losses in such conditions are reported in figure 4. Linear dependence of the energy versus the switched current is evident both for the turn on and turn off transients.

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Figure 4. Energy losses during turn off and turn on transients versus the drain current at VDS=24V

E [µJ]

 

 

 

 

60

 

 

 

 

50

 

 

 

 

40

 

 

 

 

 

 

Eoff

 

 

30

 

 

Eon

 

 

 

 

 

20

 

 

 

 

10

 

 

 

 

0

10

15

20

25

5

 

 

 

 

I [A]

Since the performances of the body-drain diode could be conveniently exploited in bridge topologies, the characteristics of this intrinsic diode have been tested. A favorable characteristic of this internal bodydrain diode is its high dv/dt capability; crucial in all bridge topologies such as motor drives or uninterruptible power supply (UPS). For the used device the allowed limit is 10V/ns. Finally in figure 5 the static characteristics of the new MOSFET are reported. In forward conduction (positive drain voltage) the I/V characteristic of the MOSFET is traced. In reverse conduction two static characteristics are reported relative to the MOSFET and the intrinsic diode: at zero source-gate voltage the current will flow exclusively as a diode current; with a gate bias voltage the current will flow through the MOSFET as in the case of synchronous rectifier applications.

Figure 5. Static characteristics of the new MOSFET and its body-drain diode at a temperature of 125°C

VDS [V]

150

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MOS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIODE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-100

 

 

 

 

 

 

 

 

 

 

 

 

 

ID [A]

 

 

 

 

 

 

 

 

 

 

 

 

 

-150

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-1

-0.5

0

0.5

1

 

1.5

1.5

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