ST AN1506 Application note

AN1506

APPLICATION NOTE

A MOTOR DRIVES SYSTEM FOR

WHEELCHAIR APPLICATIONS

G. Belverde - C. Guastella - M. Melito - A. Raciti

1. ABSTRACT

This paper deals with a new conc ept applied in designing low-voltage power MOSFE Ts that are suitable
for high-current low-voltage converter application s. The layout of the proposed dev ice famil y overc om es
the traditional cell structure by a new strip-based geometry. They present interesting characteristics due
to the advanced de sign rules typical of VLS I processes and s trong reduction of the on-state resistance.
Further, the technology process allows a significant simplification of the silicon fabrication steps, thus
allowing to enhance the device ruggedness. The hig h current handling in switching conditions (up to
150A) with a breakdown voltage in the range betwe en 20-50V in a convenient pac kage solution gi ve the
correct answers to the low-voltage range switch applications. This paper starts with the description of the
main technology issues in comparison with that of standard devices, particularly focusing on the
innovations and the improved performances. Moreover, a detailed characterization of the MOSFET
behavior in a traditional test circuit as well as in an actual AC motor drive for wheel chair applications are
presented and discussed.

2. INTRODUCTION.

Higher efficiencies are expected nowadays in the field of power converters for battery-powered systems.
As industrial and commercial applications of these systems are increasing more and more (laptops,
portable equipment, home appliances, electric assisted bikes, electric sc ooters, wheel chairs, mobiles,
etc.), higher efficiencies become of major interest in order to meet the user requirem ents of long-lasting
behavior with the sam e bat tery cha rge. To do that, researchers have made dra matic efforts in designing
new converter structures, in increasing the converter switching freq uency and in conceiving innovative
power devices.

Generally speaking, battery powered systems require low-voltage switching devices (<100V). Power
MOSFET de vices domina te in thi s voltage range due to t heir attractive c haracteristics of high sw itching
speed and easy driving capability. On-state losses of MOSFETs are of major concern on their total power
loss balance, esp ecially in case of converters with low or medium sw itching frequency. Since on-state
losses depend on the drain-source resistance (R

modern MOSFETs are realized with a cell-based layout, which determines low on-state resistance. The
increase of the cell density allows to further reduce th e on-state resistance, thus increasing the current

capability per device area-unit. However, for today’ s state-of-the-art MOSFETs, ulterior reduction of the
on-state resistance by this conventional layout is impeded since this approach is reaching its own
physical limit [1]. The need of innovative approaches arises in order to overcome the limit of this
technology.

), which is strictly related to the structure design, many

on

January 2002

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AN1506 - APPLICATION NOTE

The strip-based layout is a new approach [2], which allows using a simplified process for implant ing the
body and isolating the poly silicon gate from the source. The new technology is very effective in
eliminating the limit o f the cell-base d layout, which relies on the capability to open smaller and smaller
windows on the poly silicon area in order to obtain greater cell-density figures. With the strip-based
layout, MOSFET devices show improved performances and a simpler manufacturing process. Moreover,
they benefit of the well-established and advanced design rules typical of VLSI processes. On-state
resistance values as low as 1.2mΩ can be reached, but the overall MOSFET design must account for the
best trade-off of a merit figure, which is the product of the on-state resistance and the gate charge values
(R

on QG

).

In this paper the main issues of the new technology are briefly recalled, and the device structure is
described and discussed. The static and dynamic characteristics of devi ces b elonging t o this new f am ily
of MOSFETs are presented and compared with those of more traditional ones. Conventional
experimental tests have bee n carried out a nd are discussed aiming to de termine the impact of turn on
and turn off energy loss [3]. A low-voltage battery-powered converter for wheel chairs is used as a
workbench for an application-oriented characterization. Some relevant tests are reported and discussed.
A detailed analysis is done on the conduction and switching losses and the thermal behavior in the actual
application.

3. MAIN TECHNOLOGY ISSUES OF STRIP-BASED MOSFET.

The structure of a strip-based MOSFET device overcomes the limit of a cell structur e. In figure 1 the
geometry of the t wo differently conceived devices are s hown. The m ain differences between a stan dard
square-cell layout and the strip imple mentation may be better unders tood by inspecting figure 2. In the
conventional cell structure shown, all subsequent contacts and isolation openings must be co nfined a nd
aligned inside the large st square windows opene d on the poly silicon layer whose side is L in fig ure 2.
That dimension depends on the alignment, the resolution, and the process tolerances and can be
expressed as:

Lc2b2t++=1()

where:

• c is the contact dimension for the body region imposed by the resolution of the photolithography
equipment;

• b is the contact dimension for the source re gion which depends on the alignm ent c apability and on the
metallization process;

• t is the separation (isolation) between the poly and sou rce metal and is controlled by the alignment
feature.

Consequently, the standard cell layout depends on three feature sizes.

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AN1506 - APPLICATION NOTE

Figure 1. Cell-based and strip-based structures of two Power MOSFETs

L

S

source

body

In the strip-based layout process an intermediate dielectric layer is obtained after growing the gate oxide
and depositing the poly silicon. In such a sandwich structure parallel strips are opened through an
appropriate photo masking process. After implanting the body, the source regions are created by using a
sort of small rectangle (patches) masking. The longer sides of the patches are perpendicular to the strips
in such a way that they do not need t o be aligned within the strip but only along their spacing, which
normally is larger than the opening, thus a voiding any alignment problem. Th e nex t s tep is to isolate the

poly silicon along the stripe’ s pe riphery thanks to the spacer proces s. Etching the dielectric material
originally deposited and creating “hills”on the sides of the strips achieve this. Finally, Aluminum
deposition is done in order to contact the strips, and the fabrication flow chart is completed.

L

S

source

body

Figure 2. Cell-based and strip-based structures of two Power MOSFETs showing the key
parameters of the elemental component of the geometry

a) b)

p

n

bt

c

L
cbt

source

body

source

p

n+

p

n+

p-vapox

poly

SiO2

n+

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AN1506 - APPLICATION NOTE

The source mask d oes not need to be aligned wit hin the strip itself; the only critical parameter is the
width of the strip (see figure 1), which depends on the equipm ent res olution. As can be argued from the
above description, the process benefits in a reduced number of feature sizes since it is now only
dependent on a single feature size, and higher packing dens ities can be obtained in comparison to the
conventional cell-geometry process. The new process is also named Extremely High Density (EHD)
referring to the possibility of getting devices with very high equivalent cell densities. Figure 3 compares
the obtainable channel perimeter density and thus the current density of the two structures.

Figure 3. Channel perimeter density comparison of cell-based and strip-based structures

30

]

2

25

20

Cell-based layout

Strip-based layout

15

Channel perimeter density [cm/mm

10

87654321

Minimum feature size [µm]

4. STATIC AND DYNAMIC BEHAVIOR OF THE NEW DEVICE.

The resulting MOSFET device of the strip-based process shows very interesting characteristics:
extremely high packing densit y and low on -state resistance, rugged aval anche charact eristics, and less
critical alignment steps. First of all we have selected the device STB8 0NF55, which was the cand idate
for the actual application in an AC drive. The drive is described with more details in the next section. The
main electrical quantities of the component are summarized in Table 1.

Table 1. STB80NF55 Main Electrical Characteristics

R

on

[mΩ]

6.5 55 180 90 66 80 245 6.4

A preliminary characterization in a dc chopper working on indu ctive load has been done. Looking for the
specific application supplied at a dc bus of 24V, several commutation tests (turn on and turn off) have
been done at this voltage while the current assumed a variable value. The energy losses in such
conditions are reported in figure 4. Linear dependence of the energy versus the switched current is
evident both for the turn on and turn off transients.

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BV

DSS

[V]

Q

G

[nC]

Qsw
[nC]

Qgd
[nC]

trr

[nS]

Qrr

[nC]

Irr

[A]

Package

2

PAK

D

AN1506 - APPLICATION NOTE

Figure 4. Energy losses during turn off and turn on transients versus the drain current at VDS=24V

E [µJ]

60

50

40

E

off

30

20

10

E

on

0

510152025

I [A]

Since the performances of the body-drain diode could be conveniently exploited in bridge topologies, the
characteristics of this intrinsic diode have been tested. A favorable characteristic of this internal body­drain diode is its high dv/dt capability; crucial in all bridge topologies such as motor drives or
uninterruptible power supply (UPS). For the used device the allowed limit is 10V/ns. Finally in figure 5 the
static characteristics of the new MOSFET are reported. In forward conduction (positive drain voltage) the
I/V characteristic of the M OSFET is traced . In reverse conduction two static characteristics are reported
relative to the MOSFET and the intrinsic diode: at zero source-gate voltage the current will flow
exclusively as a diode current; with a gate bias voltage the current will flow through t he MOSFET as in
the case of synchronous rectifier applications.

Figure 5. Static characteristics of the new MOSFE T and its body-drain diode at a temperature of

125°C

VDS[V]

150

100

MOS

50

-0

-50
DIODE

-100

-150

1.5 -1 -0.5 0 0.5 1 1.5

[A]

I

D

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