ST AN1353 Application note

AN1353

Application note

ASD

ST62000C software description for cooling thermostat applicatons

1 Introduction

In this document, we explain the software of an Electronic thermostat bread board. The demonstration kit has been developped by STMicroelectronics and is available under THERM01EVAL reference.

This board illustrates the operation of a low cost electronic thermostat for 220-240V 50Hz cold appliances, including STMicroelectronics ACS102-5TA, ACST6-7ST and ST62 devices.

The microcontroller will ensure four functions:

● Temperature regulation (temperature capture through NTC resistor + Hysteresis

regulation).

● Compressor monitoring: the motor is controlled depending on fridge temperature. To

start it, the starting triac Ts and the run triac Tr are triggered simultaneously for 500ms. Then, only the run triac will continue to conduct.

● Overcurrent detection: this is based on the measure of the peak current using a shunt

resistor. During the one second (500 ms+500 ms) of starting transient, this routine does not run.

● Internal light bulb control.

2 Hardware configuration

2.1 General information

The power supply of the microcontroller is a capacitive one. Its particularity is that the VSS is 5V less than the Neutral. This power supply can be called a “negative supply”. This generates flowing out current from the ACS/ACST gates (ACS are triggered only with a negative gate current). This feature must also be kept in mind when the overcurrent detection is implemented. It will define in which polarity the current can be sensed.

Figure 1 illustrates the board electrical circuit.

January 2006 Rev 2 1/17

www.st.com

Hardware configuration AN1353

Figure 1. Bread-board schematic

BULB

Run

C4 10 nF X2

Start

R13 51R

C5 1nF

FUSE 6 A / 250 V F1

470nF X2

470K

R11

47R 1/2 W

L_PCB

6µH

Tr Start ACST6

R14 51R

C6 1nF

R10 50m 1/2 W

R9 47K

VDD

D2 6V2 1.3W

C11 680pF

C3 2200µF / 10 V

Ts Run ACST6

C2 100nF

R1 33R 1/2W

C12 1 µF

Tb Bulb ACS102

2 3

4 6 5

OSCIN OSCOUT

NMI RST VPP/TEST

VDD

ST62T00C

PB0/AIN PB1/AIN PB3/AIN

PB6/AIN PB7/AIN PB5/AIN

R2 160R

R3 160R

R4 360R

PA1

PA2

PA3

12 11 10

8 7 9

VSS

VDD

LED

R7 33k

1.5K

C10

2.2nF

doorswitch

2.2nF

62K

2.2nF

DOOR

NTC

R12 1K

POT A 100K

2.2nF

MOTOR

MAINS

1 2 3

VDD

1 2 3

Note the following features on the MCU hardware environment:

● The clock is achieved by the internal oscillator

● No external reset circuit is used, thanks to the Low Voltage Detector option of the MCU

● The Zero Voltage Crossing (ZVC) event is sensed through R6 by the NMI pin.

2.2 I/O port configuration

The following table explains what the I/O ports are used for, and how they are configured, beginning with the Port B which is configured in Input (except for PB1 which is configured as a push pull output).

All the inputs are configured with a pull up resistor, except for when they are used as an ADC input. No In-terrupt is active on any of these pins.

Table 1. Port B configuration registers

Pin Name USE DDR OR DR

PB0 Not used 0 0 0

PB1 Switch ON the LED / Switch OFF the LED 1 1 0/1

PB2 Not existing for ST6200 0 0 0

PB3 SHUNT voltage Analog Input / Input with pull up 0 1/0 1/0

PB4 Not existing for ST6200 0 0 0

PB5 Temperature order Analog Input / Input with pull up 0 1/0 1/0

PB6 Door switch information 0 0 0

PB7 Cabinet temperature Analog Input / Input with pull up 0/0 1/0 1/0

All port A pins are configured as push pull outputs. Table 2 details the option choices and configuration reg-isters.

2/17 Rev 2

AN1353 Main program

Table 2. Port A configuration registers

Pin Name USE DDR OR DR

PA1 START ACST6 ON / START ACST6 OFF 1 1 0/1

PA2 RUN ACST6 ON / RUN ACST6 OFF 1 1 0/1

PA3 LIGHT BULB ON / LIGHT BULB OFF 1 1 0/1

3 Main program

3.1 Mains period measurement

As the board does not embed an oscillator or resonator, the internal resonator of the MCU is used to achieve the clock. But, in this case, the running frequency is given within a range of 20%. This is not enough to ensure an optimum pulse gate current control with a power consumption as little as possible.

To increase the timer accuracy, the MCU uses the Zero Voltage Crossing (ZVC) events to have time infor-mation. The LINE voltage is connected to the NMI pin through a high impedance resistor. An interruption will then occur at each ZVC event. The MCU has just to launch the timer decrementation between two NMI interrupts to calculate how much one must load the TCR register to count down 20 ms.

Of course, in normal operation, the timer can be used for other tasks than counting the mains period. The period measurement will then be based on the rest of time from the last timer utilization and the next NMI interrupt. This measured time is saved as DELTAT (see

Figure 2) by the software. The 20 ms will then equal the DELTAT, plus the sum of times T1 to

T3, plus the time lost due to calculator operations between each timer stop and launch (see

Section 4.3).

Note: Such a method is only valid when the mains frequency is know in advance; i.e. for a board

dedicated to one range of AC mains voltage. In our case, the software and hardware are dedicated to 220/240 V 50 Hz applications.

Rev 2 3/17

Main program AN1353

Figure 2. Timing definition

NMI

Mains Voltage

PA3

PA1 / PA2

Subroutines

Calcul Delay 1

Current Measure

Motor Status

T1 T2 T3 T4 T5

3.2 Subroutines execution time checking

In order not to miss the timer interrupt events, the CPU must be completely free and ready to check the timer interrupt flag. This means that all subroutines must be completed before the expected end of the timer decrementation.

Figure 2 shows that the subroutines are placed at different moments, depending on their

length. For exam-ple, the longest CPU action is when the MCU calculates the T1 to T5 delays. This action can last up to more than 7.2 ms for a 4 MHz MCU clock frequency. Then, there is not enough time available between two timer interrupts to calculate these five values. This is the reason why the delay calculation subroutine has been split into two parts (Calcul-Delay_1 and Calcul-Delay_2). These two parts are respectively placed during T4 and DELTAT decounts

Ta bl e 3 gives the maximum duration of each subroutine (for a 4 MHz clock frequency, and

the for the lon-gest software loops).

Table 3. Subroutines maximum durations

Calcul Delay 2

Loads Control

DELTAT

SUBROUTINE NAME MAXIMUM TIME

Loads_Control 0.93 ms

Motor_Status 0.26 ms

Current_Measure 0.92 ms

Calcul_Delay_1 1.75 ms

Calcul_Delay_2 5.49 ms

Ta bl e 4 gives the code execution maximum times for all the instructions written in the

software, before each subroutine (“code execution time” column). Then, according to the implemented durations, the time, still available for the CPU, is given with a 0.2 ms safety margin.

4/17 Rev 2

AN1353 Main program

Table 4. CPU available time

Name

T1 0.45 0.25 0 0

T2 1.05 0.13 0 0.72

T3 1.75 0.13 0 1.42

T4 3.95 0.85 (T50 Hz average) 1.75 1.15

T5 2.80 0.09 0.26 + 0.92 1.33

DELTAT 6.75 0.08 5.49 + 0.93 0

TOTAL 4.62

Duration

(ms)

Code execution time

(ms)

3.3 Start-up and smart reset

At each RESET interrupt, the program first checks if the data stored in the RAM are as scheduled or not. In-deed, a RESET can occur without the supply voltage having fallen below VRM (Data retention parameter: 0.7 V). In this case, a whole start-up is not necessary, and the program can keep working with the previous RAM data. This is helpful in order to avoid missing loads control when a RESET occurs, due to an EMI problem for example.

If the checked RAM registers are not as expected, then a complete initialization procedure is launched (see Appendix B). This routine, among other things, configures the A and B ports, waits 100 ms before go on (wait-ing for the stabilization of the supply), and measures the mains period for the first time.

Subroutines time sum

(ms)

Available time (ms)

If the RAM area is adequate, then a “Smart Reset” can be performed. Only the registers which are used to store internal sub-routines variables are cleared. Only the main registers keep their previous values (motor status, etc.).

It is important to note that this start-up procedure can miss firing some loads during one mains cycle. This is why, if the motor was at start-up state before a “Smart Reset”, it is better to stop the motor. This avoids switching both the Tr and Ts devices ON together when the split phase capacitor can be charged (refer to AN1354). This is done by simply setting to high level the overcurrent detection flag.

Rev 2 5/17

Gate current pulses AN1353

4 Gate current pulses

4.1 General description

The gate current pulses are generated during the main program (refer to Appendix A and also to Figure 2). The Port A pins are set or reset depending on the information defined by the sub-routines described in para-graph 5.

Annex 1 gives the flowchart of the main program. The ZVC events are sensed thanks to bit 0 of the FLAG register, which is only set during the NMI interrupt. The end of timer decrementations are also sensed by bit 1 of the FLAG register, which is set during timer interrupt.

First, as soon as the ZVC is detected, the T1 decrementation is launched and the light bulb is switched on, if requested, by pulling PA3 down to VSS. After the timer interrupt, PA2 and PA3 are set, or not, depending on the process status. After T2 decrementation, PA3 is set and a new decrementation is launched (T3) to wait to turn off both Tr and Ts.

After this pulse generation, the timer counts down T4 to synchronize the current measure to the moment at which it reaches its peak value. After the “Current_Measure” sub-routine, T5 is decremented in order to reach the beginning of the next half cycle. Gate current pulses are then generated as in the previous cycle.

4.2 How to change the pulse duration?

All the pulse durations are based on a one half-cycle time reference basis. Indeed, in order to count the pe-riod time, the timer is launched after the last current pulse, when VLN is positive. DELTAT will then always represent a time shorter than 10 ms. To be sure that the timer overflow will never occur before the next NMI interrupt, we must ensure that the time to decrement 256 will be always higher than 10 ms.

This condition can be reached with a 32 prescalar ratio. With such a value, even with the maximum allowed MCU clock frequency, the overflow will happen in 12.28 ms.

T50Hz = DELTAT + T1 +T2 +T3, then represents the value to load in the TSCR register to achieve a 10 ms overflow period.

To define an “n” ms duration, consider the following relation:

10 ms T50Hz→

(ms)

Tx→

So, Tx must be loaded in the TSCR to have a timer interrupt after “n” ms. However, as a division by ten is not easy to implement, and in order to increase the register accuracy, it is better to use variables in the range of 256. The variable “Dx” is used and defined as explained below:

Dx =

⎫

Tx =

⎬ ⎭

n x 256

T50Hz x n

(ms)

6/17 Rev 2

+ 11 hidden pages