ST AN1235 Application note

AN1235

Application note

IPAD™

500 µm Flip Chip: package description and recommendations for use

Introduction

This document provides package and usage recommendation information for 500 µm pitch Flip Chips. For information on 400 µm Flip Chips, see Application note AN2348.

The competitive market of portable equipment, notably the mobile phone market, is driven by a challenging development of highly integrated products. To allow manufacturers of portable equipment to reduce the dimension of their products, STMicroelectronics has developed packages with reduced size, thickness and weight in the form of the Flip Chip. The electrical performance of such components in Flip Chips is improved thanks to shorter connections than the ones in standard plastic packages (such as TSSOP, SSOP or BGA).

Figure 1. Typical Flip-Chip package

The Flip-Chip package family has been designed to fulfil the same quality levels and the same reliability performance as standard semiconductor plastic packages. This means these new Flip-Chip packages should be considered as new surface mount devices which will be assembled on a printed circuit board (PCB) without any special or additional process steps required. In particular this package does not require any extra under fill to increase reliability performances or to protect the device. This package is compatible with existing pick and place equipment for board mounting. Only lead-free, RoHS compliant Flip Chips are available in mass production.

This application note addresses the following topics:

■ Product description

■ Mechanical description

■ Packing specifications and labelling description

■ Recommended storage and shipping instructions

■ Soldering assembly recommendations

■ User responsibility and returns

■ Changes

■ Delivery quantity

■ Quality

September 2011 Doc ID 7272 Rev 7 1/14

www.st.com

Product description AN1235

1 Product description

The Flip Chips are manufactured with a wafer level process, which STMicroelectronics has developed, by attaching solder bumps on I/O pads of the active wafer side, thus allowing bumped dice to be produced. The I/O contact layout can be either matrix shape or set on the periphery. No redistribution layer is used. This allows parasitic inductances coming from the redistribution metal tracks to be minimized.

Lead-free bump composition is 98.25% Sn, 1.2% Ag, 0.5% Cu, 0.05% Ni. This is fully compatible with standard lead-free reflow processes. The bump dimension (310 µm bump diameter) allows the pick and place process to be compatible with existing equipment (in particular with equipment used for ball grid array - BGA packages) and makes it also compatible with the PCB design rules used for standard ICs.

Optional coating on the flat side of the package is available.

These components are delivered in tape and reel packing with the bumps on the bottom side (placed on the bottom of the carrier tape cavity). The other face of the component is flat and allows picking as in the standard SMD packages.

Devices are 100% electrically tested before packing. The product references are marked on the flat side of the device.

2 Mechanical description

Mechanical dimensions of Flip Chips are provided through a product example in Figure 2. Bumps are lead-free. Bump composition is 98.25% Sn, 1.2% Ag, 0.5% Cu, 0.05% Ni alloy with a near eutectic melting point of 218 to 227 °C. Die size and bump count are adapted to the connection requirements.

Figure 2. Mechanical dimensions of a 5 x 5 bump matrix array (sample).

500 µm ± 50

310 µm ± 50

500 µm ± 50

2.42 mm ± 50 µm

650 µm ± 65

Optional coating

250 µm ± 40 250 µm ± 40

695 µm ± 70

Note: The package height of 0.65 mm (0.695 mm for optionally coated packages) is valid for a die

thickness of 0.40 mm. With a die thickness of 0.64 mm the total height is 0.89 mm.

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AN1235 Packing specifications and labelling description

The Flip Chip tolerance on bump diameter and bump height are very tight. This constant bump shape ensures a good coplanarity between bumps. Optical measurements performed through vertical focuses show a bump plus die coplanarity below 80 µm.

Typical product marking for the flat side is shown on Figure 3. (product example). The Flip Chip has a pin marker - A1 (see Figure 1) on both the flat side and the bump side so that the orientation of the component can be easily determined before and after assembly. The dots marked on the flat side and on the bump side have been designed so that they can be detected by standard vision systems.

Marking dimensions are linked to the die size.

Figure 3. Flip-Chip marking example for 5x5 bump matrix array.

Dot, ST logo

ECOPACK status xx = marking z = manufacturing location yww = datecode

(y = year

ww = week) When very small die sizes leave insufficient space, the ST logo and ECOPACK symbol are omitted from the marking.

xyxwz

3 Packing specifications and labelling description

Flip Chips are delivered in tape and reel to be fully compatible with standard high volume SMD components. The features of tape and reel materials are in accordance with EIA-481-D, IEC 60286-3 and EIA 763 (783) standards. All features not specified in this section are in accordance with EIA-481-D, IEC 60286-3 and EIA 763 (783) standards.

3.1 Carrier tape

Flip Chips are placed in the carrier tape with their bump side facing the bottom of the cavity so that the components can be picked-up by their flat side. No flipping of the package is necessary for mounting on PCB. The products are positioned in the carrier tape with pin A1 on the sprocket hole side. Carrier tape mechanical dimensions are shown in the example in

Figure 4. Standard tape width is 8 mm for die sizes smaller than 3 mm (dimension B0).

Note: 12 mm carrier tape width may be used for a larger die size to be in line with EIA standards.

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Packing specifications and labelling description AN1235

Figure 4. Tape dimensions for Flip Chips (650 µm thickness)

Dot identifying bump A1 location

A1 bump location may vary with product layout

2.0

0.20

4.0

Ø 1.55

1.75

1.24

8.0

0.73

Typical dimensions in mm

Table 1. Tape cavity sizing

Dimension

Die with both sides

smaller than or equal to 1.5 mm

A0 and B0 Die side size + 70 µm

yww

xxz

1.24

yww

xxz

User direction of unreeling

Die with one side larger than 1.5 mm

Cavity dimensions established to ensure that

component rotation cannot exceed 5° max.

4.0

yww

xxz

3.5

The cavities in the carrier tape have been designed to avoid any damage to the components. No hole is present in the cavity to avoid any impact or any external contamination to the solder bumps.

The embossed carrier tape is in a black conductive material (surface resistivity within 10E4 and 10E8 ohm/sq). Use of this material protects the component against damage from electrostatic discharge and ensures the total discharge of the component prior to placement on the PCB. Conductivity is guaranteed to be constant and not affected by shelf life or humidity. The material will not break when bent and does not have any residue to rub off, powder, or flake.

3.2 Cover tape

The carrier tape is sealed with a transparent, antistatic (surface resistivity within 10E5 ohm/sq and 10E11 ohm/sq) polyester film cover tape with a heat activated adhesive. The cover tape tensile strength is higher than 10 N.

The peeling force of the cover tape is between 0.08 N and 0.5 N in accordance with the testing method EIA-481-D and IEC 60286-3. Cover tape is peeled back in the direction opposite to the carrier tape travel; the angle between the cover tape and the carrier tape is between 165 and 180 degrees and the test is done at a speed of 120 ± 10% mm/minute.

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AN1235 Packing specifications and labelling description

3.3 Reels

The sealed carrier tape with the Flip Chip is reeled on seven-inch reels (see Figure 5. for reel mechanical dimensions). These reels are compliant with the EIA-481-C standard. In particular, they are made of an antistatic polystyrene material. Color of the reel may vary depending on supplier.

Dice quantity per reel is 5000 (with typical package thickness equal to 650 µm). In compliance with IEC 60286-3, each reel contains a maximum of 0.1% empty cavities. Two successive empty cavities are not allowed. Each reel may contain components coming from 2 different wafer lots.

Each reel has a minimum leader of 400 mm and a minimum trailer of 160 mm (compliant with EIA 481-C and IEC 60286-3 standards). The leader makes up a portion of carrier tape with empty cavities and sealed by cover tape at the beginning of the reel (external side). The leader is affixed to the last turn of the carrier tape by using adhesive tape. The trailer is at the end of the reel and consists of empty, sealed cavities (see Figure 6).

Figure 5. Seven-inch reel mechanical dimensions.

Material: ANTISTATIC POLYSTYRENE

ABCDE

180 max

All dimensions in mm

1.5 min 13

+0.5

-0.2 -0 -0.5

20.2 min

60 min

W1 (Hub)

+1.5

8.4

14.4 max

(external)

+2.5

8.4

Figure 6. Leader and trailer

End

To p cover tape

160mm min

Leader and trailer

Start

No components

Trailer

. 400mm min.

Components

Sealed with cover tape

User direction of feed

100mm min

No components

Leader

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