ST AN1233 APPLICATION NOTE

AN1233

Application note

LDMOS packages

Introduction

LDMOS technology recently implemented at ST is an important step forward, combining technological and environmental progress. In the basic LDMOS structure (Figure 1), a p- epitaxial layer is grown on an p-type substrate to form a larger drain region. An important consequence of this structure is that both the n+ source and the drain region are on the die surface, with the laterally diffused low resistance p+ sinker connecting the source region to the p+ substrate and source terminal. Wire-bonded connections which normally connect the source and the external circuitry (DMOS configuration) are no longer required, thus greatly reducing negative feedback due to the self-capacitance and inductance of the wires. This leads to higher gain at high frequencies. A further advantage of this structure is that an electrical insulator required to isolate the drain with DMOS transistors is no longer needed. Not only are electrical and thermal performances of the package improved, but beryllium oxide, a toxic compound, is also eliminated from the package. LDMOS package development offers higher dissipated power, cost reduction, and lower environmental impact.

July 2007

Rev 3

1/6

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ST AN1233 APPLICATION NOTE

LDMOS package structure

AN1233

 

 

1 LDMOS package structure

Figure 1. LDMOS cross section

In such a structure there is no need to electrically isolate the die from the flange as for bipolar die, by using a Beryllium Oxide (BeO) interface (Figure 1 and Figure 2). LDMOS package development eliminates any substances which could affect and/or deteriorate the environment. Because BeO is toxic, it is no longer used. The LDMOS die is soldered directly to the flange (for example, the tungsten-copper alloy flange) which results in better electrical and thermal performances.

Figure 2. LDMOS package structure

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