ST AN1230 Application note
AN1230
APPLICATION NOTE
LNB SUPPLY AND CONTROL VOLTAGE REGULATOR
(PARALLEL INTERFACE)
F. Lentini - G. Benenati
1. ABSTRACT
LNBP is the integrated solution for supplying/interfacing satellite LNB modules. It gives good
performances in a simple and economical way, with a minimum use of external components. It is
comprised of functions that realize LNB supplying/interfacing in accordance to the international
standards.
2. INTRODUCTION.
Figure 1: Basic Satellite Installation
LNB
Parabola
Coaxial
Cable
Satellite
To TV Set
Receiver
A typical satellite receiver system is formed by these blocks (reported in figure 1):
1. The parabola is the antenna of the system and focus es the sate llite s ignal to the LNB ;
2. The LNB (low noise block ) is placed on the focus of the parabola an d converts the incoming
signal in the 10GHz range to a lower frequency signal (in the 1-2GHz range) called "first
conversion signal". Th is a llows th e sig nal to be c arried b y an in expens ive c oaxial cable t owards
the receiver. Additionally, it improves the first conversion signal level by a built-in low noise
amplifier. A universal LNB can change the type of polarization (horizontal or vertical) or operative
band by command signals sent by the receiver;
3. The coaxial cable joins the LNB to the receiver and carries out 3 functions:
a) to transfer the first conversion signal from the LNB to the receiver;
b) to transfer the command signal s from t he receiver to th e LNB to change polarization or signal
band;
c) to carry the DC voltage to supply the LNB.
4. The receiver converts the first conversion signal into control signals for the TV system. The
receiver provides for that provides for two important features:
July 2000
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AN1230 - APPLICATION NOTE
a) to supply the LNB block;
b) to generate all the signals/voltages that LNB needs to operate correctly.
5. The supply/interface block is placed inside the receiver . It must perform the following functions:
a) be ready to accept future digital standards with an external modulation
input and fast oscillator
start-up;
b) implement the loop-through function in slave condition for single dish, multiple receiver
system;
c) accept the paralleling of 2 or more receivers and, in this condition. av oid the flow of reverse
current from the output to the GND;
d) give accurate, thermal compensated outputs with the possibility to compensate the DC
voltage drop caused by long coaxial cables;
e) be reliable;
f) provide overload (better if dynamic) and thermal protection with diagnostic;
g) avoid every type of trimming;
h) provide the possibility to be driven by a microcontroller or a simple digital logic to implement all
these functions;
i) Finally, it must be cheap and get a small area in the board.
All these functions are hard to be implemented with discrete components, but are greatly made easier by
using an integrated device, like LNBP, that has been specially designed for this purpose.
3. FUNCTIONAL BLOCKS.
LNBP comprises the following operative blocks (see figure 2):
Figure 2: Internal Block Diagram
Vcc1
Vc c 2
EN
ENT
VSE L
LLC
CE XT
OS EL
OL F
PRE RE G.
OSCI LLATO R
22KHz
OUT PUT VOLT
SELECTION
LINE LENGHT
COMPE NSAT ION
CURRENT LIMIT
OUT PUT POR T
SELECTION
REFERENCE
ERR.AMP.
THERMAL PROT.
CURR.AMP.
MI
LNBA
LNBB
EXTM
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AN1230 - APPLICATION NOTE
1. The oscillator is act ivated by putting t he ENT pin (En able Tone) = H and is factory trimmed at
22KHz ± 2KHz, avoiding the need to use external trimming. The rise and fall edges are
controlled to be in the 5 to 15µs range, 10µs typ., to avoid RF pollution towards the receiver. The
Duty Cycle is 50% typ. It modulates the DC output with a ± 0.3V amplitude and 0V average. The
presence of this signal usually gives the LNB information about the band to be received.
2. The OSEL (OUTP U T POR T SELECTION) selects the two outputs of the LNB (LNBA and LNBB),
in order to drive a dual-dish system, depending o n its present state. When O SEL i s L, the L NBA
port is selected. When OSEL is H, the LNBB port is selected. The LNBA and LNBB outputs
supply either 13V or 18V. If VSEL is low (VSEL = L) 13V is selected, otherwise, if VSEL is high
(VSEL = H) 18V is sel ected. This kind of feature chan ges the LNBP polarization type. The LNB
switches horizontal or vertical polarization depending on the supply voltage it gets from the
receiver.
3. In order to keep the power dissipation of the device low, the input selector automatically selects
Vcc1, that is the lowest input voltage, when 13 V out is selected (i.e. VSEL is L). If 18V out is
selected (i.e. VSEL is H), Vcc2 input is selected. So power dissipation at Iout=500mA is:
Pd=(22-18)*0.5=2W (with Vcc2=22V and Vout=18V) or (15-13)*0.5=1W (with Vcc1=15V and
Vout=13V). Without input selection we should have Pd=(22-13)*0.5=4.5W, which is much higher.
Moreover, an internal switch selects the MI (MASTER INPUT) to be transferred to the LNBA
when the EN pin is low. This case occurs when two receivers are connected in series and the
slave receiver (the nearest to the antenna) is disabled. The master receiver supplies the LNB by
means of the MI input of the slave receiver .
4. The line length compensation f unction is us eful when the antenna is connected to t he rec eiver
by a long coaxial cable that adds a considerabl e DC voltage drop. When the LCC pin is H, the
output voltage selected is increased by about 1V.
5. The reference drives all the internal blocks that require a high precision thermal compensated
voltage source.
6. The LNBP has two different protection features, and both turn off the outp uts. The first one a cts
in overload conditions (i.e. for output current ≥ 500mA), and the s econd f or overheating (i.e. for
Tamb ≥ 150°C).
a) The overload protection case occurs when output current request is ≥ 500mA. In this condition
the device limits the output current at 500mA for a time Ton dep ending on the Cext value.
When Ton has elapsed, output goes low for a time of Toff=15*Ton. This keeps the power
dissipated by the device low in overload conditions, and avoids to ov ersize the heatsink in
such a condition.
b) In the thermal protection case the output is disabled until the chip temperature has fallen. After
that the LNBP restarts working properly. The LNBA bypass switch is not protected, so the MI
input must be driven by a current limited voltage source.
Figure 3: LNBP Pin Grouping
INPUTS
CONTROL
SIGNAL
OSEL (L=LNBA, H=LNBB)
MI
Vcc2
Vcc1
EN (ACTIVE H)
LLC (ACTIVE H)
ENT (ACTIVE H)
VSEL (L=13V, H=18 V)
LNBP20CR
LNBA
LNBB
EXTM
CEXT
OLF
OUTPUTS
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AN1230 - APPLICATION NOTE
In figure 3 the LNBP pins are grouped by functions. The 5 control signals are logic inputs that control the
IC function, and it is recommended that the VIH not exceed 7V .
Cext controls the res tore timing of the overload protection. If an overload protection is p resent, output
goes low for a time imposed by the Cext value. At the same time the OLF pin, an open collector output,
goes low.
In figure 4 and figure 5 the behav ior o f Ton and Toff times vs. Cext is respectively shown. When Toff has
elapsed, the output retu rns ac tive f or a time Ton=Toff/1 5. The n, OLF returns a hig h im ped anc e ou tpu t. If
the overload is still present the cycle is repeated. This behavior greatly reduces the dissipation in the
device. In fact, in short circuit conditions with Vcc2=25 V, considering Iout internally limited at 650mA and
Toff=15*Ton we obtain: Pd average=V in*Iout*Ton/(Ton+Toff)=2 5*0. 65*1/(1+15)=1.02W, that is lower than
the power dissipated in normal conditions.
Figure 4: Overload Protection On Time versus C
Ton time vs. Cext
300
250
200
150
ton (ms)
100
50
0
0 5 10 15 20 25
CAPACIT OR Cext ( µF )
Figure 5: Overload Protection Off Time versus C
T off time vs. Cext
5,000
4,000
3,000
ext
ext
toff (ms)
2,000
1,000
0
0 5 10 15 20 25
CAPACI T OR Cext ( µF )
The Cext must be properly chosen. It is related to the Iout and Cout (total capacitor connected to the
LNBA or LNBB output) values. Large Cout values at start-up give high current peak for a long time, and
consequently, an overload condition for a time that could be great er than the Ton imposed by Cext. So
the output will be forced low, completely discharge and will not start. For proper use it is neces sary that
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AN1230 - APPLICATION NOTE
Cout/Cext ≤ 20. The OLF also gives information about the thermal protection status. If the thermal
protection is triggered, the output is disabled and the OLF goes low. When the chip temperature has
fallen, the output returns active and the OLF returns to its 3-state condition.
By sensing the O N/OFF ratio of the OLF signal, a microcontroller can discrimina te if an overload or a
thermal protection is present.
EXTM modulates the Vout by a capacitor connected in series (see figure 6). In this case:
Vout a.c.=Vin a .c.*Vout d.c./3 where, respectively, Vout a.c. and Vin a.c. are alternate components of
Vout and Vin, and Vout d.c. is the direct com ponent of Vout. For example, if an a.c. signal of 600mV p.p.
must be imposed to the 13V d.c. out, the formula is as follows:
Vin a.c.= 3*Vout a.c./Vout d.c.=3*600/13 ª140 mV p.p. If we dispose a 0-5V square wave signal to
modulate output voltage, it is necessary to lower this signal amplitude. In accordance to figure 7 we have:
R1=R2*(V1/Vin-1).
Figure 6: How t o Us e EX T M In pu t
External
Modulation
Input
Vin
Cin = 10µF
EXTM
LNBP
Figure 7: How to Adjust the External Modulation Level
External
Modulation
Input
Cin = 10µF
R1
V1
R2
Vin
LNBA
or
LNBB
EXTM
LNBP
LNBA
or
LNBB
Vout
Vout
R2 must be i n the 50Ohm rang e to minimize the effects of the EX TM input resistance variat ions. In our
example we obtain:
R1=50*(5/0.14-1)=1.7kOhm.
As a side effect, the EXTM modifies the Vout by a resistor connected between this input and the GND.
Figure 8 and 9 report the Vout value vs. R.
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AN1230 - APPLICATION NOTE
Figure 8: Vout Value vs. Resistance on the EXTM pin at VSEL = L
Vout value vs. Resistance
15.00
14.50
Vcc1= Vcc2 = 24V
14.00
13.50
13.00
12.50
OUTPUT VO LTAGE (V)
12.00
10K 4.7K
∞
2.2K
Resistance (Ohm)
Ta=+25°C
1K1.5K 680 470 330 220 150 100 47 0
Figure 9: Vout Value vs. Resistance on the EXTM pin at VSEL = H
Vout value vs. Resistance
20.50
20.00
Vcc1= Vcc2 = 24V
19.50
Figure 10: LNBP Output Stages
MI
Vcc2
22V TO 25V
Vcc1
15V TO 25V
19.00
18.50
18.00
OUTPUT VOLTAGE (V)
17.50
10K 4.7K2.2K 1K1.5K 680 470 330 220 150 100 47 0
∞
Ta=+25°C
Resistance (Ohm)
D
SW1
TR1
S
G
TR2
TR3
LNBA
13V OR 18V
LNBB
13V OR 18V
TR4
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TR5
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