ST AN1213 APPLICATION NOTE

AN1213

APPLICATION NOTE

TDE1707 NOISE IMMUNITY, SH ORT CIRCUIT AN D REVERSE

OUTPUT PROTECTION CHARACTERISATION

by Matteo Uccelli

The TDE1707 is a power switch ( I.P.S) especially dedicated to proximity detectors. For the characteristics
of the I.P.S. please refer to the data sheet and AN485.
Since the device oper ates in Industrial environment, it i s very important a good noi se immunity. The overload
(up to short circuit) and the output reverse connection hardiness are also key point for a device used in this
applications.

EMC testing.

This Evaluation section describes the noise immunity results. For reference, the test has been done as compar­ison between the TDE1707-B , improved version and the previous one (Old version).
All of the statements regarding burst immunity refer to measurements done in ESALI (European System Appli­cation Lab Industrial).
The application laboratory is provided with an appropriate testing bench realised basing on directives contained
in IEC 801/4 normative.
The correlated instrumentation consists of :

- Key Tek ( Thermo Voltek ), CE MASTER EMC immunity test system : surge and burst generator.

- Tektronix TM502 : current probe

- GOULD Data SYS 944 MHz - 500 Ms/sec : digital storage oscilloscope

- Laboratory Power Supply PS-2403 : power supply
The behaviour of the dev ice was m onitored with a current probe on the load, which seems to have less influence
on the measurements. Anyway it is important to pay attention because even when using a current probe it is
really easy to couple additional noise, and of course the result consists in the achievement of lower immunity
levels than the right ones: the fast transients should be coupled only thanks to the capacitive coupling clamp.
For the same reason caution is mandatory regarding the power supply: this one should not be directly affected
from the burst generator . Additional coupling becomes easier and easier as the burst voltage increases: par­asitic antennas becomes more efficient.

Table 1. IEC 801/4, limiting values of burst impulses

severity test voltage on signal line

42kV
31kV

20.5kV
1 0.25kV

Testing configuration:

Old ( TDE 1707) and new ( TDE 1707 Rev. B ) silicon have been tested and compared regarding fast transient
( burst ) immunity. This testing was performed on several layouts taking care to operate in the same test con­ditions.

December 1999

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AN1213 APPLICATION NOTE

The input pin was connected to Vreg tanks to a 4,7 kOhm resistor (R1), the device was supplying a 220 Ohm
resistor (R2)
The cable to the load was a flat , parallel wires,2 m long cable. Tests were performed with a power supply volt­age varying between 18 and 30 V. Capacitors C4, C2 and C3 were smd ceramic capacitors, C1 was a ceramic
no-smd capacitor (smd capacitor for C1 gives no benefits). On Vcc (C4) a 100nF was used , while on Vreg
(C2) a 10nF was adopted, this for all of the tests.

Figure 1. Bench exemplification

Auxiliary

Equipment

Burst

Generator

Ground reference plan

Load

Capacitive coupling clamp

Insulation Support

Signal and

supply

lines

EUT

Figure 2. Application schematic

+V

U1

5
6
3

4

TDE1707

In
Vrg
CAP
GND

Vss

LSO

LD

HSO

7
8

D1

1
2

LED

R2
C3
x

220

C4
100nF

R1

4.7 k

C2
10nF

C1
x

Typically a burst exceeding the tolerance level causes the output transistor to switch off even if the input has
not changed its high state.

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AN1213 APPLICATION NOTE

Figure 3. Spurious transition of the output transistor due to burst pulse

TDE 1707 ( old silicon ):

the value of the delay capacitor (C1) does not influence the immunity level of the
device. The device behaves exactly the same whatever it is the value of the capacitor. Without any other ca­pacitor than the two on Vcc ( C4 ) and on Vreg ( C2 ) the device shows an immunity level of +300 / -800. The
immunity can improve if it is adopted a capac itor on the output ( C3 ). This capacitor has the same effec t when­ever it is connected between ground and output or Vcc and output. With C3=1 nF the immunity level is +1400
/ -2500 V, C3=10 nF bring to an immunity level higher than +2500 /-2500.

TDE 1707 Rev. B ( new silicon ):

placing the delay capacitor (C1) result s in loweri ng the fast transi ent immu­nity , which is anyway higher than the one acquired in the same conditions with the old silicon. In fact without
capacitor on pin 3 the device is working correctly even with +2500 / -2500 V of burst voltage. This value is
strongly reduced w hen a delay capac itor is adopted: with C1 = 470 pF, i mmunity drops to +600 / -1500 V. The
same for higher values of C1 ( ex: 3.3nF ). Even with TDE1707 rev.B it is very useful to filter the output and 1
nF between ground and output (C 3) or between Vcc and output it is sufficient to gain the correct operating of
the device with a burst amplitude of +2500 / -2500.

Layout:

anyway it must be underlined the importance of the layout . To gain the highest levels of immunity it is
important to provide an accurate layout for the ground. Star connecti on is recommended for the ground connec­tions of the capacitors on Vcc and Vreg.

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