ST AN1088 Application note

AN1088

®	APPLICATION NOTE

L6234 THREE PHASE MOTOR DRIVER

by Domenico Arrigo

INTRODUCTION

The L6234 is a DMOSs triple half-bridge driver with input supply voltage up 52V and output current of 5A. It can be used in a very wide range of applications.

It has been realized in Multipower BCD60II technology which allows the combination of isolated DMOS transistors with CMOS and Bipolar circuits on the same chip. It is available in Power DIP 20 (16+2+2) and in Power SO 20 packages.

All the inputs are TTL/CMOS compatible and each half bridge can be driven by its own dedicated input and enable.

The DMOS structure has an intrinsic free wheeling body diode so the use of external diodes, which are necessary in the bipolar configuration, can be avoided. The DMOS structure allows a very low quiescent current of 6.5 mA typ. at Vs=42V , irrespective of the load.

DEVICE DESCRIPTION

The device is composed of three channels. Each channel is composed of a half bridge with two power DMOS switches ( typ. Rdson of 300mW @ 25°C) and intrinsic free wheeling diodes. Each channel includes two TTL/CMOS and uP compatible comparators, and a logic block to interface the inputs with the drivers. The device includes an internal bandgap reference of 1.22V, a 10V voltage reference to supply the internal circuitry of the device, a central charge pump to drive the upper DMOS switch, thermal shutdown protection and an internal hysteretic function which turns off the device when the junction temperature exceeds approximately 160 °C. Hysteresys is about 20 °C.

Figure 1. L6234 Block Diagram

					C4 220nF
C3	C5
10nF	1 F				D2
VCP	VREF	VBOOT			1N4148
					D1
CHARGE		VREF	Vs		1N4148
					Vs
PUMP		10V
IN1			Vs	C2	C1
			T1	100nF	100 F
			OUT1
EN1			T2		BRUSHLESS
					MOTOR
					WINDINGS
IN2			T3
			OUT2
EN2			T4
THERMAL			SENSE1
PROTECTION
IN3			T5
			OUT3
EN3			T6
			SENSE2
		GND			RSENSE
			D98IN940A

April 2001

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AN1088 APPLICATION NOTE

PIN DESCRIPTION.

Figure 2.

Vs ( INPUT SUPPLY VOLTAGE PINS).

VS

These are the two input supply voltage pins. The unregulated

input DC voltage can range from 7V to 52V.

T1

T3

With inductive loads the recommended operating maximum

ON/OFF

ON

VF

supply voltage is 42V to prevent overvoltage applied to the

L

B

OFF

DMosfets. In fact considering a full bridge configuration (see

-VF

C

(VS+VF)

fig. 2), when the bridge is switched off (ENABLE CHOPPING)

the current recirculation produces a negative voltage to the

ON/OFF

source of the lower DMOS switches (point A). In this condi-

T2

A

T4

tion the drain-source voltage of T1 and T4 is VS + VF + Vsense .

S

-VSENSE

Dinamically VF can be same Volts depending on the current

Rsense

slope, dI/dt, and also Vsense, depending on the parasitic in-

ductance and current slope can be some Volts. So the drain-

D98IN938A

source voltage of T1 and T4 DMOS switches can reach more

than 10V over the VS voltage. The input capacitors C1 and C2 are chosen in order to reduce overvoltage due to current decay and to parasitic inductance. For this reason C2 has to be placed as closed as possible to VS and GND pins.

The device can sustain a 4A DC input current for each of the two Vs pins, in accordance with the power dissipation.

OUT1, OUT2, OUT3 (OUTPUTS). These are the output pins that correspond to the mid point of each half bridge. They are designed to sustain a DC current of 4A.

SENSE1, SENSE2.

SENSE1 is the common source of the lower DMOS of the half bridge 1 and 2.

SENSE2 is the source of the lower DMOS of the half bridge 3.

Each of these pins can handle a current of 5A.

A resistance, Rsense, connected to these pins provides feedback for motor current control.

Care must be taken with the negative voltage applied to these pins : negative DC voltage lower than -1V could damage the device. For duration lower than 300ns the device can sustain pulsed negative voltage up to -4V.

For example, if enable chopping current control method is used, negative voltage pulses appear to these pins, due to the current recirculation through the sensing resistor.

Vref ( Voltage Reference).

This is the internal 10V voltage reference pin to bias the logic and the low voltage circuitry of the device. A 1μF electrolytic capacitor connected from this pin to GND ensures the stability of the DMOS drive circuit. This pin can be externally loaded up to 5mA . Figure 3 and 4 show the typical behavior of the Vref pin.

Vcp ( CHARGE PUMP ).

This is the internal oscillator output pin for the charge pump.

The oscillator supplied by the	10V Voltage Reference
switches from GND to 10V	with a typical frequency of

Figure 3. Reference Voltage vs. Junction Temperature.

Vref [V]

11
10						Vs = 52V
9						Vs = 24V
8						Vs = 10V
7
6						Vs = 7V
5
4
3
2
1
0
-50	-25	0	25	50	75	100	125	150
				Tj [°C]

Figure 4. Reference Voltage vs. Supply Voltage.

Vref [V]

12

10

8

6

4

Tj = 25°C

2

0

0	10	20	30	40	50
			Vs [V]

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AN1088 APPLICATION NOTE

1.2MHz (see fig 4). When the oscillator output is at ground , C3 is charged by Vs through D1. When it rises to 10V, D1 is reverse biased and the charge flows from C3 to C4 through D2, so the Vboot pin after a few cycles reaches the maximum voltage of Vs + 10V - VD1VD2.

Vboot ( BOOTSTRAP).

This is the input bootstrap pin which gives the overvoltage necessary to drive all the upper DMOS of the three half bridges (see fig 5).

Figure 5. Charge Pump Circuit.

					Vs
Vs+Vref-VD1			Vs+Vref-VD1-VD2	C2	C1
				0.1μF	100μF
Vs-VD1	D1
	1N4148
f=1.2 MHz
	D2		C4
	C3 1N4148		0.22μF
VCP	10nF		VBOOT	Vs
	Vref
			HIGH		OUT
	f=1.2 MHz		SIDE
			DRIVER
CHARGE		Vref			SENSE
PUMP		10V

LOGIC INPUTS PINS.

EN1, EN2, EN3 (ENABLES).

These pins are TTL/CMOS and μP compatible. Each half bridge can be enabled by its own dedicated pin with a logic HIGH. The logic LOW on these pins switches off the related half bridge (see Fig. 6). The maximum switching frequency is 50kHz.

Figure 6. Control logic for each half bridge.

Figure 7. Cross Conduction Protection.

INPUT	high level		high level
low level		low level
			time
high level	high level
ENABLE
		low level	low level
			time
UPPER	DMOS ON
DMOS
DMOS OFF		DMOS OFF	DMOS OFF
			time
DMOS ON
LOWER	DMOS OFF	DMOS OFF	DMOS OFF
DMOS
			time
IN1, IN2, IN3 (INPUTS).

	high level
INPUT
PIN
low level		low	level
			time
UPPER	DMOS ON
DMOS
DMOS OFF			DMOS OFF
	tdelay	tdelay	time
	300ns
DMOS ON		300ns	DMOS ON
LOWER	DMOS OFF
DMOS
			time

These pins are TTL/CMOS and μP compatible. They allow switching on the upper DMOS ( INPUT at high logic level) or the lower Dmos (INPUT at low logic level) in each half bridge (see Fig. 6).

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AN1088 APPLICATION NOTE

Cross conduction protection (see Fig. 7) avoids simultaneously turning on both the upper and lower DMOS of each half bridge. There is a fixed delay time of 300ns between the turn on and the turn off of the two DMOS switches in each half bridge. The switching operating frequency is up 50kHz. High commutation frequency permits the reduction of ripple of the output current but increases the device’s power dissipation, however low commutation frequency causes high ripple of the output current. The switching frequency should be higher than 16kHz to avoid acoustic noises.

The sink current at the INPUTS and ENABLES pins is approximately 30mA if the voltage to these pins is at least 1V less than the Vref voltage (see Fig. 3 and Fig. 4). To avoid overload of the logic INPUTS and ENABLES , voltage should be applied to Vs prior to the logic signal inputs.

POWER DISSIPATION

An evaluation of the power dissipation of the IC driving a three phase motor in a chopping current control application follows.

With a simplified approach it can be distinguished three periods (see Fig. 8) :

Figure 8.

	Tchop
Ipk
		Iload
	Ival
Trise	Tload	Tfall

Rise Time, Tr, period.

This is the rise time period, Tr, in which the current switches from one winding to another. In this time a DMOS is switched on and the current increases up to the peak value Ipk with the law i(t) = (Ipk/Tr) t. The energy lost for the rise time in the period T is :

Erise = òTr	Rdson × i2(t)dt = Rdson × I2pk × Tr
0	3

Fall Time,Tf, period.

When the current switches from one winding to another, there is a fall time in which the current that flows in the intrisic diode of the DMOS decreases from Ipk to zero. If VD is the voltage fall of the diode, the energy lost is :

Efall = òtf VD(t) × i(t)dt

0

Tload

During this time the current that flows in the winding is limited by the chopping current control. The energy dissipated due to the ON resistance of the DMOS is :

Eload = Rdson × (Irms)2 × Tload

In the formula, Irms is the RMS load current, given by :

Irms = Ö```````(Iload)2 + æIpk````- Ivalö2

ç Ö``3 ÷ è ø

and Iload is the average load current.

When the switch is ON, the energy dissipated due to the commutation of the chopping current control in

the DMOS can be assumed to be:

Eon = Vs × Ival × tcom 2

where tcom is the commutation time of the DMOS switch.

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AN1088 APPLICATION NOTE

When the switch is OFF :

Eoff = Vs × Ipk × tcom 2

The energy lost by commutation in a chopping period, given by Eon + Eoff, is :

Ecom = Vs × Iload × tcom

The energy lost by commutation during the Tload time is given by :

Ecom = Vs × Iload × tcom × Tload × fchop

Quiescent Power Dissipation, Pq.

The power dissipation due to the quiescent current is Pq = Vs × Iq , in which Iq is the quiescent current at the chopping frequency, fchop = 1/Tchop.

Total Power Dissipation.

Let’s evaluate the power dissipation of the device driving a three phase brushless motor in chopping current control. In the driving sequence only one upper DMOS and a lower one are on at the same time (see fig. 9 and 10). The total power dissipation is given by :

Ptot = 2 × (Erise + Efall + Eload + Ecom) + Pq

T

Figure 11 shows the total power dissipation, Pd, of the L6234 driving a three phase brushless motor in input chopping current control at different chopping frequency.

EVALUATION BOARD.

The L6234 Power SO20 board has been realized to evaluate the device driving, in closed loop control, a three phase brushless motor with open collector Hall effect sensors.

Figure 9. Input chopping current circulation.

_

PHASE 12 CHOPPING INPUT

I1A	half bridge 1	Vs	half bridge 2

			ILOAD
		I1A
	ON/OFF
	OUT1
	OFF/ON		ILOAD
		I1B	I2B
I1B
			IOFF

OFF

OUT2

ON

I2B

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