ST AN1049 Application note

AN1049

®

APPLICATION NOTE

MINIMIZE POWER LOSSES OF LIGHTLY LOADED FLYBACK

CONVERTERS WITH THE L5991 PWM CONTROLLER

by Claudio Adragna

The L5991 PWM controller is particularly suitable for SMPS of equipment that must comply with standards concerning energy saving. The device, optimized for fly back topology, monitors the power demanded by the load and changes the operating frequency of the converter accordingly: high frequency at heavy load, low frequency at light load.

In this way, power losses dependent on frequency are reduced at light load maintaining, at the same time, the advantages offered by a high switching frequency at heavy load.

The frequency reduction is very helpful but is not the only means needed to minimize power losses. This note surveys the above mentioned f unctionality of t he L5991 (called "Standby" f unction) as well as the most significant points to consider in order to achieve the goal of a very efficient lightly loaded flyback.

INTRODUCTION

The minimization of the power drawn from the mains under light load conditions (Standby, Suspend or some other idle mode) is an issue that is recently becoming of great interest, above all else because new and more severe standards are coming into force.

This is already well-established in the area of computer monitors, where norms define precisely the various idle modes and the relevant maximum consumption admitted, but m ore and more often p ower supplies for other pieces of office equipment (i.e. printers, photocopiers, fax machines, AC-DC adaptors, etc.), are required to accomplish with specifications concerning energy saving.

Figure 1. L5991 Internal Block Diagram

17V

VREF

48151

9

C

V

10

OUT

11

PGND

5

STANDBY

+

-

VFB

RCT

DC

DIS

ST-BY

ISEN

SS

2

3

14

16

13

1.2V

7

2.5V

+

-

+

STANDBY

OVER CURRENT

+

-

DIS

VREF

BLANKING

1V R

SYNC

TIMING

T

PWM

DC-LIM

FAULT

SOFT-START

2R

12

SGND

21V

10V

V

VREF OK CLK DIS

CC

+

-

SQ R

6

COMP

PWM

UVLO

Vref

-

2.5V

E/A

+

2.5/4.0V

Anyway, minimizing the power wasted by a lightly loaded switch-mode converter is a demanding challenge for power supply designers and, to achieve the goal, an appropriate design strategy is required.

March 2000

1/24

AN1049 APPLICATION NOTE

The key point of this strategy is a low switching frequency. It is well-known that many of the power loss sources in a lightly loaded flyback waste energy proportional ly to the switching frequency, hence this should be reduced as much as possible. On the other hand, it is equally well-known that a low switching frequency leads to bigger and heavier magnetics and makes filtering more troublesome.

It is then desirable to make the system operate at high frequency under nominal load condition and to reduce the frequency when the system works in a low-consumption mode. This requires a special functionality of the controller: it should be able to recognize automatically the condition of light or heavy load and should adequate its operating frequency accordingly.

The L5991 PWM controller, with its "Standby function", meets exactly this requirement. The function is optimized for flyback topology: in fact, power supply of office equipment lies most often in the mediumlow power range, where flyback topology features the lowest cost/performance ratio and is, therefore, the favorite one.

However, the goal of power losses minimization cannot be achieved with only a simple reduction of the switching frequency. Although the most important, this is only one of the numer ous points of a wideranging strategy that must be looked into on the whole.

This application note is composed of two distinct parts. The first part deals with the L5991, describes the operation of the "Standby function" in detail and states several relationships useful for the design. The second one provides an overview of the points to be considered in the above mentioned strategy, as well as a number of tips that can be helpful.

1) DESIGNING WITH THE L5991 PWM CONTROLLER The L5991

The device, whose internal block diagram is shown in fig. 1, is based on a standard "peak" current mode PWM controller, such as the UC384x family, with the addition of numerous ancillary features among which Standby function is the most noticeable.

The L5991, which is available in DIP16 and SO16N packages, features the following characteristics:

;

7.0mA typ.

10.0mA max. 12mA typ.

17mA max.

yes

no

Very low start-up current (75 µA typ. - 120 µA max.) low quiescent current (7 mA typ. - 10 mA max.)

internal reference with 1% precision guaranteed (@ Tj=25°C); high current capability, large bandwidth, high slew-rate error amplifier; high-speed current loop (< 100 ns delay to output); high current capability totem-pole output for MOSFET or IGBT drive;

Standby function

; IN/OUT synchronization; precise maximum duty cycle control; programmable soft-start 100 ns Leading Edge Blanking on current sense for increased noise immunity; overcurrent protection with soft-start intervention; latched disable function;

All these characteristics are described in detail in the datasheet of the dev ice. In this context, however, it is worth emphasizing the low current consumption of the device, both before start-up and when running. Along with the standby function, the low consumption turns out to be particularly useful for minimizing losses.

Table 1 compares these characteristics with the UC384XA/B family.

Table 1. L5991 vs. UC384XA/B family

CONTROLLER START-UP CURRENT QUIESCENT CURRENT STANDBY FUNCTION

L5991 75µA typ.

UC384XA/B 300µA typ.

120µA max.

500µA max.

2/24

AN1049 APPLICATION NOTE

The L5991 can be used in off-line SMPS’ with any single-ended topology. However, i ts features make the device particularly useful for power supplies based on flyback topology for office equipment that must comply with standards concerning energy saving. Monitor displays, printers, photocopiers, scanners and fax machines are the most noticeable examples.

Standby function description

The L5991 automatically detects a light load

Figure 2.Standby function dynamic operation.

condition for the converter and decreases the oscillator frequency on that occurrence. The normal (higher) oscillation frequency is automatically resumed when the output load builds up and exceeds a defined t hreshold. This functionality is called "Standby function".

Like in every "peak" current mode controller, t he output voltage (V

) of the Error Amplifier

COMP

(E/A) of the device moves depending on the power drawn from the mains (see Appendix "Peak Current Mode Control Basics"). The basic principle of the Standby is then monitoring the E/A output .

Normal operation

NO

P

SB

P

1234

V

1

T

Stand-by

V

VCOMP

osc

f

SB

f

2

T

If the peak primary current decreases as a result of a decrease of the power demanded by the load

will decrease as well. If this falls below a fixed threshold (VT1), the oscillator, which was working

V

COMP

, will be forced to work at a lower value (fSB). The frequency drop, however, implies a sudden in-

at f

osc

crease of the peak primary current and, therefore, of V vent the frequency from s witching back to f

> VT1) in order for the oscillator frequency to be reset at f

(V

T2

. In fact, V

osc

. Some hysteresis will be necessary to pre-

COMP

will have to exceed a second threshold

COMP

. The hysteresis (VT2-VT1) will be large

osc

enough to prevent the above mentioned undesired phenomenon. This operation is shown in fig. 2. Fig. 3 shows how the function is implemented internally. Only one pin (ST-BY, 16) is required and is

used to connect an external r esistor (R

) to the oscillator pin (RCT, 2). In this way, both the nor mal and

B

the standby frequency are externally programmable. The capacitor C

mal operation (fosc). In fact, as long as the the reference voltage VREF by a N-channel FET (see fig. 3), thus the timing capacitor C

and the resistor RB, along with RA, set the operating frequency of the oscillator in nor-

T

STANDBY signal is high, the pin is internally connected to

is charged

T

through RA and RB. When the STANDBY signal goes low the N-channel FET is turned off and t he pin becomes floating. R frequency (f

) will be lower.

SB

is now disconnected and CT is charged through RA only. In this way the oscillator

B

Figure 3. Standby function internal schematic and operation

COMP 6

5

FB VREF

+

2.5

66KΩ

+

-

2.5/4

STANDBY BLOCK

ISEN

13

2R

R

+

-

10V

LEVEL SHIFT

R

STANDBY

DRIVER

CUT

RCT

STANDBY

HIGH

LOW

RAR

B

C

T

D97IN752A

2.6V

V

T1

V

T2

COMP

4V

4

ST-BY

16

2

The oscillation frequency can be estimated with the following approximate relationships:

f

osc

≈

C

T

⋅ (0.693 ⋅ (R

1

⁄

A

RB

) +

(1),

K

)

T

3/24

AN1049 APPLICATION NOTE

which gives the normal operating frequency, and:

≈

f

SB

C

⋅ (0.693 ⋅ RA + K

T

1

(2)

)

T

which gives the s tandby operating frequency, that is the one t he converter will operate at when lightly loaded. In the above expressions, R

and K

, defined as:

T

// RB mean s:

A

⁄

R

A

90, V



K

=

T



160, V



=

⁄

RB

RA + R

= VREF

15

= GND/OPEN

15

R

⋅ R

A

B

(3),

B

(4)

is related to the duration of the falling-edge of the sawtooth. I n case V15 is connected to VREF, however, the switching frequency will be a half the values resulting from (1) and (2).

Fig.3 shows also the comparator with hy ster esis t hat recognizes the load condition of the converter. The thresholds V

and VT2 are internally fixed at 2.5 V and 4 V respectively (typical values). With reference

T1

to Fig. A1 in Appendix, the peak voltages on the current sense pin of the L5991 (ISEN, 13) relevant to

and VT2 are:

V

T1

− 2 ⋅ V

V

cspk1

cspk2

=

V

T2

T1

3

− 2 ⋅ V 3

2.5 − 2 ⋅ 0.7

f

=

4.0 − 2 ⋅ 0.7

f

=

= 0.367V (5)

3

= 0.867V (6).

It is more convenient to refer to the thresholds V

cspk1

and V

(rather than VT1 and VT2), because they

cspk2

can be immediately related to the peak input current. Although having fixed thresholds may seem a lack of flexibility, in reality it is possible to adjust the thresholds in terms of input power level, if needed, by adding a DC offset voltage (V

) on the current sense pin.

O

Standby Operation Analysis

In this context, flyback converters are c lassified as stated in the appendix "Flyback Basics". Another assumption is that the delay to output of the L5991 is compensated, thus the offset voltage Vo is intended as the amount exceeding the value needed for compensation (see Appendix "Peak current mode control Basics"). This analysis does not take other non- idealities into consideration, thus the results are approximate.

Please refer to the appendix for an explanation of symbols, terminology and formulas. When V

= VT1, that is on the boundary of the standby mode, the peak input current is equal to:

COMP

− V

I

ppk1

=

V

cspk1

R

s

0.367 − V

o

=

o

(7),

R

s

corresponding to the standby inp ut power which, under the assumption of DCM (Discontinuous Conduction Mode) operation, can be expressed as:

0.367 − V

P

inSB

=

1

⋅ Lp ⋅ f

2

osc

⋅

 

R



The standby power can be expressed also in t erms of the maximum input power (P the sense resistor R vant to P

inmax

:

, which is selected so as to limit the peak primary current at the value (I

s

2



o

(8).



s



). This is set by

inmax

ppkmax

) rele-

4/24

1 − V

I

ppkmax

o

= (1 − V

o

R

=

s

√

) ⋅

2 ⋅ P

L

⋅ f

p

osc

(9).

inmax

AN1049 APPLICATION NOTE

By substituting (9) in (8) it is possible to obtain:

o

) ⋅

o

2



(10).

 

√

P

SB

inmax

⋅

f

√

osc

f

SB

(11).

inmax



⋅



1 − V



The frequency change f

P

= P

inSB

⇒ fSB pushes flyback into a deeper DCM operation and causes a sudden in-

osc

0.367 − V

crease of the peak primary current (since the input power does not change). As a result, the peak voltage on current sense will jump from V

V

’ cspk1

= Vo + Rs ⋅

√

cspk1

2 ⋅ P

LP ⋅ f

to:

SB

= Vo + (1 − V

SB

This value must be <V the operating frequency to switch back and forth between f

not to exceed the hysteresis of the int ernal comparator, which would cause

cspk2

and fSB. This constraint sets a maximum

osc

limit on the frequency change:

f

osc SB

0.867 − V



<



0.367 − V



Provided equation (12) is fulfilled, the input power (P

⇒ f

sumed (f

SB

) will be:

osc

P

inNW

1

=

⋅ Lp ⋅ fSB ⋅

2



o

(12).



o



) at which the normal operation frequency is re-

inNW

0.867 − V

 

R



2



o

(13)



s



which, considering position (9), can be also expressed in the following terms:

P

inNW

= P

inmax



⋅



1 − V



o

0.867 − V

Figure 4. Circuit for the adjustment of the

standby thresholds.

R

= Vref

V

o

R + Rc

Vref

4

10

Rc

R

C

Rs

12

L5991

13

11

2



f

SB

⋅

f

osc

= P

 

inSB

0.867 − V



⋅



0.367 − V



The inspection of equations (8)...(14) shows that adding an offset V and P

inNW

/ P

(with respect to the values with Vo = 0). This is equivalent to lowering the internal thresholds

and VT2. The effect will be more pronunciated

V

T1

than on VT2. In practice, the internal thresh-

on V

T1

olds have been fixed at the maximum value able to allow high enough a frequency jump, with a certain margin, leaving to an external circuit (like the one shown in fig. 4) the duty of the adjustment, if necessary.

Referring now to MCM ( M ix ed Conduction Mode) and

2



o

⋅



o



lowers the ratios P

o

and raises the limit of f

inmax

CCM (Continuous Conduction Mode) systems, the peak voltage on the current sense pin is given by:

f

SB

(14).

f

osc

inSB/Pinmax

/ f

osc

SB

where Z

=

V

cspk

is to be evaluated at fsw = f

E



+ Rs ⋅

V

o

  

Vo + Rs ⋅



osc

P

 

V



√

or fsw = fSB, depending on the operating mode. At the transition

in

+

E

2 ⋅ P

Z

E

V



E

P



2 ⋅ Z

E



in

Pin > P

CCM ↔ DCM the peak voltage on the current sense pin will be:

V

= Vo + Rs ⋅

cspkT

E

(16).

Z

E

in

> P

inT

(15)

inT

5/24

AN1049 APPLICATION NOTE

If the sense resistor Rs is selected as follows:

1 − V

o

I

ppkmax

o

). It will assume its minimum value at minimum mains volt-

osc

):

= Vo + (1 − V

(with Z

(with P

evaluated at fsw = f

E

and P

inT

age (that is, @ V

), the peak voltage on the current sense pin at transition will be given by:

osc

V

cspkT

evaluated at fsw = f

inTmin

= V

E

Emin

⇒ P

V

R

=

s

= Vo + (1 − V

= P

inT

inTmin

cspkTmin

Table A2 in appendix shows that in MCM systems (for which P P

does not exceed 3.31 in practical cases. This means that also P

inTmin

As a result, the transition from CCM to DCM will occur at V

=

) ⋅

P

V

1 − V

inmax

Emin

V

E

Emin

o

) ⋅

⋅

+

V 2 ⋅ Z

P

inmax

1 +

o

(17).

Emin

E

2 ⋅ P

inT

+ P

2

P

inmax

P

inTmin

values that do not exceed 2 / (1+3.31) =

cspk

(18),

inTmin

(19).

≤ P

inmax

≤ P

/P

) the ratio P

inTmax

will not exceed 3.31.

inTmin

inTmax

464 mV (when Vo = 0, and even larger values when Vo > 0). In the end, since V

= 367 mV, when the L5991 activates the standby frequency MCM systems are

cspk1

operating in DCM. The s tandby input power will then be found once more from equation (8) which, accounting for (17) and after some manipulations, yields:

P

inSB

inmax

=



1

⋅



4



0.367 − V 1 − V

o

2



o

 

⋅



1 +

 

P

inmax

inTmin

2

P



inTmin

⋅

 

P

inmax

(20).

Besides, all the considerations leading to equation (12), as well as equation ( 12), still apply. This will always be true if V

cspkTmin

is greater than V

, that is if the ratio P

cspk1

inmax

/P

is such that:

inTmin

/

(= 4.45 for V

P

inmax

P

inTmin

= 0), which includes also a class of CCM systems. In practice, the above equations apply

o

1.633 − V

≤

0.367 − V

o

(21)

o

to the large majority of common flyback designs. Once the system is in standby mode, in equations (15) Z

ZE’. This will modify also P

inT

, P

inTmin

and V

: they all increase and become P

cspkT

must be evaluated for fsw = fSB, becoming

E

respectively. When V

, the system can be working either in DCM or CCM, depending on th e f

f

osc

is, on the input voltage). In other words, it depends on whether V

cspk

=V

, that is when the input power is P

cspk2

and the frequency is to be switched back to

inNW

is greater or less than V

cspkT’

possible to find that if the following condition:



1 +

 

P

inmax

inTmin



(22)

 

is fulfilled, then V

cspkT’

>V

cspk2

The right side of (22), for V cal cases the f

/ fSB ratio will not be less than 2, it is possible to leave out the case of CCM operation.

osc

f f

osc

SB

≥

0.867 − V

1

⋅

2

1 − V

V

o

Emin

⋅

o

⋅

V

E

and the system will be working in DCM.

= 0, is top limited at 1.87 in MCM systems. Considering that in most practi-

o

This makes things easier because there would be also a dependence of P In the end, P

6/24

will be given again by equation (13) which, rearranged more conveniently, becomes:

inNW

P

inNW

inmax

=



1

⋅



4



0.867 − V 1 − V

o

2



o

 

⋅



1 +

 

P

inmax

inTmin

2

P



inTmin

⋅

 

P

inmax

⋅

f

, P

inT’

inTmin’

/ fSB ratio and on VE (that

osc

on VE.

inNW

f

SB

(23)

osc

and V

cspk2

cspkT’

. It is

f

AN1049 APPLICATION NOTE

The inspection of equations (15)...(23) shows that also in MCM systems the effect of the offset Vo is the same as in DCM systems. Furthermore, the internal thresholds V of applications can be covered without any external adjustment.

and VT2 are such that a large range

T1

Standby func tion setup

It is difficult to out line a general procedure for the use of the L5991’s standby function because the constraints of a specific design may be of different types and are not known in advance. It is possible, however, to provide some diagrams that summarize the analysis previously carried out and that can be used for reference.

In figure 5 the ratio P

inSB/Pinmax

is plotted

against the offset voltage on current sense

, for different values of the parameter K

V

o

defined as:

P

K

In figure 6, the ratio P against the ratio f

inmax

=

M

(24).

P

inTmin

inNW/Pinmax

/ fSB for the two ex-

osc

is plotted

treme values (0 and 200 mV) considered

.

for V

o

The inspection of such diagrams shows a large influence of V smaller influence on P mainly on the ratio f fosc and f

are both already fixed, there is

SB

on P

o

inNW

/ fSB. If the values of

osc

little room for the adjustment of P

, but a much

inSB

, which depends

. This

inNW

is not usually a problem because there is no harmful effect if the converter is operating

= fSB even when the load is not so

at f

sw

light (e.g. 40% of the maximum load or even more).

This considering, one possible step-by-step procedure could be the following:

1. Check whether the flyback is DCM or MCM. To this end, from table (A1) pick up the value of V specification value and calculate I

V

ppkTmin

=

I

relevant to the

Emin

Z

V

Emin

=

Lp ⋅ f

E

ppkTmin

osc

If the resulting value is great er than 1/Rs then the system will be DCM, ot herwise MCM.

2. Calculate P use the following equation:

1

=

P

inmax

2

. If the system is DCM

inmax

2

1





⋅ Lp ⋅

⋅ f

(DCM)

osc





R

s





otherwise use:

P

inmax

=

V

Emin

R

s

− 2 ⋅ Lp ⋅ f

V

2 Emin

(MCM).

osc

Figure 5. P

in

P

in

M

Figure 6. P

:

inSB

/P

ratio vs. DC offset on current

inmax

sense.

20

M

= 3

K

M

= 2.5

/ P

K

inmax

ratio vs. f

15

M

≤1

K

10

SB

%

max

5

0

0 50 100 150 200

inNW

M

= 2

K

= 1.5

K

M

[mV]

o

V

/ fSB ratio for 0

osc

and 200 mV DC offset on current sense.

50

M

= 3

K

Q( ),,01z

Q( ),,0 1.5 z

NW

P

in

Q( ),,02z

max

in

P

Q( ),,0 2.5 z

Q( ),,03z

Q( ),,200 1 z

Q( ),,200 1.5 z

NW

in

P

Q( ),,200 2 z

max

P

in

Q( ),,200 2.5 z

Q( ),,200 3 z

40

30

%

K

20

10

2 2.5 3 3.5 4 4.5 5

50

M

K

40

30

M

≤ 1

K

20

10

2 2.5 3 3.5 4 4.5 5

M

≤ 1

= 3

M

K

= 2.5

M

K

= 2.5

M

= 2

K

M

= 1.5

K

z

osc

SB

M

= 2

K

M

= 1.5

K

z

osc

SB

M

K

o

V

max

in

P

=

P

inT

o

V

= 200 mV

min

= 0

7/24

AN1049 APPLICATION NOTE

3. Calculate P

inTmin

:

2

V

=

2 ⋅ Lp ⋅ f

Emin

osc

P

inTmin

4. Calculate K

5. In the diagrams of fig. 5, select the curve whose K

from (24).

M

value is closest to the one calculated in the pre-

M

vious step. Then find the offset voltage Vo to be applied to t he current sense pi n so that t he standby power P

6. Select the curve whose K depending on the value of V the target value of P

7. Calculate the new value of R

is close to the target value.

inSB

value is closest to the one calculated in step 4 in either diagram of fig. 6,

M

selected in the previous step. The n find the f

o

, consistently with the constraints imposed by the specifications.

inNW

(R’s) needed to get the same P

s

’

R

= Rs ⋅ (1 − V

s

ratio that better fits

osc/fSB

:

inmax

)

o

Standby function and error amplifier compensation

The control loop of a L5991-based flyback must be stable over a very wide range of operating conditions. These include the entire input voltage range and an input power going from P

= f

operating at f

sw

and from P

osc

inmin

to P

at fsw = fSB. Moreover, the transition from standby mode to

inNW

inSB

to P

inmax

when

normal operation and vice versa must not have uncertainties. This requires the output of the error amplifier to react to frequency changes without overshoots and undershoots that exceed the other threshold, thus causing the oscillator frequency to switch back and forth between f

SB

and f

And finally, when flyback operates in CCM, its control-to-output transfer function (dV

is the output voltage of the error amplifier of the L5991) feat ures the so-called RHP (Right-Half

V

COMP

osc

.

out

/ dV

COMP

, where

Plane) zero, which boosts the gain like a normal zero (a zero lying on the left-half plane) but lags the phase like a pole. The RHP zero, which shifts with t he duty cycle, is diff icul t if not impossible to compensate and therefore must be kept well beyond the closed-loop bandwidth. This somet imes means that the bandwidth must be narrow.

From what told above, to achieve stability under all operating condi tions, the error amplifier will need quite a heavy compensation, such that the overall bandwidth may be even narrower than f

/4÷fSB/5,

SB

which one could expect. A s a result, the t ransient response of s uch a system will not be e xtremely fast. On the other hand, the applications requiring the standby function do not have such a need.

2) OPTIMIZING TH E DESI GN FOR MAX IMUM EFFICIENCY AT LIGHT LOAD

Start-up & self-supply circuits.

Usually the start-up circuit is most commonly realized with a resistor (R

) that draws current from

START

the rectified and filtered DC bus (fig. 7 a). This solution is cheap but not the most efficient. A reduction of the power dissipated at high mains voltage can be achieved by connecting the start-up re-

sistor to the AC side of the bridge rectifier through a low-voltage diode (see fig. 7b). In both circuits, R

charge the supply capacitor (C sured even at the minimum line voltage (V R

START

.

In practice, however, R dissipation especially at maximum mains voltage (V is available to charge C threshold (V R

), the supply capacitor should be as low as possible, accounting for the time necessary for the

START

) of the IC, in particular at minimum mains. To reduce this wake-up time (having fixed

TH

carries the start-up current of the controller IC in addition to the one needed to

START

will be quite lower than t he maximum value, despite this increases power

START

and therefore the longer the supply voltage takes to reach the start-up

SUPPLY

) up to the start-up threshold of the IC. This current must be en-

SUPPLY

), which imposes a limit on the maximum value of

ACmin

). In fact, the higher R

ACmax

is, the less cur rent

START

self-supply circuit to take over and sustain the operation of the IC (see fig. 8).

8/24