ST AN1049 Application note

AN1049

®

APPLICATION NOTE

MINIMIZE POWER LOSSES OF LIGHTLY LOADED FLYBACK CONVERTERS WITH THE L5991 PWM CONTROLLER

by Claudio Adragna

The L5991 PWM controller is particularly suitable for SMPS of equipment that must comply with standards concerning energy saving. The device, optimized for flyback topology, monitors the power demanded by the load and changes the operating frequency of the converter accordingly: high frequency at heavy load, low frequency at light load.

In this way, power losses dependent on frequency are reduced at light load maintaining, at the same time, the advantages offered by a high switching frequency at heavy load.

The frequency reduction is very helpful but is not the only means needed to minimize power losses. This note surveys the above mentioned functionality of the L5991 (called "Standby" function) as well as the most significant points to consider in order to achieve the goal of a very efficient lightly loaded flyback.

INTRODUCTION

The minimization of the power drawn from the mains under light load conditions (Standby, Suspend or some other idle mode) is an issue that is recently becoming of great interest, above all else because new and more severe standards are coming into force.

This is already well-established in the area of computer monitors, where norms define precisely the various idle modes and the relevant maximum consumption admitted, but more and more often power supplies for other pieces of office equipment (i.e. printers, photocopiers, fax machines, AC-DC adaptors, etc.), are required to accomplish with specifications concerning energy saving.

Figure 1. L5991 Internal Block Diagram

 

 

 

 

SYNC

DC-LIM

VCC

 

 

 

 

VREF

 

 

 

 

1

15

8

 

 

 

 

4

RCT

2

 

 

TIMING

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

21V

 

 

Vref

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

PWM

 

 

 

DC

3

-

 

 

 

 

 

 

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

T

 

10V

UVLO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIS

14

-

 

 

 

 

 

 

 

 

9

 

 

DIS

 

 

 

 

 

 

VC

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

2.5V

VREF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STANDBY

 

 

 

 

 

 

 

17V

10

 

 

 

 

 

 

 

 

 

 

 

OUT

ST-BY

16

 

 

BLANKING

 

 

S

Q

 

 

 

 

 

 

 

 

 

 

R

 

 

 

 

 

 

 

 

PWM

 

VREF

 

 

 

 

 

 

OVER

 

 

 

 

 

 

 

 

 

 

 

 

OK

 

 

 

 

 

 

 

CURRENT

 

 

 

CLK

 

 

 

 

11

ISEN

13

+

 

 

FAULT

DIS

 

 

 

 

PGND

 

 

 

 

 

 

 

 

 

 

 

SOFT-START

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.2V

-

 

 

 

 

 

 

 

 

 

SS

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

-

 

 

 

7

 

 

 

 

 

 

2.5V

 

VFB

 

 

 

 

 

 

 

E/A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2R

 

 

+

 

+

STANDBY

 

 

 

1V

R

 

 

 

 

2.5/4.0V

-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

6

 

 

 

 

 

 

 

SGND

 

 

COMP

 

 

 

Anyway, minimizing the power wasted by a lightly loaded switch-mode converter is a demanding challenge for power supply designers and, to achieve the goal, an appropriate design strategy is required.

March 2000

1/24

AN1049 APPLICATION NOTE

The key point of this strategy is a low switching frequency. It is well-known that many of the power loss sources in a lightly loaded flyback waste energy proportionally to the switching frequency, hence this should be reduced as much as possible. On the other hand, it is equally well-known that a low switching frequency leads to bigger and heavier magnetics and makes filtering more troublesome.

It is then desirable to make the system operate at high frequency under nominal load condition and to reduce the frequency when the system works in a low-consumption mode. This requires a special functionality of the controller: it should be able to recognize automatically the condition of light or heavy load and should adequate its operating frequency accordingly.

The L5991 PWM controller, with its "Standby function", meets exactly this requirement. The function is optimized for flyback topology: in fact, power supply of office equipment lies most often in the mediumlow power range, where flyback topology features the lowest cost/performance ratio and is, therefore, the favorite one.

However, the goal of power losses minimization cannot be achieved with only a simple reduction of the switching frequency. Although the most important, this is only one of the numerous points of a wideranging strategy that must be looked into on the whole.

This application note is composed of two distinct parts. The first part deals with the L5991, describes the operation of the "Standby function" in detail and states several relationships useful for the design. The second one provides an overview of the points to be considered in the above mentioned strategy, as well as a number of tips that can be helpful.

1) DESIGNING WITH THE L5991 PWM CONTROLLER The L5991

The device, whose internal block diagram is shown in fig. 1, is based on a standard "peak" current mode PWM controller, such as the UC384x family, with the addition of numerous ancillary features among which Standby function is the most noticeable.

The L5991, which is available in DIP16 and SO16N packages, features the following characteristics:

Very low start-up current (75 μA typ. - 120 μA max.);

low quiescent current (7 mA typ. - 10 mA max.);

internal reference with 1% precision guaranteed (@ Tj=25°C);

high current capability, large bandwidth, high slew-rate error amplifier;

high-speed current loop (< 100 ns delay to output);

high current capability totem-pole output for MOSFET or IGBT drive;

Standby function;

IN/OUT synchronization;

precise maximum duty cycle control;

programmable soft-start

100 ns Leading Edge Blanking on current sense for increased noise immunity;

overcurrent protection with soft-start intervention; latched disable function;

All these characteristics are described in detail in the datasheet of the device. In this context, however, it is worth emphasizing the low current consumption of the device, both before start-up and when running. Along with the standby function, the low consumption turns out to be particularly useful for minimizing losses.

Table 1 compares these characteristics with the UC384XA/B family.

Table 1. L5991 vs. UC384XA/B family

CONTROLLER

START-UP CURRENT

QUIESCENT CURRENT

STANDBY FUNCTION

 

 

 

 

L5991

75μA typ.

7.0mA typ.

yes

 

120μA max.

10.0mA max.

 

 

 

 

 

UC384XA/B

300μA typ.

12mA typ.

no

 

500μA max.

17mA max.

 

 

 

 

 

2/24

AN1049 APPLICATION NOTE

The L5991 can be used in off-line SMPS’ with any single-ended topology. However, its features make the device particularly useful for power supplies based on flyback topology for office equipment that must comply with standards concerning energy saving. Monitor displays, printers, photocopiers, scanners and fax machines are the most noticeable examples.

Standby function description

The L5991 automatically detects a light load condition for the converter and decreases the oscillator frequency on that occurrence. The normal (higher) oscillation frequency is automatically resumed when the output load builds up and exceeds a defined threshold. This functionality is called "Standby function".

Like in every "peak" current mode controller, the output voltage (VCOMP) of the Error Amplifier (E/A) of the device moves depending on the power drawn from the mains (see Appendix "Peak Current Mode Control Basics"). The basic principle of the Standby is then monitoring the E/A output .

Figure 2.Standby function dynamic operation.

Pin

 

 

 

 

 

 

 

 

 

 

fosc

 

 

 

Normal operation

 

 

PNO

 

 

 

 

fSB

PSB

 

 

Stand-by

 

 

 

 

 

 

 

1

2

VT1

3

VT2

4

 

 

VCOMP

 

 

If the peak primary current decreases as a result of a decrease of the power demanded by the load VCOMP will decrease as well. If this falls below a fixed threshold (VT1), the oscillator, which was working at fosc, will be forced to work at a lower value (fSB). The frequency drop, however, implies a sudden increase of the peak primary current and, therefore, of VCOMP. Some hysteresis will be necessary to prevent the frequency from switching back to fosc. In fact, VCOMP will have to exceed a second threshold (VT2 > VT1) in order for the oscillator frequency to be reset at fosc. The hysteresis (VT2-VT1) will be large enough to prevent the above mentioned undesired phenomenon. This operation is shown in fig. 2.

Fig. 3 shows how the function is implemented internally. Only one pin (ST-BY, 16) is required and is used to connect an external resistor (RB) to the oscillator pin (RCT, 2). In this way, both the normal and the standby frequency are externally programmable.

The capacitor CT and the resistor RB, along with RA, set the operating frequency of the oscillator in normal operation (fosc). In fact, as long as the STANDBY signal is high, the pin is internally connected to the reference voltage VREF by a N-channel FET (see fig. 3), thus the timing capacitor CT is charged

through RA and RB. When the STANDBY signal goes low the N-channel FET is turned off and the pin becomes floating. RB is now disconnected and CT is charged through RA only. In this way the oscillator frequency (fSB) will be lower.

Figure 3. Standby function internal schematic and operation

 

COMP

ISEN

 

 

 

 

 

 

 

 

6

13

 

 

 

 

 

 

 

 

 

 

2R

+

R

DRIVER

CUT

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

 

 

 

 

 

 

 

 

 

 

 

10V

 

 

4

STANDBY

 

 

 

 

5

 

 

 

 

 

 

 

FB

 

 

 

 

VREF

 

 

 

 

-

+

 

STANDBY

 

 

 

 

 

 

+

 

 

 

HIGH

 

 

 

 

-

 

 

 

 

 

 

 

 

2.5

 

 

 

ST-BY

 

 

 

 

 

2.5/4

 

LEVEL SHIFT

 

 

 

 

 

 

 

 

 

16

 

 

 

 

 

 

STANDBY BLOCK

 

 

 

 

 

 

 

 

 

 

 

LOW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RB

RA

VT1

VT2

VCOMP

 

66KΩ

 

 

 

 

 

 

2.6V

4V

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RCT

CT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D97IN752A

 

 

 

The oscillation frequency can be estimated with the following approximate relationships:

fosc »

1

(1),

CT × (0.693 × (RA ¤ ¤ RB) + KT)

3/24

AN1049 APPLICATION NOTE

which gives the normal operating frequency, and:

fSB »

1

(2)

CT × (0.693 × RA + KT)

which gives the standby operating frequency, that is the one the converter will operate at when lightly loaded. In the above expressions, RA // RB means:

RA ¤ ¤ RB =

RA × RB

(3),

 

 

 

 

RA + RB

 

and KT, defined as:

 

 

 

ì 90, V15

= VREF

(4)

KT = í

= GND/OPEN

î160, V15

 

is related to the duration of the falling-edge of the sawtooth. In case V15 is connected to VREF, however, the switching frequency will be a half the values resulting from (1) and (2).

Fig.3 shows also the comparator with hysteresis that recognizes the load condition of the converter. The thresholds VT1 and VT2 are internally fixed at 2.5 V and 4 V respectively (typical values). With reference to Fig. A1 in Appendix, the peak voltages on the current sense pin of the L5991 (ISEN, 13) relevant to VT1 and VT2 are:

Vcspk1 =

 

VT1 - 2 × Vf

=

 

2.5 - 2 × 0.7

= 0.367V

(5)

3

 

3

 

 

 

 

 

 

 

Vcspk2 =

VT2 - 2 × Vf

=

4.0 - 2 × 0.7

 

= 0.867V

(6).

3

3

 

 

 

 

 

 

 

It is more convenient to refer to the thresholds Vcspk1 and Vcspk2 (rather than VT1 and VT2), because they can be immediately related to the peak input current. Although having fixed thresholds may seem a lack of flexibility, in reality it is possible to adjust the thresholds in terms of input power level, if needed, by adding a DC offset voltage (VO) on the current sense pin.

Standby Operation Analysis

In this context, flyback converters are classified as stated in the appendix "Flyback Basics". Another assumption is that the delay to output of the L5991 is compensated, thus the offset voltage Vo is intended as the amount exceeding the value needed for compensation (see Appendix "Peak current mode control Basics"). This analysis does not take other non-idealities into consideration, thus the results are approximate.

Please refer to the appendix for an explanation of symbols, terminology and formulas.

When VCOMP = VT1, that is on the boundary of the standby mode, the peak input current is equal to:

Ippk1 =

Vcspk1 - Vo

=

0.367 - Vo

(7),

 

 

 

Rs

Rs

corresponding to the standby input power which, under the assumption of DCM (Discontinuous Conduction Mode) operation, can be expressed as:

 

1

æ

0.367 - Voö2

 

PinSB =

 

× Lp × fosc × ç

 

÷

(8).

2

Rs

 

è

ø

 

 

 

 

 

The standby power can be expressed also in terms of the maximum input power (Pinmax). This is set by the sense resistor Rs, which is selected so as to limit the peak primary current at the value (Ippkmax) relevant to Pinmax:

Rs = I

- Vo

= (1 - Vo) × Ö`````

(9).

1

 

Lp × fosc

 

 

ppkmax

 

2 × Pinmax

 

4/24

 

 

 

 

AN1049 APPLICATION NOTE

By substituting (9) in (8) it is possible to obtain:

 

 

 

 

æ

0.367 - Voö2

PinSB = Pinmax × ç

 

 

÷

(10).

1 -

 

è

Vo ø

 

The frequency change fosc Þ fSB pushes flyback into a deeper DCM operation and causes a sudden increase of the peak primary current (since the input power does not change). As a result, the peak voltage on current sense will jump from Vcspk1 to:

Vcspk1

= Vo + Rs × ````Ö

= Vo + (1 - Vo) × ````Ö

× ``Ö ` (11).

 

2 × PSB

 

PSB

 

fosc

 

 

LP × fSB

 

 

 

 

 

 

 

 

Pinmax

 

fSB

This value must be <Vcspk2 not to exceed the hysteresis of the internal comparator, which would cause the operating frequency to switch back and forth between fosc and fSB. This constraint sets a maximum limit on the frequency change:

fosc

æ

0.867

- Vo

ö2

 

 

< ç

 

 

÷

(12).

fSB

0.367

- Vo

è

ø

 

 

 

 

 

Provided equation (12) is fulfilled, the input power (PinNW) at which the normal operation frequency is resumed (fSB Þ fosc) will be:

 

1

æ

0.867 - Voö2

PinNW =

 

× Lp × fSB × ç

 

÷ (13)

2

Rs

 

è

ø

 

 

 

which, considering position (9), can be also expressed in the following terms:

æ

0.867 - Voö2

 

fSB

æ

0.867

- Voö2

fSB

 

PinNW = Pinmax × ç

 

 

÷

×

 

= PinSB × ç

 

 

÷

×

 

(14).

1 -

 

 

 

 

 

è

Vo ø

 

fosc

è0.367

- Voø

 

fosc

 

Figure 4. Circuit for the adjustment of the standby thresholds.

 

 

Vo = Vref

R

 

 

 

R + Rc

 

Vref

 

 

 

 

4

10

 

 

 

 

 

 

 

L5991

Rc

R

 

 

 

 

 

12

11

13

 

 

 

 

 

 

 

 

C

Rs

 

 

 

 

The inspection of equations (8)...(14) shows that adding an offset Vo lowers the ratios PinSB/Pinmax and PinNW / Pinmax and raises the limit of fosc / fSB (with respect to the values with Vo = 0).

This is equivalent to lowering the internal thresholds VT1 and VT2. The effect will be more pronunciated on VT1 than on VT2. In practice, the internal thresholds have been fixed at the maximum value able to allow high enough a frequency jump, with a certain margin, leaving to an external circuit (like the one shown in fig. 4) the duty of the adjustment, if necessary.

Referring now to MCM (Mixed Conduction Mode) and CCM (Continuous Conduction Mode) systems, the peak voltage on the current sense pin is given by:

ì

æPin

 

 

VE

ö

 

ïVo + Rs × ç

 

+

 

 

÷

Pin > PinT

 

 

 

Vcspk = í

èVE

2

× ZEø

(15)

ïVo + Rs × ````Ö 2 × Pin

 

Pin > PinT

î

 

 

ZE

 

 

 

where ZE is to be evaluated at fsw = fosc or fsw = fSB, depending on the operating mode. At the transition CCM « DCM the peak voltage on the current sense pin will be:

VcspkT = Vo + Rs ×

VE

(16).

ZE

 

 

5/24

AN1049 APPLICATION NOTE

If the sense resistor Rs is selected as follows:

Rs =

1 - Vo

=

1 - Vo

(17).

 

Pinmax

 

VEmin

 

Ippkmax

+

 

 

 

 

VEmin

2 × ZE

 

(with ZE evaluated at fsw = fosc), the peak voltage on the current sense pin at transition will be given by:

VcspkT = Vo + (1 - Vo) ×

VE

×

2 × PinT

(18),

 

Pinmax + PinTmin

 

VEmin

 

(with PinT and PinTmin evaluated at fsw = fosc). It will assume its minimum value at minimum mains voltage (that is, @ VE = VEmin Þ PinT = PinTmin):

VcspkTmin = Vo + (1 - Vo) ×

 

2

(19).

 

Pinmax

1 +

 

PinTmin

 

 

 

 

Table A2 in appendix shows that in MCM systems (for which PinTmin £ Pinmax £ PinTmax) the ratio PinTmax / PinTmin does not exceed 3.31 in practical cases. This means that also Pinmax /PinTmin will not exceed 3.31. As a result, the transition from CCM to DCM will occur at Vcspk values that do not exceed 2 / (1+3.31) = 464 mV (when Vo = 0, and even larger values when Vo > 0).

In the end, since Vcspk1 = 367 mV, when the L5991 activates the standby frequency MCM systems are operating in DCM. The standby input power will then be found once more from equation (8) which, accounting for (17) and after some manipulations, yields:

PinSB

 

1

æ

0.367 - Voö2

æ

+

Pinmax ö2

PinTmin

 

 

=

 

× ç

 

 

÷

× ç1

 

÷

×

 

(20).

Pinmax

4

1 -

 

 

Pinmax

 

è

Vo ø

è

 

PinTminø

 

 

Besides, all the considerations leading to equation (12), as well as equation (12), still apply. This will always be true if VcspkTmin is greater than Vcspk1, that is if the ratio Pinmax /PinTmin is such that:

Pinmax £ 1.633 - Vo

PinTmin 0.367 - Vo

(21)

(= 4.45 for Vo = 0), which includes also a class of CCM systems. In practice, the above equations apply to the large majority of common flyback designs.

Once the system is in standby mode, in equations (15) ZE must be evaluated for fsw = fSB, becoming ZE’. This will modify also PinT, PinTmin and VcspkT: they all increase and become PinT’, PinTmin’ and VcspkT’ respectively.

When Vcspk =Vcspk2, that is when the input power is PinNW and the frequency is to be switched back to fosc, the system can be working either in DCM or CCM, depending on the fosc / fSB ratio and on VE (that is, on the input voltage). In other words, it depends on whether VcspkT’ is greater or less than Vcspk2. It is possible to find that if the following condition:

fosc

 

1

 

0.867 - Vo

 

VEmin

æ

+

Pinmax

ö

 

³

 

×

 

×

 

× ç1

 

÷ (22)

fSB

2

1 - Vo

VE

PinTmin

 

 

 

 

 

 

 

è

 

 

ø

is fulfilled, then VcspkT’ >Vcspk2 and the system will be working in DCM.

The right side of (22), for Vo = 0, is top limited at 1.87 in MCM systems. Considering that in most practical cases the fosc / fSB ratio will not be less than 2, it is possible to leave out the case of CCM operation. This makes things easier because there would be also a dependence of PinNW on VE.

In the end, PinNW will be given again by equation (13) which, rearranged more conveniently, becomes:

PinNW

 

1

æ

0.867 - Voö2

æ

+

Pinmax ö2

 

PinTmin

 

fSB

 

 

 

=

 

× ç

 

 

÷

× ç1

 

 

÷

×

 

×

 

 

(23)

P

inmax

4

1 -

 

P

 

P

f

osc

 

 

 

è

Vo ø

è

 

 

inTminø

 

inmax

 

 

 

6/24

ST AN1049 Application note

AN1049 APPLICATION NOTE

The inspection of equations (15)...(23) shows that also in MCM systems the effect of the offset Vo is the same as in DCM systems. Furthermore, the internal thresholds VT1 and VT2 are such that a large range of applications can be covered without any external adjustment.

Standby function setup

It is difficult to outline a general procedure for the use of the L5991’s standby function because the constraints of a specific design may be of different types and are not known in advance. It is possible, however, to provide some diagrams that summarize the analysis previously carried out and that can be used for reference.

In figure 5 the ratio PinSB/Pinmax is plotted against the offset voltage on current sense Vo, for different values of the parameter KM defined as:

KM =

Pinmax

(24).

 

 

PinTmin

In figure 6, the ratio PinNW/Pinmax is plotted against the ratio fosc / fSB for the two extreme values (0 and 200 mV) considered for Vo.

The inspection of such diagrams shows a large influence of Vo on PinSB, but a much smaller influence on PinNW, which depends mainly on the ratio fosc / fSB. If the values of fosc and fSB are both already fixed, there is little room for the adjustment of PinNW. This is not usually a problem because there is no harmful effect if the converter is operating at fsw = fSB even when the load is not so light (e.g. 40% of the maximum load or even more).

This considering, one possible step-by-step procedure could be the following:

1. Check whether the flyback is DCM or MCM. To this end, from table (A1) pick up the value of VEmin relevant to the specification value and calculate IppkTmin:

IppkTmin =

VEmin

=

VEmin

 

Lp × fosc

 

ZE

If the resulting value is greater than 1/Rs then the system will be DCM, otherwise MCM.

2.Calculate Pinmax. If the system is DCM use the following equation:

 

1

 

 

 

æ

1 ö2

 

Pinmax =

 

× Lp

×

ç

 

÷ × fosc

(DCM)

2

Rs

 

 

 

 

è

ø

 

otherwise use:

 

 

 

 

 

 

 

 

 

Pinmax =

VEmin

-

 

 

VEmin2

(MCM).

 

 

2 × Lp × fosc

 

 

Rs

 

 

 

Figure 5. PinSB /Pinmax ratio vs. DC offset on current

 

sense.

 

 

 

20

 

 

 

 

 

KM = 3

 

KM =

Pinmax

 

 

 

 

KM = 2.5

KM = 2

 

PinTmin

 

 

 

15

 

 

 

 

 

 

KM = 1.5

 

 

10

KM 1

 

 

 

 

 

 

 

PinSB %

 

 

 

 

Pinmax

 

 

 

 

5

 

 

 

 

0

 

 

 

 

0

50

100

150

200

 

 

Vo [mV]

 

 

Figure 6. PinNW / Pinmax ratio vs. fosc / fSB ratio for 0 and 200 mV DC offset on current sense.

 

 

50

 

 

 

 

 

 

 

 

 

 

 

 

KM = 3

 

 

 

 

 

Vo

= 0

 

 

 

 

 

 

 

 

 

 

 

 

40

 

KM = 2.5

KM = 2

 

 

 

 

 

 

 

 

 

 

Q( 0

, 1 , z)

 

 

 

 

 

 

 

 

 

 

Q( 0

, 1.5 , z)

 

 

 

 

 

KM = 1.5

 

 

PinNW

 

 

 

 

 

 

 

30

 

 

 

 

 

 

 

 

 

Q( 0

, 2 , z)

 

 

 

 

 

 

 

 

 

 

%

 

KM 1

 

 

 

 

 

 

 

Pinmax

 

 

 

 

 

 

 

 

Q( 0

, 2.5 , z)

 

 

 

 

 

 

 

 

 

 

Q( 0

, 3 , z)

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

 

 

 

 

 

 

 

 

 

10 2

 

2.5

3

 

 

3.5

4

4.5

5

 

 

 

 

 

 

 

 

z

 

 

 

 

 

 

 

 

 

 

 

fosc

 

 

 

 

 

 

 

 

 

 

 

fSB

 

 

 

 

 

50

 

 

 

 

 

 

 

 

 

 

 

 

KM

= 3

 

 

 

 

Vo

= 200 mV

 

 

 

 

 

 

 

 

 

 

 

 

40

 

 

 

 

 

 

 

 

 

Q( 200

, 1 , z)

 

 

KM

= 2.5

KM

= 2

 

 

 

Q( 200

, 1.5 , z)

 

 

 

 

 

 

KM

= 1.5

 

 

PinNW

 

 

 

 

 

 

 

 

Q( 200

, 2 , z)% 30

 

 

 

 

 

 

 

 

 

Pinmax

 

KM

1

 

 

 

 

 

 

 

Q( 200

, 2.5 , z)

 

 

 

 

 

 

 

 

Q( 200

, 3 , z)

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

 

 

 

 

 

 

 

 

 

10 2

 

2.5

3

 

 

3.5

4

4.5

5

 

 

 

 

 

 

 

 

z

 

 

 

 

 

 

 

 

 

 

 

fosc

 

 

 

 

 

 

 

 

 

 

 

fSB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7/24

AN1049 APPLICATION NOTE

3. Calculate PinTmin :

PinTmin =

VEmin2

2 × Lp × fosc

4.Calculate KM from (24).

5.In the diagrams of fig. 5, select the curve whose KM value is closest to the one calculated in the previous step. Then find the offset voltage Vo to be applied to the current sense pin so that the standby power PinSB is close to the target value.

6.Select the curve whose KM value is closest to the one calculated in step 4 in either diagram of fig. 6, depending on the value of Vo selected in the previous step. Then find the fosc/fSB ratio that better fits the target value of PinNW, consistently with the constraints imposed by the specifications.

7.Calculate the new value of Rs (R’s) needed to get the same Pinmax:

Rs = Rs × (1 - Vo)

Standby function and error amplifier compensation

The control loop of a L5991-based flyback must be stable over a very wide range of operating conditions. These include the entire input voltage range and an input power going from PinSB to Pinmax when operating at fsw = fosc and from Pinmin to PinNW at fsw = fSB. Moreover, the transition from standby mode to normal operation and vice versa must not have uncertainties. This requires the output of the error amplifier to react to frequency changes without overshoots and undershoots that exceed the other threshold, thus causing the oscillator frequency to switch back and forth between fSB and fosc.

And finally, when flyback operates in CCM, its control-to-output transfer function (dVout / dVCOMP, where VCOMP is the output voltage of the error amplifier of the L5991) features the so-called RHP (Right-Half Plane) zero, which boosts the gain like a normal zero (a zero lying on the left-half plane) but lags the phase like a pole. The RHP zero, which shifts with the duty cycle, is difficult if not impossible to compensate and therefore must be kept well beyond the closed-loop bandwidth. This sometimes means that the bandwidth must be narrow.

From what told above, to achieve stability under all operating conditions, the error amplifier will need quite a heavy compensation, such that the overall bandwidth may be even narrower than fSB/4¸fSB/5, which one could expect. As a result, the transient response of such a system will not be extremely fast. On the other hand, the applications requiring the standby function do not have such a need.

2) OPTIMIZING THE DESIGN FOR MAXIMUM EFFICIENCY AT LIGHT LOAD Start-up & self-supply circuits.

Usually the start-up circuit is most commonly realized with a resistor (RSTART) that draws current from the rectified and filtered DC bus (fig. 7 a). This solution is cheap but not the most efficient.

A reduction of the power dissipated at high mains voltage can be achieved by connecting the start-up resistor to the AC side of the bridge rectifier through a low-voltage diode (see fig. 7b).

In both circuits, RSTART carries the start-up current of the controller IC in addition to the one needed to charge the supply capacitor (CSUPPLY) up to the start-up threshold of the IC. This current must be ensured even at the minimum line voltage (VACmin), which imposes a limit on the maximum value of

RSTART.

In practice, however, RSTART will be quite lower than the maximum value, despite this increases power dissipation especially at maximum mains voltage (VACmax). In fact, the higher RSTART is, the less current is available to charge CSUPPLY and therefore the longer the supply voltage takes to reach the start-up threshold (VTH) of the IC, in particular at minimum mains. To reduce this wake-up time (having fixed RSTART), the supply capacitor should be as low as possible, accounting for the time necessary for the self-supply circuit to take over and sustain the operation of the IC (see fig. 8).

8/24

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