ST AN1048 APPLICATION NOTE

AN1048

Application note

ST7 software LCD driver

Introduction

This note describes a technique for driving Liquid Crystal Displays (LCD) with any standard ST7 Microcontroller (MCU) i.e without any specific on-chip LCD driver hardware. This technique offers a solution for applications which require a display at low cost together with the versatile capabilities of the standard ST7 MCUs. This note also provides a technique to control the LCD contrast through software.

After an introduction on LCDs in Section 1, Section 2 & 3 of this note describes the typical waveforms required to drive an LCD with a multiplexing rate of 1 or 2 (duplex) and 4 (quadruplex). Section 3 presents a solution based on a standard ST7 MCU directly driving a quadruplex LCD. This solution can be implemented with any ST7 MCU as it only requires the standard I/O ports and one timer, both of which are standard features on all ST7 MCUs.

Section 4 describes how to control the contrast through software. Finally, Section 5 gives a

brief overview of the LCD demo board including the board schematics. The demo board, based on a ST72F321B microcontroller, allows the user to develop and test applications using an LCD device.

The program size (~300 bytes), the CPU load required for controlling the LCD (0.2%), and the number of external components is kept to the minimum (two external resistors per COM line). The number of I/O’s is the same as a solution using an on-chip LCD hardware driver or an external hardware LCD driver. With software contrast control, it is a very flexible solution that can be adapted easily to a range of applications.

May 2006 Rev 5 1/21

www.st.com

Contents AN1048

Contents

1 LCD requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 LCD drive signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Single backplane LCD drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Duplexed LCD drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Quadruplex LCD drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.3.1 LCD mean voltage calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3.2 Contrast calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Example of a quadruplex LCD with ST72F321B . . . . . . . . . . . . . . . . . . 11

4 Software contrast control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.1 Contrast calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 LCD demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.2 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.3 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.4 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.5 Oscillation system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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AN1048 LCD requirements

1 LCD requirements

With a low Root Mean Square (RMS i.e.: ) voltage applied to it, an LCD is

Mean Signal

()

practically transparent. The LCD segment is inactive(OFF) if the RMS voltage is below the LCD threshold voltage and is active(ON) if the LCD RMS voltage is above the threshold voltage. The LCD threshold voltage depends on the quality of the liquid used in the LCD and the temperature. The optical contrast is defined by the difference in transparency of a LCD segment ON (dark) and a LCD segment OFF (transparent). The optical contrast depends on the difference between the RMS voltage on an ON segment (V an OFF segment (V

). The higher the difference between VON(rms) and V

OFF

higher the optical contrast. The optical contrast also depends on the level of V LCD threshold voltage. If V completely or almost transparent. If V

is below or close to the threshold voltage, the LCD is

is close or above the threshold voltage, the LCD is

OFF

) and the RMS voltage on

(rms), the

OFF

versus the

completely dark.

In this document, contrast is defined as D = V

(rms) / V

OFF

(rms).

The applied LCD voltage must alternate to give a zero DC value in order to ensure a long LCD life time.

The higher the multiplexing rates, the lower the contrast. The signal period has also to be short enough to avoid visible flickering on the display.

The LCD voltage for each segment is equal to the difference between the S and COM voltages (see Figure 1).

Figure 1. Equivalent Electrical Schematic of an LCD Segment

COM

Note: The DC Value should never be more than 100mV (refer to the LCD manufacturer’s

datasheet). Otherwise the life time can be shortened. The frequency range is 30 - 200Hz typically. If it is less, it flickers; if it is more, the power consumption increases.

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LCD drive signals AN1048

2 LCD drive signals

2.1 Single backplane LCD drive

In a single backplane drive, each LCD segment is connected to a segment line(Sx) and to one backplane(common line) common to all the segments. A display using S segments is driven with S+1 MCU output lines. The backplane is driven with a “COM” signal controlled between 0 and V

When switching a segment “ON”, a signal with opposite polarity to “COM” is sent to the corresponding “Segment” pin. When the non-inverted signal “COM” is sent to the “Segment” pin, the segment is “OFF”. Using an MCU, the I/O operates in output mode either at logic 0 or 1.

Figure 2. LCD signals for direct drive

COM

+Vdd

with a duty cycle of 50%.

S1=COM-S

+Vdd

S1=COM-S

+Vdd

-Vdd

2.2 Duplexed LCD drive

In a duplexed drive, two backplanes are used instead of one. Each LCD segment line(Sx) is connected to two LCD segments, each one connected on the other side to one of the two backplanes or common lines(refer to Figure 3). Thus, only (S/2)+2 MCU pins are necessary to drive an LCD with S segments.

Three different voltage levels have to be generated on the backplanes: 0, V “Segment” voltage levels are 0 and V and LCD waveforms. The intermediate voltage V voltages. The ST7 I/O pins selected as “Backplanes” are set by software to output mode for

O F F

O N

/2 and VDD. The

only. Figure 4 shows typical Backplane, Segment

DD/2 is only required for the Backplane

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AN1048 LCD drive signals

0 or VDD levels and to high impedance input mode for VDD/2. When one backplane is active, the other one is neutralised by applying V

/2 to it. This VDD/2 voltage is defined by two

resistors of equal value, externally connected to the I/O pin. By using an MCU with flexible I/O pin configuration, a duplexed LCD drive can be implemented with only 2 external resistors bridge (each on two com lines).

Figure 3. Basic LCD Segment Connection in duplexed mode

S2 S3

S11 S12

COM1

COM2

Figure 4. LCD signals for duplexed mode (used in the ST7 example)

COM1

+Vdd

+Vdd/2

COM2

+Vdd

+Vdd/2

+Vdd

CASE1 CASE2 CASE3 CASE4

S11=COM1-S1

+Vdd

+Vdd/2

-Vdd/2

-Vdd

SEGMENT1

S12=COM2-S1

+Vdd

+Vdd/2

-Vdd/2

-Vdd

SEGMENT2

OFF ON ONOFF

OFFOFFONON

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LCD drive signals AN1048

2.3 Quadruplex LCD drive

In a quadruplex LCD drive, four backplanes are used. Each LCD pin is connected to four LCD segments, with each segment connected on the other side to one of the four backplanes. Thus, only (S/4)+4 MCU pins are necessary to drive an LCD with S segments. For example: to drive an LCD with 128 segments (32 x4), only 36 I/O ports are required (32 I/O ports to drive the segments, 4 I/O ports to drive the backplanes).

Three different voltage levels have to be generated on the common lines: 0, V The Segment line voltage levels are 0 and V

only. The LCD segment is inactive if the

/2, VDD.

RMS voltage is below the LCD threshold voltage and is active if the LCD RMS voltage is above the threshold. Figure 6 shows typical Backplane, Segment and LCD waveforms. The intermediate voltage V selected as “Backplanes” are set by software to output mode for 0 or V high impedence input mode for V

/2 is only required for Backplane voltages. The MCU I/O pins

/2. The VDD/2 voltage is defined by two resistors of

levels and to the

equal value, externally connected to the I/O pins. When one backplane or COM is active, the other ones are neutralized by applying V

/2 to them.

Figure 5. Basic LCD Segment Connection in Quadruplexed Mode

COM1

S11

S12

S13

S14

COM2

COM3

COM4

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AN1048 LCD drive signals

Figure 6. LCD timing diagram for Quadruplex Mode

Single Frame Period

T/4

Control Period

T/2

3T/8

Vcom

Vdd/2

COM1

T/8

COM2

COM3

COM4

Vsegx

Vseg-Vcom

Seg x_1 ON

Vsegx-Vcom1

Segx_2 Off

Segx_3 ON Segx_4 Off

Vsegx-Vcom4

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