The goal of this application note is to i mplement an I2C communications software interface for
devices which have no I2C perip heral. The software of this app lication perform s I2C master
transmitter and master receiver functions. The master chosen here is a ST72324 and the
slave is an EEPROM (M24C08).
The program described in this a pplication note is in C language, a program in assembly language is also available in the software library (see ST7 CD ROM on Internet).
1 CHARACTERISTICS
The main characteristics of this I2C software are:
■ bit addressing
■ Master Transmitter/Receiver
■ Several data bytes sent and received (3 in this application)
■ Fscl = 62.5 kHz
■ Acknowledge management
■ Error management (AF)
The I2C synchronous communication needs only two signals: SCL (Serial clock line) and SDA
(Serial data line). The corresponding port pins used are PA7 for SCL and PA6 for SDA.
These two pins are configured as floating input (to have a high level applied on the pin or to receive data) or as output open drain (to have a low level applied on the pin or to output data).
Please refer to the ST7 datasheet for more details about port configuration.
AN1045/08031/16
1
ST7 S/W IMPLEMEN TATION OF I2C BU S MASTER
1.1 COMMUNICATION SPEED
The comm unic ation spee d is m odifiabl e by usin g the fun ction delay(t ime) w hich waits for a
given time period and then modifies the frequency of SCL.
Here Fscl is equal to 62.5 kHz. It can be easily reduced by increasing the period between two
clock cycles, but this speed is not far from the highest speed you can have (~70 kHz).
1.2 START, STOP CONDITION AND ACKNOWLEDGE GENERATION
The Start and Stop conditions are always generated by the master. In this software, there are
no bits to set to generate these conditions like in the real peripheral: you just have to call the
corresponding function (I2Cm_Start() and I2Cm_Stop()).
An Acknowledge is sent after an address or a data byte is received. When the master has to
receive an acknowledge from the slave, you have to call the function Wait_Ack() which reads
the SDA and SC L lines to reco gnize the acknowl edge condition (the S DA line put at the low
state by the one which sends the acknowledge during one clock pulse). And when the master
has to send an acknowledge after receiving data from the slave, you have to call the function
I2Cm_Ack().
2 ST7 I2C COMMUNICATION APPLICATION
2.1 HARDWARE CONFIGURATION
The ST7 communication application hardware is composed of a ST72324 microcontroller
(which has no I2C peripheral) and any slave (an M24C08 EEPROM for example).
Figure 1. ST7 / E2PROM I2C Communication A pp lication
5V
SCL
SDA
Vdd
Vss
2x100W
2x12KW
M24C08
SCL
SDA
Vss
E
ST72324
I2C
2/16
2
ST7 S/W IMPLEMENTATION OF I2C BUS MASTER
2.2 INITIATING A COM MUNICATION
To initiate an I2C communication, first a start condition has to be generated and then the selected slave address has to be sent, both by the master.
Here, this action i s don e b y calling the fun ction I2C m_S tart() fol lowed by th e sen din g of the
slave address with the least significant bit correctly set (0:transmission, 1:reception).
As the slave here is an EEPR OM, two addresses have to be sent by the master to the slave:
the address of the slave and the address w here y ou want to write or read into the EE PR OM
(refer to Section 3: Communication frames).
2.3 SENDING A DATA BYTE ON THE I2C BUS
To transmit a new data byte from the ST72324, the addresses or data bytes previously transmitted have to be completed correctly. This previous byte transmission check is done with the
reception of an acknowledge condition by the master. If an er ror is detected ( AF: Acknowledge
Failure), the AF bit of the created I2C_SR2 register is cleared and the transmission is restarted from the START condition.
When the prev ious dat a t ransmis sion is over, the app lication w rites the new data by te to be
transmitted. The d ata t o transm it is p ut on the created I2 C_ DR r egister an d is sent bi t by b it
through PADR (PA6=SDA), MSB first.
All the data to send to the slave (and the addresses too) are stored in a table.
2.4 RECEIVING A DATA BYTE ON THE I2C BUS
To receive a new data byte, the previous data byte to receive has to be c ompleted correctly.
This byte rece ption chec k is done with the send ing of an ackn owledge cond ition by the
master. An AF can’t occur on the master side because it’s the master that sends the acknowledge condition. If there is a problem with the reception of this acknowledge, it’s up to the slave
to manage this problem.
The frame in thi s case (m aster receiver ) is: the mas ter after sendin g th e first Start c ond ition
and the two addresses, has to resend a Start condition followed by the address of the
EEPROM, but this time with the least sign ificant bit at 1 to make the slave understand it’s
waiting for the data (refer to Section 3: Communication frames).
When the master is receiver, after receiving the last data, it has to generate a non acknowledge condition to be able to generate the STOP condition afterwards.
Note: There is no need to clear the ACK bit to disable acknowledgement before receiving the
second last byte or set the STOP bit before receiving the last byte (as is necessary in ST7
MCUs with a dedicated I2C peripheral), because here Acknowledgement and Stop condition
generation is under software control, while in the I2C Peripheral it is under hardware control.
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ST7 S/W IMPLEMEN TATION OF I2C BU S MASTER
3 COMMUNICATION FRAMES
The communication protocol between the master and the slave is given in Figure 2. For more
details, please refer to the ST7 datasheet.
Figure 2. I2C Communication Protocol
Write data from ST7 to E2PROM
E2PROM @
START
ACK
SUB @ ACK DATA 1 ACK DATA 2ACKDATA N-1DATA N
Read data from E2PROM to ST7
E2PROM @
START
ACK
SUB @ ACKDATA 1 ACKDATA N NACK
START
E2PROM @
ACK
ACK
STOP
STOP
4 FLOWCHARTS
Figure 3. Communication Application Flowchart
Master transmitterMaster receiver
INITIATE TRANSMIS SION
(START + addresses)
no
ACK?
yes
SEND NEXT TABLE DATA
ACK?
no
yes
END OF
yes
BUFFOUT?
no
INITIATE TRANSMISSION
(START+@+START+@lsb=1)
no
ACK?
yes
WAIT FOR NEXT DATA TO RECEIVE
ACK
no
LAST VALUE
TO RECEIVE?
yes
NON ACK
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STOP CONDITIO N
STOP CONDITIO N
ST7 S/W IMPLEMENTATION OF I2C BUS MASTER
Figure 4. Buffer of transmission structure
0data nb-2
|
|
nb-3data2
nb-2data1
nb-1sub @
nbEEPROM @
|
|
The buffer of transmission contains the EEPROM address, the sub addr ess (the address
where you want to write into the EEPROM) and then the data to transmit.
In this application, a parameter called “n” allows you to modify the number of data to transm it
and then to receive. The number of data is “n-1”, that means that in this application, as 3 data
have to be sent, “n=4”.
The transm ission fu nction is base d on a double s hift: a shift of the “coun t” variabl e to call 8
times the function I2Cm_TxData (to send the 8 bits of one data byte) and a shift into the
I2Cm_TxData function to always send the MSB of the data (refer to Figure 5).
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